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-rw-r--r--firmware/target/arm/as3525/boot.lds21
-rw-r--r--firmware/target/arm/as3525/clock-target.h15
-rw-r--r--firmware/target/arm/as3525/fmradio-i2c-as3525.c6
-rw-r--r--firmware/target/arm/as3525/powermgmt-target.h2
-rw-r--r--firmware/target/arm/as3525/sansa-clip/lcd-ssd1303.c55
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/backlight-clip.c51
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/backlight-target.h32
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/button-clip.c108
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/button-target.h59
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/sd-clipv2.c777
-rw-r--r--firmware/target/arm/as3525/system-as3525.c21
11 files changed, 1130 insertions, 17 deletions
diff --git a/firmware/target/arm/as3525/boot.lds b/firmware/target/arm/as3525/boot.lds
index 9c6d6faf11..dcc291b54f 100644
--- a/firmware/target/arm/as3525/boot.lds
+++ b/firmware/target/arm/as3525/boot.lds
@@ -6,24 +6,29 @@ OUTPUT_FORMAT(elf32-littlearm)
6OUTPUT_ARCH(arm) 6OUTPUT_ARCH(arm)
7STARTUP(target/arm/crt0.o) 7STARTUP(target/arm/crt0.o)
8 8
9#define IRAMORIG 0x81000000 9#ifdef SANSA_CLIPV2
10#define IRAMSIZE 0x50000 10#define RAMORIG 0x0 /* DRAM */
11#define RAMSIZE (MEM*0x100000)
12#else
13#define RAMORIG 0x81000000 /* IRAM */
14#define RAMSIZE 0x50000
15#endif
11 16
12MEMORY 17MEMORY
13{ 18{
14 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE 19 RAM : ORIGIN = RAMORIG, LENGTH = RAMSIZE
15} 20}
16 21
17SECTIONS 22SECTIONS
18{ 23{
19 . = IRAMORIG; 24 . = RAMORIG;
20 25
21 .text : { 26 .text : {
22 *(.init.text) 27 *(.init.text)
23 *(.glue_7) 28 *(.glue_7)
24 *(.glue_7t) 29 *(.glue_7t)
25 *(.text*) 30 *(.text*)
26 } > IRAM 31 } > RAM
27 32
28 .data : { 33 .data : {
29 *(.icode) 34 *(.icode)
@@ -33,7 +38,7 @@ SECTIONS
33 *(.ncdata*) 38 *(.ncdata*)
34 *(.rodata*) 39 *(.rodata*)
35 _dataend = . ; 40 _dataend = . ;
36 } > IRAM 41 } > RAM
37 42
38 .stack : 43 .stack :
39 { 44 {
@@ -43,7 +48,7 @@ SECTIONS
43 . += 0x2000; 48 . += 0x2000;
44 _stackend = .; 49 _stackend = .;
45 stackend = .; 50 stackend = .;
46 } > IRAM 51 } > RAM
47 52
48 .bss : { 53 .bss : {
49 _edata = .; 54 _edata = .;
@@ -52,5 +57,5 @@ SECTIONS
52 *(COMMON) 57 *(COMMON)
53 *(.ncbss*); 58 *(.ncbss*);
54 _end = .; 59 _end = .;
55 } > IRAM 60 } > RAM
56} 61}
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h
index bc112fdea8..08c385c7cd 100644
--- a/firmware/target/arm/as3525/clock-target.h
+++ b/firmware/target/arm/as3525/clock-target.h
@@ -56,6 +56,13 @@
56#define AS3525_CLK_FCLK 3 /* Available as PCLK input only */ 56#define AS3525_CLK_FCLK 3 /* Available as PCLK input only */
57 57
58/** ************ Change these to reconfigure clocking scheme *******************/ 58/** ************ Change these to reconfigure clocking scheme *******************/
59#ifdef SANSA_CLIPV2
60
61/* PLL* registers differ from AS3525 */
62#define AS3525_PLLA_FREQ 240000000
63
64#else
65
59/* PLL frequencies and settings*/ 66/* PLL frequencies and settings*/
60#define AS3525_PLLA_FREQ 248000000 /*124,82.7,62,49.6,41.3,35.4 */ 67#define AS3525_PLLA_FREQ 248000000 /*124,82.7,62,49.6,41.3,35.4 */
61 /* FCLK_PREDIV-> *7/8 = 217MHz 108.5 ,72.3, 54.25, 43.4, 36.17 */ 68 /* FCLK_PREDIV-> *7/8 = 217MHz 108.5 ,72.3, 54.25, 43.4, 36.17 */
@@ -63,6 +70,8 @@
63 /* *5/8 = 155MHz 77.5, 51.67, 38.75 */ 70 /* *5/8 = 155MHz 77.5, 51.67, 38.75 */
64#define AS3525_PLLA_SETTING 0x261F 71#define AS3525_PLLA_SETTING 0x261F
65 72
73#endif /* SANSA_CLIPV2 */
74
66//#define AS3525_PLLA_FREQ 384000000 /*192,128,96,76.8,64,54.9,48,42.7,38.4*/ 75//#define AS3525_PLLA_FREQ 384000000 /*192,128,96,76.8,64,54.9,48,42.7,38.4*/
67 /* FCLK_PREDIV-> *7/8 = 336MHz 168, 112, 84, 67.2, 56, 48, 42, 37.3*/ 76 /* FCLK_PREDIV-> *7/8 = 336MHz 168, 112, 84, 67.2, 56, 48, 42, 37.3*/
68 /* *6/8 = 288MHz 144, 96, 72, 57.6, 48, 41.1, */ 77 /* *6/8 = 288MHz 144, 96, 72, 57.6, 48, 41.1, */
@@ -118,7 +127,13 @@
118 127
119#define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */ 128#define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */
120#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/ 129#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/
130
131#ifdef SANSA_CLIPV2
132#define AS3525_MS_FREQ 120000000
133#define AS3525_IDE_FREQ 80000000
134#else
121#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */ 135#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */
136#endif /* SANSA_CLIPV2 */
122 137
123 138
124//#define AS3525_USB_SEL AS3525_CLK_PLLA /* Input Source */ 139//#define AS3525_USB_SEL AS3525_CLK_PLLA /* Input Source */
diff --git a/firmware/target/arm/as3525/fmradio-i2c-as3525.c b/firmware/target/arm/as3525/fmradio-i2c-as3525.c
index d987938d3a..6cdf0c7c7f 100644
--- a/firmware/target/arm/as3525/fmradio-i2c-as3525.c
+++ b/firmware/target/arm/as3525/fmradio-i2c-as3525.c
@@ -37,6 +37,12 @@
37#define I2C_SCL_PIN 4 37#define I2C_SCL_PIN 4
38#define I2C_SDA_PIN 5 38#define I2C_SDA_PIN 5
39 39
40#elif defined(SANSA_CLIPV2)
41#define I2C_GPIO(x) GPIOB_PIN(x)
42#define I2C_GPIO_DIR GPIOB_DIR
43#define I2C_SCL_PIN 6
44#define I2C_SDA_PIN 7
45
40#elif defined(SANSA_M200V4) 46#elif defined(SANSA_M200V4)
41#define I2C_GPIO(x) GPIOD_PIN(x) 47#define I2C_GPIO(x) GPIOD_PIN(x)
42#define I2C_GPIO_DIR GPIOD_DIR 48#define I2C_GPIO_DIR GPIOD_DIR
diff --git a/firmware/target/arm/as3525/powermgmt-target.h b/firmware/target/arm/as3525/powermgmt-target.h
index d458508275..269a89349e 100644
--- a/firmware/target/arm/as3525/powermgmt-target.h
+++ b/firmware/target/arm/as3525/powermgmt-target.h
@@ -22,7 +22,7 @@
22#ifndef POWERMGMT_TARGET_H 22#ifndef POWERMGMT_TARGET_H
23#define POWERMGMT_TARGET_H 23#define POWERMGMT_TARGET_H
24 24
25#if defined(SANSA_CLIP) 25#if defined(SANSA_CLIP) || defined(SANSA_CLIPV2)
26 26
27/* Check if topped-off and monitor voltage while plugged. */ 27/* Check if topped-off and monitor voltage while plugged. */
28#define BATT_FULL_VOLTAGE 4160 28#define BATT_FULL_VOLTAGE 4160
diff --git a/firmware/target/arm/as3525/sansa-clip/lcd-ssd1303.c b/firmware/target/arm/as3525/sansa-clip/lcd-ssd1303.c
index 1ca26dd1a1..45de3e80dc 100644
--- a/firmware/target/arm/as3525/sansa-clip/lcd-ssd1303.c
+++ b/firmware/target/arm/as3525/sansa-clip/lcd-ssd1303.c
@@ -9,7 +9,7 @@
9 * 9 *
10 * Copyright (C) 2002 by Alan Korr 10 * Copyright (C) 2002 by Alan Korr
11 * Copyright (C) 2008 François Dinel 11 * Copyright (C) 2008 François Dinel
12 * Copyright (C) 2008 Rafaël Carré 12 * Copyright (C) 2008-2009 Rafaël Carré
13 * 13 *
14 * This program is free software; you can redistribute it and/or 14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License 15 * modify it under the terms of the GNU General Public License
@@ -30,7 +30,12 @@
30#include "string.h" 30#include "string.h"
31 31
32/*** AS3525 specifics ***/ 32/*** AS3525 specifics ***/
33#ifdef SANSA_CLIPV2
34#include "as3525v2.h"
35#else
33#include "as3525.h" 36#include "as3525.h"
37#endif
38
34#include "ascodec.h" 39#include "ascodec.h"
35 40
36/*** definitions ***/ 41/*** definitions ***/
@@ -71,6 +76,7 @@
71/* DBOP initialisation, do what OF does */ 76/* DBOP initialisation, do what OF does */
72static void ams3525_dbop_init(void) 77static void ams3525_dbop_init(void)
73{ 78{
79#ifdef SANSA_CLIP
74 CGU_DBOP = (1<<3) | AS3525_DBOP_DIV; 80 CGU_DBOP = (1<<3) | AS3525_DBOP_DIV;
75 81
76 GPIOB_AFSEL = 0x08; /* DBOP on pin 3 */ 82 GPIOB_AFSEL = 0x08; /* DBOP on pin 3 */
@@ -79,14 +85,34 @@ static void ams3525_dbop_init(void)
79 DBOP_CTRL = 0x51008; 85 DBOP_CTRL = 0x51008;
80 DBOP_TIMPOL_01 = 0x6E167; 86 DBOP_TIMPOL_01 = 0x6E167;
81 DBOP_TIMPOL_23 = 0xA167E06F; 87 DBOP_TIMPOL_23 = 0xA167E06F;
88#else /* SANSA_CLIPV2 */
89 CCU_IO |= (1<<12); /* ?? */
90 CGU_DBOP |= /*(1<<3)*/ 0x18 | AS3525_DBOP_DIV;
91
92 DBOP_CTRL = 0x51004;
93 DBOP_TIMPOL_01 = 0x36A12F;
94 DBOP_TIMPOL_23 = 0xE037E037;
95#endif
82} 96}
83 97
98#ifdef SANSA_CLIP
99#define LCD_DELAY 1
100#else /* SANSA_CLIPV2 */
101#define LCD_DELAY 10
102#endif
103
84void lcd_write_command(int byte) 104void lcd_write_command(int byte)
85{ 105{
86 volatile int i = 0; 106 volatile int i = 0;
87 while(i<1) i++; 107 while(i<LCD_DELAY) i++;
108
88 /* unset D/C# (data or command) */ 109 /* unset D/C# (data or command) */
110#ifdef SANSA_CLIP
89 GPIOA_PIN(5) = 0; 111 GPIOA_PIN(5) = 0;
112#else /* SANSA_CLIPV2 */
113 GPIOB_PIN(2) = 0;
114 DBOP_TIMPOL_23 = 0xE0370036;
115#endif
90 116
91 /* Write command */ 117 /* Write command */
92 /* Only bits 15:12 and 3:0 of DBOP_DOUT are meaningful */ 118 /* Only bits 15:12 and 3:0 of DBOP_DOUT are meaningful */
@@ -95,14 +121,22 @@ void lcd_write_command(int byte)
95 /* While push fifo is not empty */ 121 /* While push fifo is not empty */
96 while ((DBOP_STAT & (1<<10)) == 0) 122 while ((DBOP_STAT & (1<<10)) == 0)
97 ; 123 ;
124
125#ifdef SANSA_CLIPV2
126 DBOP_TIMPOL_23 = 0xE0370036;
127#endif
98} 128}
99 129
100void lcd_write_data(const fb_data* p_bytes, int count) 130void lcd_write_data(const fb_data* p_bytes, int count)
101{ 131{
102 volatile int i = 0; 132 volatile int i = 0;
103 while(i<1) i++; 133 while(i<LCD_DELAY) i++;
104 /* set D/C# (data or command) */ 134 /* set D/C# (data or command) */
135#ifdef SANSA_CLIP
105 GPIOA_PIN(5) = (1<<5); 136 GPIOA_PIN(5) = (1<<5);
137#else /* SANSA_CLIPV2 */
138 GPIOB_PIN(2) = (1<<2);
139#endif
106 140
107 while (count--) 141 while (count--)
108 { 142 {
@@ -139,9 +173,9 @@ void lcd_set_contrast(int val)
139 173
140void lcd_set_invert_display(bool yesno) 174void lcd_set_invert_display(bool yesno)
141{ 175{
142 if (yesno) 176 if (yesno)
143 lcd_write_command(LCD_SET_REVERSE_DISPLAY); 177 lcd_write_command(LCD_SET_REVERSE_DISPLAY);
144 else 178 else
145 lcd_write_command(LCD_SET_NORMAL_DISPLAY); 179 lcd_write_command(LCD_SET_NORMAL_DISPLAY);
146} 180}
147 181
@@ -168,8 +202,10 @@ void lcd_enable(bool enable)
168 202
169 if( (display_on = enable) ) /* simple '=' is not a typo ! */ 203 if( (display_on = enable) ) /* simple '=' is not a typo ! */
170 { 204 {
205#ifdef SANSA_CLIP
171 /* Enable DC-DC AS3525 for some Clip v1 that need it */ 206 /* Enable DC-DC AS3525 for some Clip v1 that need it */
172 ascodec_write(AS3514_DCDC15, 1); 207 ascodec_write(AS3514_DCDC15, 1);
208#endif
173 209
174 lcd_write_command(LCD_SET_DISPLAY_ON); 210 lcd_write_command(LCD_SET_DISPLAY_ON);
175 send_event(LCD_EVENT_ACTIVATION, NULL); 211 send_event(LCD_EVENT_ACTIVATION, NULL);
@@ -177,8 +213,10 @@ void lcd_enable(bool enable)
177 else { 213 else {
178 lcd_write_command(LCD_SET_DISPLAY_OFF); 214 lcd_write_command(LCD_SET_DISPLAY_OFF);
179 215
216#ifdef SANSA_CLIP
180 /* Disable DC-DC AS3525 */ 217 /* Disable DC-DC AS3525 */
181 ascodec_write(AS3514_DCDC15, 0); 218 ascodec_write(AS3514_DCDC15, 0);
219#endif
182 } 220 }
183} 221}
184 222
@@ -198,6 +236,7 @@ void lcd_init_device(void)
198 236
199 ams3525_dbop_init(); 237 ams3525_dbop_init();
200 238
239#ifdef SANSA_CLIP
201 GPIOA_DIR |= 0x33; /* pins 5:4 and 1:0 out */ 240 GPIOA_DIR |= 0x33; /* pins 5:4 and 1:0 out */
202 GPIOB_DIR |= 0x40; /* pin 6 out */ 241 GPIOB_DIR |= 0x40; /* pin 6 out */
203 242
@@ -205,6 +244,10 @@ void lcd_init_device(void)
205 GPIOA_PIN(0) = (1<<0); 244 GPIOA_PIN(0) = (1<<0);
206 GPIOA_PIN(4) = 0; 245 GPIOA_PIN(4) = 0;
207 GPIOB_PIN(6) = (1<<6); 246 GPIOB_PIN(6) = (1<<6);
247#else /* SANSA_CLIPV2 */
248 GPIOB_DIR |= (1<<2)|(1<<5);
249 GPIOB_PIN(5) = (1<<5);
250#endif
208 251
209 /* Set display clock (divide ratio = 1) and oscillator frequency (1) */ 252 /* Set display clock (divide ratio = 1) and oscillator frequency (1) */
210 lcd_write_command(LCD_SET_DISPLAY_CLOCK_AND_OSC_FREQ); 253 lcd_write_command(LCD_SET_DISPLAY_CLOCK_AND_OSC_FREQ);
@@ -247,7 +290,7 @@ void lcd_init_device(void)
247 lcd_write_command (LCD_SET_HIGHER_COLUMN_ADDRESS /*| 0*/); 290 lcd_write_command (LCD_SET_HIGHER_COLUMN_ADDRESS /*| 0*/);
248 lcd_write_command (LCD_SET_LOWER_COLUMN_ADDRESS /*| 0*/); 291 lcd_write_command (LCD_SET_LOWER_COLUMN_ADDRESS /*| 0*/);
249 292
250 memset(p_bytes, 0, sizeof(p_bytes)); /* fills with 0 : pixel off */ 293 memset(p_bytes, 0, sizeof(p_bytes)); /* fills with 0 : pixel off */
251 294
252 for(i = 0; i < 8; i++) 295 for(i = 0; i < 8; i++)
253 { 296 {
diff --git a/firmware/target/arm/as3525/sansa-clipv2/backlight-clip.c b/firmware/target/arm/as3525/sansa-clipv2/backlight-clip.c
new file mode 100644
index 0000000000..dc36b5237f
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/backlight-clip.c
@@ -0,0 +1,51 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright © 2009 Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "backlight-target.h"
23#include "lcd.h"
24#include "as3525v2.h"
25#include "ascodec-target.h"
26
27void _backlight_on(void)
28{
29 ascodec_write(0x25, ascodec_read(0x25) | 2); /* lcd power */
30 ascodec_write(0x1c, 8|1);
31 ascodec_write(0x1b, 0x90);
32 lcd_enable(true);
33}
34
35void _backlight_off(void)
36{
37 ascodec_write(0x25, ascodec_read(0x25) & ~2); /* lcd power */
38 lcd_enable(false);
39}
40
41void _buttonlight_on(void)
42{
43 GPIOA_DIR |= (1<<5);
44 GPIOA_PIN(5) = (1<<5); /* set pin a5 high */
45}
46
47void _buttonlight_off(void)
48{
49 GPIOA_DIR |= (1<<5);
50 GPIOA_PIN(5) = 0; /* set pin a5 low */
51}
diff --git a/firmware/target/arm/as3525/sansa-clipv2/backlight-target.h b/firmware/target/arm/as3525/sansa-clipv2/backlight-target.h
new file mode 100644
index 0000000000..d202408356
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/backlight-target.h
@@ -0,0 +1,32 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright © 2009 Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24#define _backlight_init() true
25
26void _backlight_on(void);
27void _backlight_off(void);
28
29void _buttonlight_on(void);
30void _buttonlight_off(void);
31
32#endif
diff --git a/firmware/target/arm/as3525/sansa-clipv2/button-clip.c b/firmware/target/arm/as3525/sansa-clipv2/button-clip.c
new file mode 100644
index 0000000000..4291665e3d
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/button-clip.c
@@ -0,0 +1,108 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 François Dinel
11 * Copyright © 2008-2009 Rafaël Carré
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22#include "button-target.h"
23#include "as3525v2.h"
24#include "kernel.h"
25
26/* FIXME : use Clipv1 like driver (FS#10285) */
27
28void button_init_device(void)
29{
30 GPIOA_DIR &= ~((1<<7) | (1<<3));
31 GPIOD_DIR &= ~((1<<2) | (1<<1) | (1<<0));
32 GPIOD_PIN(3) = 1<<3;
33 GPIOD_PIN(4) = 1<<4;
34 GPIOD_PIN(5) = 1<<5;
35 GPIOD_DIR |= ((1<<5) | (1<<4) | (1<<3));
36}
37
38int button_read_device(void)
39{
40 int result = 0;
41 static unsigned power_counter = 0;
42
43 if(button_hold())
44 {
45 power_counter = HZ;
46 return 0;
47 }
48
49 /* direct GPIO connections */
50 /* read power, but not if hold button was just released, since
51 * you basically always hit power due to the slider mechanism after
52 * releasing hold (wait 1 sec) */
53 if (power_counter)
54 power_counter--;
55
56 if (GPIOA_PIN(7) && !power_counter)
57 result |= BUTTON_POWER;
58
59 /* This is a keypad using D3-D5 as columns and D0-D2 as rows */
60
61 GPIOD_PIN(3) = 0x00; /* activate D3 */
62 asm volatile ("nop\nnop\nnop\nnop\nnop\n"); /* wait a bit for reliable results */
63
64 /* D3D0 is unused */
65
66 if (!GPIOD_PIN(1))
67 result |= BUTTON_VOL_UP;
68
69 if (!GPIOD_PIN(2))
70 result |= BUTTON_UP;
71
72 GPIOD_PIN(3) = 1<<3;
73
74 GPIOD_PIN(4) = 0x00; /* activate D4 */
75 asm volatile ("nop\nnop\nnop\nnop\nnop\n");
76
77 if (!GPIOD_PIN(0))
78 result |= BUTTON_LEFT;
79
80 if (!GPIOD_PIN(1))
81 result |= BUTTON_SELECT;
82
83 if (!GPIOD_PIN(2))
84 result |= BUTTON_RIGHT;
85
86 GPIOD_PIN(4) = 1<<4;
87
88 GPIOD_PIN(5) = 0x00; /* activate D5 */
89 asm volatile ("nop\nnop\nnop\nnop\nnop\n");
90
91 if (!GPIOD_PIN(0))
92 result |= BUTTON_DOWN;
93
94 if (!GPIOD_PIN(1))
95 result |= BUTTON_VOL_DOWN;
96
97 if (!GPIOD_PIN(2))
98 result |= BUTTON_HOME;
99
100 GPIOD_PIN(5) = 1<<5;
101
102 return result;
103}
104
105bool button_hold(void)
106{
107 return (GPIOA_PIN(3) != 0);
108}
diff --git a/firmware/target/arm/as3525/sansa-clipv2/button-target.h b/firmware/target/arm/as3525/sansa-clipv2/button-target.h
new file mode 100644
index 0000000000..238fd1dee5
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/button-target.h
@@ -0,0 +1,59 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 François Dinel
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _BUTTON_TARGET_H_
23#define _BUTTON_TARGET_H_
24
25#include <stdbool.h>
26#include "config.h"
27
28#define HAS_BUTTON_HOLD
29
30void button_init_device(void);
31int button_read_device(void);
32bool button_hold(void);
33
34/* Main unit's buttons */
35#define BUTTON_HOME 0x00000001
36
37#define BUTTON_VOL_UP 0x00000002
38#define BUTTON_VOL_DOWN 0x00000004
39
40#define BUTTON_UP 0x00000008
41#define BUTTON_DOWN 0x00000010
42#define BUTTON_LEFT 0x00000020
43#define BUTTON_RIGHT 0x00000040
44
45#define BUTTON_SELECT 0x00000080
46
47#define BUTTON_POWER 0x00000100
48
49#define BUTTON_MAIN (BUTTON_HOME|BUTTON_VOL_UP|BUTTON_VOL_DOWN\
50 |BUTTON_UP|BUTTON_DOWN|BUTTON_LEFT|BUTTON_RIGHT\
51 |BUTTON_SELECT|BUTTON_POWER)
52
53#define BUTTON_REMOTE 0
54
55/* Software power-off */
56#define POWEROFF_BUTTON BUTTON_POWER
57#define POWEROFF_COUNT 10
58
59#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/arm/as3525/sansa-clipv2/sd-clipv2.c b/firmware/target/arm/as3525/sansa-clipv2/sd-clipv2.c
new file mode 100644
index 0000000000..70c0477431
--- /dev/null
+++ b/firmware/target/arm/as3525/sansa-clipv2/sd-clipv2.c
@@ -0,0 +1,777 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 Daniel Ankers
11 * Copyright © 2008-2009 Rafaël Carré
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h" /* for HAVE_MULTIVOLUME */
24#include "fat.h"
25#include "thread.h"
26#include "hotswap.h"
27#include "system.h"
28#include "kernel.h"
29#include "cpu.h"
30#include <stdio.h>
31#include <stdlib.h>
32#include <string.h>
33#include "as3525v2.h"
34#include "pl081.h" /* DMA controller */
35#include "dma-target.h" /* DMA request lines */
36#include "clock-target.h"
37#include "panic.h"
38#include "stdbool.h"
39#include "ata_idle_notify.h"
40#include "sd.h"
41
42#include "lcd.h"
43#include <stdarg.h>
44#include "sysfont.h"
45
46static int line = 0;
47static void printf(const char *format, ...)
48{
49 char buf[50];
50 int len;
51 va_list ap;
52 va_start(ap, format);
53
54 len = vsnprintf(buf, sizeof(buf), format, ap);
55 va_end(ap);
56
57 lcd_puts(0, line++, buf);
58 lcd_update();
59 if(line >= LCD_HEIGHT/SYSFONT_HEIGHT)
60 line = 0;
61}
62
63/* command flags */
64#define MCI_NO_RESP (0<<0)
65#define MCI_RESP (1<<0)
66#define MCI_LONG_RESP (1<<1)
67
68/* controller registers */
69#define SD_BASE 0xC6070000
70
71/*
72 * REGISTERS
73 *
74 * m = modify (orr/bic), r = read, w = write
75 *
76 * 00 m/r/w
77 * 04 m/w
78 * 08 m
79 * 0C ?
80 * 10 r/w
81 * 14 w
82 * 18 m
83 * 1C w ==> set a bit before transfer (sometimes) !
84 * 20 w ==> set a bit before transfer !
85 * 24 w irq mask ?
86 * 28 w arg
87 * 2C r/w cmd
88 * 30 r resp0
89 * 34 r resp1
90 * 38 r resp2
91 * 3C r resp3
92 * 40 r irq status (only read in isr)
93 * 44 m/w irq clear
94 * 48 r
95 * 4C m
96 * 64 w
97 * 70 r
98 * 100 FIFO
99 */
100
101/*
102 * STATUS register
103 * & 0xBA80
104 * & 8
105 * & 0x428
106 * & 0x418
107 */
108
109/*
110 * INFO on CMD register
111 *
112 * if(cmd >= 200) cmd -= 200; (>= 200 = acmd?)
113 *
114 * COMMANDS (| (x<<16) BITS RESPONSE
115 *
116 * 1 ? reserved & ~0x80, | 0x40, | 0x8000 ?
117 * 5 ? reserved for I/O cards & ~0x80, | 0x40 ?
118 * 11 ? reserved & ~0x80, | 0x40, | 0x2200, | 0x800 ?
119 * 14 ? reserved & ~0x80, | 0x40, | 0x2200, ~0x1000 ?
120 * 19 ? reserved & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
121 * 20 ? reserved & ~0x80, |0x40, | 0x2700, | 0x800 ?
122 * 23 ? reserved & ~0x80, | 0x40 ?
123 * 39 ? reserved & ~0x80, | 0x40 ?
124 * 51 ? reserved & ~0x80, | 0x40, | 0x2000, | 0x200 ?
125 * 52 ? reserved for I/O & ~0x80, | 0x40 ?
126 * 53 ? reserved for I/O & ~0x80, | 0x40, | 0x2200, & ~0x1000 ?
127 * 253 ? & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
128 *
129 * 0 GO IDLE STATE & ~0x4000, & ~0xC0, | 0x4000 no
130 * 2 ALL SEND CID & ~0x4000, |0xC0 r2
131 * 3 SEND RCA & ~0x80, | 0x40 r6
132 * 6 SWITCH_FUNC & ~0x80, | 0x40 r1
133 * 7 SELECT CARD & ~0x80, | 0x40 r1b
134 * 8 SEND IF COND & ~0x80, | 0x40, | 0x2200, & ~0x1000 r7
135 * 9 SEND CSD & ~0x4000, | 0xc0 r2
136 * 12 STOP TRANSMISSION & ~0x80, | 0x40, | 0x4000 r1b
137 * 13 SEND STATUS & ~0x80, | 0x40 r1
138 * 15 GO INACTIVE STATE & ~0x4000, & ~0xC0 no
139 * 16 SET BLOCKLEN & ~0x80, | 0x40 r1
140 * 17 READ SINGLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
141 * 18 READ MULTIPLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
142 * 24 WRITE BLOCK & ~0x80, |0x40, | 0x2700 r1
143 * 25 WRITE MULTIPLE BLOCK & ~0x80, |0x40, | 0x2700 r1
144 * 41 SEND APP OP COND & ~0x80, | 0x40 r3
145 * 42 LOCK UNLOCK & ~0x80, |0x40, | 0x2700 r1
146 * 55 APP CMD & ~0x80, | 0x40 r1
147 * 206 SET BUS WIDTH & ~0x80, | 0x40, | 0x2000 r1
148 * 207 SELECT CARD ? & ~0x4000, & ~0xC0 r1b
149 *
150 *
151 * bits 5:0 = cmd
152 * bit 6 (0x40) = response
153 * bit 7 (0x80) = long response
154 * => like pl180 <=
155 * BIT SET IN COMANDS:
156 *
157 * bit 8 (0x100) ? write block, write multi_block, lock/unlock
158 * bit 9 (0x200) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock
159 * bit 10 (0x400) ? write block, write multi_block, lock/unlock
160 * bit 11 (0x800) ?
161 * bit 12 (0x1000) ?
162 * bit 13 (0x2000) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock, set bus width
163 * bit 14 (0x4000) ? go idle state, stop transmission
164 * bit 15 (0x8000) ?
165 *
166 */
167
168/* FIXME */
169#define MCI_POWER
170#define MCI_CLOCK
171#define MCI_ARGUMENT (*(volatile unsigned long *) (SD_BASE+0x28))
172#define MCI_COMMAND (*(volatile unsigned long *) (SD_BASE+0x2C))
173#define MCI_RESPCMD
174#define MCI_RESP0 (*(volatile unsigned long *) (SD_BASE+0x30))
175#define MCI_RESP1 (*(volatile unsigned long *) (SD_BASE+0x34))
176#define MCI_RESP2 (*(volatile unsigned long *) (SD_BASE+0x38))
177#define MCI_RESP3 (*(volatile unsigned long *) (SD_BASE+0x3C))
178#define MCI_DATA_TIMER
179#define MCI_DATA_LENGTH
180#define MCI_DATA_CTRL
181#define MCI_STATUS (*(volatile unsigned long *) (SD_BASE+0x40))
182#define MCI_CLEAR (*(volatile unsigned long *) (SD_BASE+0x44))
183#define MCI_MASK (*(volatile unsigned long *) (SD_BASE+0x24))
184#define MCI_SELECT
185
186#define MCI_ERROR 0 /* FIXME */
187
188#define MCI_FIFO ((unsigned long *) (SD_BASE+0x100))
189
190#define MCI_COMMAND_ENABLE (1<<31)
191#define MCI_COMMAND_ACTIVE MCI_COMMAND_ENABLE
192#define MCI_COMMAND_RESPONSE (1<<6)
193#define MCI_COMMAND_LONG_RESPONSE (1<<7)
194
195
196
197static int sd_init_card(void);
198static void init_controller(void);
199
200static tCardInfo card_info;
201
202/* for compatibility */
203static long last_disk_activity = -1;
204
205#define MIN_YIELD_PERIOD 5 /* ticks */
206static long next_yield = 0;
207
208static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
209static const char sd_thread_name[] = "ata/sd";
210static struct mutex sd_mtx SHAREDBSS_ATTR;
211static struct event_queue sd_queue;
212#ifndef BOOTLOADER
213static bool sd_enabled = false;
214#endif
215
216static struct wakeup transfer_completion_signal;
217static volatile bool retry;
218
219static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
220
221void INT_NAND(void)
222{
223 (*(volatile unsigned long *) (SD_BASE+0x0)) &= ~0x10; // ?
224 const int status = MCI_STATUS;
225
226#if 0
227 if(status & MCI_ERROR)
228 retry = true;
229#endif
230
231// wakeup_signal(&transfer_completion_signal);
232 MCI_CLEAR = status;
233
234 static int x = 0;
235 switch(status)
236 {
237 case 0x4: /* cmd received ? */
238 case 0x104: /* ? 1 time in init (10th interrupt) */
239 case 0x2000: /* ? after cmd read_mul_blocks | 0x2200 */
240
241 case 0x820: /* ? 1 time while copy from FIFO (not DMA) */
242 case 0x20: /* ? rx fifo empty */
243 break;
244 default:
245 printf("%2d NAND 0x%x", ++x, status);
246 int delay = 0x100000; while(delay--) ;
247 }
248 /*
249 * 0x48 = some kind of status
250 * 0x106
251 * 0x4106
252 * 1B906
253 * 1F906
254 * 1B906
255 * 1F906
256 * 1F906
257 * 1906
258 * ...
259 * 6906
260 * 6D06 (dma)
261 *
262 * read resp (6, 7, 12, 42) : while bit 9 is unset ;
263 *
264 */
265 printf("%x %x", status, (*(volatile unsigned long *) (SD_BASE+0x48)));
266 //while(!button_read_device());
267 //while(button_read_device());
268
269 (*(volatile unsigned long *) (SD_BASE+0x0)) |= 0x10; // ?
270}
271
272static bool send_cmd(const int cmd, const int arg, const int flags,
273 unsigned long *response)
274{
275 int val;
276 val = cmd | MCI_COMMAND_ENABLE;
277 if(flags & MCI_RESP)
278 {
279 val |= MCI_COMMAND_RESPONSE;
280 if(flags & MCI_LONG_RESP)
281 val |= MCI_COMMAND_LONG_RESPONSE;
282 }
283
284 if(cmd == 18) /* r */
285 val |= 0x2200;
286 else if(cmd == 25) /* w */
287 val |= 0x2700;
288
289 int tmp = (*(volatile unsigned long *) (SD_BASE+0x10));
290 (*(volatile unsigned long *) (SD_BASE+0x10)) = 0;
291
292 MCI_COMMAND = 0x80202000;
293 MCI_ARGUMENT = 0;
294 int max = 10;
295 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
296
297 (*(volatile unsigned long *) (SD_BASE+0x08)) &= ~0xff;
298 (*(volatile unsigned long *) (SD_BASE+0x08)) |= 0;
299
300 MCI_COMMAND = 0x80202000;
301 MCI_ARGUMENT = 0;
302 max = 10;
303 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
304
305 (*(volatile unsigned long *) (SD_BASE+0x10)) = tmp;
306
307 MCI_COMMAND = 0x80202000;
308 MCI_ARGUMENT = 0;
309 max = 10;
310 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
311
312 mci_delay();
313
314 MCI_ARGUMENT = arg;
315 MCI_COMMAND = val;
316
317 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x10;
318
319 max = 1000;
320 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE); /* wait for cmd completion */
321 if(!max)
322 return false;
323
324 if(flags & MCI_RESP)
325 {
326 if(flags & MCI_LONG_RESP)
327 {
328 /* store the response in little endian order for the words */
329 response[0] = MCI_RESP3;
330 response[1] = MCI_RESP2;
331 response[2] = MCI_RESP1;
332 response[3] = MCI_RESP0;
333 }
334 else
335 response[0] = MCI_RESP0;
336 }
337 return true;
338}
339
340static int sd_init_card(void)
341{
342 unsigned long response;
343 unsigned long temp_reg[4];
344 int max_tries = 100; /* max acmd41 attemps */
345 bool sdhc;
346 int i;
347
348 if(!send_cmd(SD_GO_IDLE_STATE, 0, MCI_NO_RESP, NULL))
349 return -1;
350
351 mci_delay();
352
353 sdhc = false;
354 if(send_cmd(SD_SEND_IF_COND, 0x1AA, MCI_RESP, &response))
355 if((response & 0xFFF) == 0x1AA)
356 sdhc = true;
357
358 do {
359 /* some MicroSD cards seems to need more delays, so play safe */
360 mci_delay();
361 mci_delay();
362 mci_delay();
363
364 /* app_cmd */
365 if( !send_cmd(SD_APP_CMD, 0, MCI_RESP, &response) /*||
366 !(response & (1<<5))*/ )
367 {
368 return -2;
369 }
370
371 /* acmd41 */
372 if(!send_cmd(SD_APP_OP_COND, (sdhc ? 0x40FF8000 : (1<<23)),
373 MCI_RESP, &card_info.ocr))
374 return -3;
375 } while(!(card_info.ocr & (1<<31)) && max_tries--);
376
377 if(max_tries < 0)
378 return -4;
379
380 mci_delay();
381 mci_delay();
382 mci_delay();
383
384 /* send CID */
385 if(!send_cmd(SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP, card_info.cid))
386 return -5;
387
388 /* send RCA */
389 if(!send_cmd(SD_SEND_RELATIVE_ADDR, 0, MCI_RESP, &card_info.rca))
390 return -6;
391
392 /* send CSD */
393 if(!send_cmd(SD_SEND_CSD, card_info.rca,
394 MCI_RESP|MCI_LONG_RESP, temp_reg))
395 return -7;
396
397 for(i=0; i<4; i++)
398 card_info.csd[3-i] = temp_reg[i];
399
400 sd_parse_csd(&card_info);
401
402 if(!send_cmd(SD_APP_CMD, 0, MCI_RESP, &response) ||
403 !send_cmd(42, 0, MCI_NO_RESP, NULL)) /* disconnect the 50 KOhm pull-up
404 resistor on CD/DAT3 */
405 return -13;
406
407 if(!send_cmd(SD_APP_CMD, card_info.rca, MCI_NO_RESP, NULL))
408 return -10;
409
410 if(!send_cmd(SD_SET_BUS_WIDTH, card_info.rca | 2, MCI_NO_RESP, NULL))
411 return -11;
412
413 (*(volatile unsigned long *) (SD_BASE+0x18)) &= ~(0x10001);
414 (*(volatile unsigned long *) (SD_BASE+0x18)) |= 0x1;
415
416 if(!send_cmd(SD_SELECT_CARD, card_info.rca, MCI_NO_RESP, NULL))
417 return -9;
418
419 /* not sent in init_card() by OF */
420 if(!send_cmd(SD_SET_BLOCKLEN, card_info.blocksize, MCI_NO_RESP,
421 NULL))
422 return -12;
423
424 card_info.initialized = 1;
425
426 return 0;
427}
428
429static void sd_thread(void) __attribute__((noreturn));
430static void sd_thread(void)
431{
432 struct queue_event ev;
433 bool idle_notified = false;
434
435 while (1)
436 {
437 queue_wait_w_tmo(&sd_queue, &ev, HZ);
438
439 switch ( ev.id )
440 {
441 case SYS_TIMEOUT:
442 if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
443 {
444 idle_notified = false;
445 }
446 else
447 {
448 /* never let a timer wrap confuse us */
449 next_yield = current_tick;
450
451 if (!idle_notified)
452 {
453 call_storage_idle_notifys(false);
454 idle_notified = true;
455 }
456 }
457 break;
458#if 0
459 case SYS_USB_CONNECTED:
460 usb_acknowledge(SYS_USB_CONNECTED_ACK);
461 /* Wait until the USB cable is extracted again */
462 usb_wait_for_disconnect(&sd_queue);
463
464 break;
465 case SYS_USB_DISCONNECTED:
466 usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
467 break;
468#endif
469 }
470 }
471}
472
473static void init_controller(void)
474{
475 int tmp = (*(volatile unsigned long *) (SD_BASE+0x70));
476 int shift = 1 + ((tmp << 26) >> 27);
477
478 (*(volatile unsigned long *) (SD_BASE+0x04)) &= ~((1 << shift) -1);
479 (*(volatile unsigned long *) (SD_BASE+0x04)) = (1 << shift) -1;
480
481 mci_delay();
482
483 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 1;
484 int max = 1000;
485 while(max-- && !(*(volatile unsigned long *) (SD_BASE+0x00)) & 1)
486 ;
487
488 MCI_CLEAR = 0xffffffff;
489 MCI_MASK = 0xffffbffe;
490
491 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x10;
492 (*(volatile unsigned long *) (SD_BASE+0x14)) = 0xffffffff;
493
494 (*(volatile unsigned long *) (SD_BASE+0x10)) = (1<<shift) - 1;
495
496 MCI_ARGUMENT = 0;
497 MCI_COMMAND = 0x80202000;
498 max = 10;
499 while(max-- && (MCI_COMMAND & (1<<31))) ;
500
501 (*(volatile unsigned long *) (SD_BASE+0x64)) = 0xfffff;
502
503 (*(volatile unsigned long *) (SD_BASE+0x4c)) = ~0x7fff0fff; // interrupt mask ?
504 (*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x503f0080;
505
506 MCI_MASK = 0xffffbffe;
507}
508
509int sd_init(void)
510{
511 int ret;
512 CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
513
514 CGU_IDE = (1<<7) /* AHB interface enable */ |
515 (1<<6) /* interface enable */ |
516 ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1) << 2) |
517 1; /* clock source = PLLA */
518
519 CGU_MEMSTICK = (1<<8) | (1<<7) |
520 (CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1) | 1;
521
522 /* ?? */
523 *(volatile int*)0xC80F003C = (1<<7) |
524 (CLK_DIV(AS3525_PLLA_FREQ, 24000000) -1) | 1;
525
526 wakeup_init(&transfer_completion_signal);
527
528 VIC_INT_ENABLE |= INTERRUPT_NAND;
529
530 init_controller();
531 ret = sd_init_card();
532 if(ret < 0)
533 return ret;
534
535 /* init mutex */
536 mutex_init(&sd_mtx);
537
538 queue_init(&sd_queue, true);
539 create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
540 sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
541
542#ifndef BOOTLOADER
543 sd_enabled = true;
544 sd_enable(false);
545#endif
546 return 0;
547}
548
549#ifdef STORAGE_GET_INFO
550void sd_get_info(struct storage_info *info)
551{
552 info->sector_size=card_info.blocksize;
553 info->num_sectors=card_info.numblocks;
554 info->vendor="Rockbox";
555 info->product = "Internal Storage";
556 info->revision="0.00";
557}
558#endif
559
560static int sd_wait_for_state(unsigned int state)
561{
562 unsigned long response;
563 unsigned int timeout = 100; /* ticks */
564 long t = current_tick;
565
566 while (1)
567 {
568 long tick;
569
570 if(!send_cmd(SD_SEND_STATUS, card_info.rca,
571 MCI_RESP, &response))
572 return -1;
573
574 if (((response >> 9) & 0xf) == state)
575 return 0;
576
577 if(TIME_AFTER(current_tick, t + timeout))
578 return -10 * ((response >> 9) & 0xf);
579
580 if (TIME_AFTER((tick = current_tick), next_yield))
581 {
582 yield();
583 timeout += current_tick - tick;
584 next_yield = tick + MIN_YIELD_PERIOD;
585 }
586 }
587}
588
589static int sd_transfer_sectors(unsigned long start, int count, void* buf, bool write)
590{
591 int ret = 0;
592
593 if((int)buf & 3)
594 panicf("unaligned transfer");
595
596 /* skip SanDisk OF */
597 start += 0xf000;
598
599 mutex_lock(&sd_mtx);
600#ifndef BOOTLOADER
601 sd_enable(true);
602#endif
603
604 if (card_info.initialized <= 0)
605 {
606 ret = sd_init_card();
607 if (!(card_info.initialized))
608 {
609 panicf("card not initialised (%d)", ret);
610 goto sd_transfer_error;
611 }
612 }
613
614 last_disk_activity = current_tick;
615 ret = sd_wait_for_state(SD_TRAN);
616 if (ret < 0)
617 {
618 static const char *st[9] = {
619 "IDLE", "RDY", "IDENT", "STBY", "TRAN", "DATA", "RCV", "PRG", "DIS"
620 };
621 if(ret <= -10)
622 panicf("wait for state failed (%s)", st[(-ret / 10) % 9]);
623 else
624 panicf("wait for state failed");
625 goto sd_transfer_error;
626 }
627
628 dma_retain();
629
630 while(count)
631 {
632 /* Interrupt handler might set this to true during transfer */
633 retry = false;
634 /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
635 * register, so we have to transfer maximum 127 sectors at a time. */
636 //unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
637 unsigned int transfer = count;
638
639 const int cmd =
640 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
641
642 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 2;
643 while(( *(volatile unsigned long *) (SD_BASE+0x00)) & 2) ;
644
645 //(*(volatile unsigned long *) (SD_BASE+0x1c)) = 512;
646 (*(volatile unsigned long *) (SD_BASE+0x20)) = transfer * 512;
647
648 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 2;
649 while(( *(volatile unsigned long *) (SD_BASE+0x00)) & 2) ;
650
651 (*(volatile unsigned long *) (SD_BASE+0x4c)) &= ~0x7fff0fff;
652
653 if(0)
654 {
655 (*(volatile unsigned long *) (SD_BASE+0x00)) |= 0x20;
656 MCI_MASK = 0xBE8C;
657 (*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x503f0080;
658 }
659 else
660 {
661 MCI_MASK = 0xBEB8;
662 (*(volatile unsigned long *) (SD_BASE+0x4c)) |= 0x3f0030;
663 }
664
665 if(card_info.ocr & (1<<30) ) /* SDHC */
666 ret = send_cmd(cmd, start, MCI_NO_RESP, NULL);
667 else
668 ret = send_cmd(cmd, start * SD_BLOCK_SIZE,
669 MCI_NO_RESP, NULL);
670
671 if (ret < 0)
672 panicf("transfer multiple blocks failed (%d)", ret);
673
674 if(write)
675 dma_enable_channel(0, buf, MCI_FIFO, DMA_PERI_SD,
676 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
677 else
678 dma_enable_channel(0, MCI_FIFO, buf, DMA_PERI_SD,
679 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
680
681 line = 0;
682 lcd_clear_display();
683 printf("dma ->");
684
685 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
686
687 printf("dma <-");
688 int delay = 0x1000000; while(delay--) ;
689
690 if(!retry)
691 {
692 buf += transfer * SECTOR_SIZE;
693 start += transfer;
694 count -= transfer;
695 }
696
697 last_disk_activity = current_tick;
698
699 if(!send_cmd(SD_STOP_TRANSMISSION, 0, MCI_NO_RESP, NULL))
700 {
701 ret = -666;
702 panicf("STOP TRANSMISSION failed");
703 goto sd_transfer_error;
704 }
705
706 ret = sd_wait_for_state(SD_TRAN);
707 if (ret < 0)
708 {
709 panicf(" wait for state TRAN failed (%d)", ret);
710 goto sd_transfer_error;
711 }
712 }
713
714 dma_release();
715
716#ifndef BOOTLOADER
717 sd_enable(false);
718#endif
719 mutex_unlock(&sd_mtx);
720 return 0;
721
722sd_transfer_error:
723 panicf("transfer error : %d",ret);
724 card_info.initialized = 0;
725 return ret;
726}
727
728int sd_read_sectors(unsigned long start, int count, void* buf)
729{
730 return sd_transfer_sectors(start, count, buf, false);
731}
732
733int sd_write_sectors(unsigned long start, int count, const void* buf)
734{
735#if defined(BOOTLOADER) /* we don't need write support in bootloader */
736 (void) start;
737 (void) count;
738 (void) buf;
739 return -1;
740#else
741 return sd_transfer_sectors(start, count, (void*)buf, true);
742#endif
743}
744
745#ifndef BOOTLOADER
746void sd_sleep(void)
747{
748}
749
750void sd_spin(void)
751{
752}
753
754void sd_spindown(int seconds)
755{
756 (void)seconds;
757}
758
759long sd_last_disk_activity(void)
760{
761 return last_disk_activity;
762}
763
764void sd_enable(bool on)
765{
766 /* TODO */
767 (void)on;
768 return;
769}
770
771tCardInfo *card_get_info_target(int card_no)
772{
773 (void)card_no;
774 return &card_info;
775}
776
777#endif /* BOOTLOADER */
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 6d16c1bfca..75539ba8d7 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -161,7 +161,7 @@ void fiq_handler(void)
161 ); 161 );
162} 162}
163 163
164#ifdef BOOTLOADER 164#if defined(BOOTLOADER) && (CONFIG_CPU == AS3525) /* not v2 */
165static void sdram_delay(void) 165static void sdram_delay(void)
166{ 166{
167 int delay = 1024; /* arbitrary */ 167 int delay = 1024; /* arbitrary */
@@ -205,7 +205,7 @@ static void sdram_init(void)
205/* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */ 205/* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */
206#define MEMORY_MODEL 0x21 206#define MEMORY_MODEL 0x21
207 207
208#elif defined(SANSA_E200V2) || defined(SANSA_FUZE) 208#elif defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_CLIPV2)
209/* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */ 209/* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */
210#define MEMORY_MODEL 0x5 210#define MEMORY_MODEL 0x5
211 211
@@ -256,6 +256,21 @@ void memory_init(void)
256 256
257void system_init(void) 257void system_init(void)
258{ 258{
259#ifdef SANSA_CLIPV2
260 /* Init procedure isn't fully understood yet
261 * CCU_* registers differ from AS3525
262 */
263 unsigned int reset_loops = 640;
264
265 CCU_SRC = 0x57D7BF0;
266 while(reset_loops--)
267 CCU_SRL = CCU_SRL_MAGIC_NUMBER;
268 CCU_SRC = CCU_SRL = 0;
269
270 CGU_PERI &= ~0x7f; /* pclk 24 MHz */
271 CGU_PERI |= ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_PCLK_FREQ) - 1) << 2)
272 | 1; /* clk_in = PLLA */
273#else /* SANSA_CLIPV2 */
259 unsigned int reset_loops = 640; 274 unsigned int reset_loops = 640;
260 275
261 CCU_SRC = 0x1fffff0 276 CCU_SRC = 0x1fffff0
@@ -293,6 +308,8 @@ void system_init(void)
293 sdram_init(); 308 sdram_init();
294#endif /* BOOTLOADER */ 309#endif /* BOOTLOADER */
295 310
311#endif /* SANSA_CLIPV2 */
312
296#if 0 /* the GPIO clock is already enabled by the dualboot function */ 313#if 0 /* the GPIO clock is already enabled by the dualboot function */
297 CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; 314 CGU_PERI |= CGU_GPIO_CLOCK_ENABLE;
298#endif 315#endif
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-12 15:08:48 +0000