diff options
Diffstat (limited to 'firmware/target/arm/as3525/system-as3525.c')
-rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 6d16c1bfca..75539ba8d7 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
@@ -161,7 +161,7 @@ void fiq_handler(void) | |||
161 | ); | 161 | ); |
162 | } | 162 | } |
163 | 163 | ||
164 | #ifdef BOOTLOADER | 164 | #if defined(BOOTLOADER) && (CONFIG_CPU == AS3525) /* not v2 */ |
165 | static void sdram_delay(void) | 165 | static void sdram_delay(void) |
166 | { | 166 | { |
167 | int delay = 1024; /* arbitrary */ | 167 | int delay = 1024; /* arbitrary */ |
@@ -205,7 +205,7 @@ static void sdram_init(void) | |||
205 | /* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */ | 205 | /* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */ |
206 | #define MEMORY_MODEL 0x21 | 206 | #define MEMORY_MODEL 0x21 |
207 | 207 | ||
208 | #elif defined(SANSA_E200V2) || defined(SANSA_FUZE) | 208 | #elif defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_CLIPV2) |
209 | /* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */ | 209 | /* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */ |
210 | #define MEMORY_MODEL 0x5 | 210 | #define MEMORY_MODEL 0x5 |
211 | 211 | ||
@@ -256,6 +256,21 @@ void memory_init(void) | |||
256 | 256 | ||
257 | void system_init(void) | 257 | void system_init(void) |
258 | { | 258 | { |
259 | #ifdef SANSA_CLIPV2 | ||
260 | /* Init procedure isn't fully understood yet | ||
261 | * CCU_* registers differ from AS3525 | ||
262 | */ | ||
263 | unsigned int reset_loops = 640; | ||
264 | |||
265 | CCU_SRC = 0x57D7BF0; | ||
266 | while(reset_loops--) | ||
267 | CCU_SRL = CCU_SRL_MAGIC_NUMBER; | ||
268 | CCU_SRC = CCU_SRL = 0; | ||
269 | |||
270 | CGU_PERI &= ~0x7f; /* pclk 24 MHz */ | ||
271 | CGU_PERI |= ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_PCLK_FREQ) - 1) << 2) | ||
272 | | 1; /* clk_in = PLLA */ | ||
273 | #else /* SANSA_CLIPV2 */ | ||
259 | unsigned int reset_loops = 640; | 274 | unsigned int reset_loops = 640; |
260 | 275 | ||
261 | CCU_SRC = 0x1fffff0 | 276 | CCU_SRC = 0x1fffff0 |
@@ -293,6 +308,8 @@ void system_init(void) | |||
293 | sdram_init(); | 308 | sdram_init(); |
294 | #endif /* BOOTLOADER */ | 309 | #endif /* BOOTLOADER */ |
295 | 310 | ||
311 | #endif /* SANSA_CLIPV2 */ | ||
312 | |||
296 | #if 0 /* the GPIO clock is already enabled by the dualboot function */ | 313 | #if 0 /* the GPIO clock is already enabled by the dualboot function */ |
297 | CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; | 314 | CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; |
298 | #endif | 315 | #endif |