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author | Michael Sevakis <jethead71@rockbox.org> | 2010-06-30 02:02:46 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2010-06-30 02:02:46 +0000 |
commit | e286b0bbc04a34c181978efce19c6d0814e228c0 (patch) | |
tree | 841288761e20dc9a7a25e5ba83306adf52547d65 /firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c | |
parent | f4a00174b50c209f2a23b7a73fe7cb544ef59d02 (diff) | |
download | rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.tar.gz rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.zip |
Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c')
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c index d873c19ed3..016f24fc48 100644 --- a/firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c +++ b/firmware/target/arm/imx31/gigabeat-s/usb-gigabeat-s.c | |||
@@ -40,16 +40,16 @@ static void enable_transceiver(bool enable) | |||
40 | { | 40 | { |
41 | if (GPIO1_DR & (1 << 30)) | 41 | if (GPIO1_DR & (1 << 30)) |
42 | { | 42 | { |
43 | imx31_regclr32(&GPIO3_DR, (1 << 16)); /* Reset ISP1504 */ | 43 | bitclr32(&GPIO3_DR, (1 << 16)); /* Reset ISP1504 */ |
44 | sleep(HZ/100); | 44 | sleep(HZ/100); |
45 | imx31_regset32(&GPIO3_DR, (1 << 16)); | 45 | bitset32(&GPIO3_DR, (1 << 16)); |
46 | sleep(HZ/10); | 46 | sleep(HZ/10); |
47 | imx31_regclr32(&GPIO1_DR, (1 << 30)); /* Select ISP1504 */ | 47 | bitclr32(&GPIO1_DR, (1 << 30)); /* Select ISP1504 */ |
48 | } | 48 | } |
49 | } | 49 | } |
50 | else | 50 | else |
51 | { | 51 | { |
52 | imx31_regset32(&GPIO1_DR, (1 << 30)); /* Deselect ISP1504 */ | 52 | bitset32(&GPIO1_DR, (1 << 30)); /* Deselect ISP1504 */ |
53 | } | 53 | } |
54 | } | 54 | } |
55 | 55 | ||