Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 2 insertions, 2 deletions

diff --git a/firmware/target/arm/imx31/gigabeat-s/lcd-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/lcd-gigabeat-s.c
index cadd0e7ae8..cd583ecd6b 100644
--- a/firmware/target/arm/imx31/gigabeat-s/lcd-gigabeat-s.c
+++ b/firmware/target/arm/imx31/gigabeat-s/lcd-gigabeat-s.c
@@ -133,13 +133,13 @@ static void lcd_set_power(bool powered)
         lcd_powered = false;
         lcd_write_reg(0x04, 0x00);
         lcd_enable_interface(false);
-        imx31_regclr32(&GPIO3_DR, (1 << 12));
+        bitclr32(&GPIO3_DR, (1 << 12));
         mc13783_clear(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
     }
     else
     {
         mc13783_set(MC13783_REGULATOR_MODE1, MC13783_VCAMEN);
-        imx31_regset32(&GPIO3_DR, (1 << 12));
+        bitset32(&GPIO3_DR, (1 << 12));
         lcd_enable_interface(true);
         lcd_write_reg(0x04, 0x01);
         lcd_powered = true;