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authorAmaury Pouly <amaury.pouly@gmail.com>2013-06-13 19:03:33 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-06-15 22:27:34 +0200
commit017667c2dc9843eb5082e991f421c773636dcf36 (patch)
tree60432008dd3bc012ac60cbfa771305f6d894dd84 /firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h
parent97b9ade63945fd8b8261fb0cf1dd0aa225c1a319 (diff)
downloadrockbox-017667c2dc9843eb5082e991f421c773636dcf36.tar.gz
rockbox-017667c2dc9843eb5082e991f421c773636dcf36.zip
imx233: generate register headers for stmp3600, stmp3700 and imx233
Change-Id: Ia87086f4f4f4ecbb844ffd869407b14ea2509934
Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h')
-rw-r--r--firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h387
1 files changed, 387 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h b/firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h
new file mode 100644
index 0000000000..e84274169e
--- /dev/null
+++ b/firmware/target/arm/imx233/regs/stmp3700/regs-ecc8.h
@@ -0,0 +1,387 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * This file was automatically generated by headergen, DO NOT EDIT it.
9 * headergen version: 2.1.7
10 * XML versions: stmp3700:3.2.0
11 *
12 * Copyright (C) 2013 by Amaury Pouly
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23#ifndef __HEADERGEN__STMP3700__ECC8__H__
24#define __HEADERGEN__STMP3700__ECC8__H__
25
26#define REGS_ECC8_BASE (0x80008000)
27
28#define REGS_ECC8_VERSION "3.2.0"
29
30/**
31 * Register: HW_ECC8_CTRL
32 * Address: 0
33 * SCT: yes
34*/
35#define HW_ECC8_CTRL (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x0 + 0x0))
36#define HW_ECC8_CTRL_SET (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x0 + 0x4))
37#define HW_ECC8_CTRL_CLR (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x0 + 0x8))
38#define HW_ECC8_CTRL_TOG (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x0 + 0xc))
39#define BP_ECC8_CTRL_SFTRST 31
40#define BM_ECC8_CTRL_SFTRST 0x80000000
41#define BV_ECC8_CTRL_SFTRST__RUN 0x0
42#define BV_ECC8_CTRL_SFTRST__RESET 0x1
43#define BF_ECC8_CTRL_SFTRST(v) (((v) << 31) & 0x80000000)
44#define BF_ECC8_CTRL_SFTRST_V(v) ((BV_ECC8_CTRL_SFTRST__##v << 31) & 0x80000000)
45#define BP_ECC8_CTRL_CLKGATE 30
46#define BM_ECC8_CTRL_CLKGATE 0x40000000
47#define BV_ECC8_CTRL_CLKGATE__RUN 0x0
48#define BV_ECC8_CTRL_CLKGATE__NO_CLKS 0x1
49#define BF_ECC8_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000)
50#define BF_ECC8_CTRL_CLKGATE_V(v) ((BV_ECC8_CTRL_CLKGATE__##v << 30) & 0x40000000)
51#define BP_ECC8_CTRL_AHBM_SFTRST 29
52#define BM_ECC8_CTRL_AHBM_SFTRST 0x20000000
53#define BV_ECC8_CTRL_AHBM_SFTRST__RUN 0x0
54#define BV_ECC8_CTRL_AHBM_SFTRST__RESET 0x1
55#define BF_ECC8_CTRL_AHBM_SFTRST(v) (((v) << 29) & 0x20000000)
56#define BF_ECC8_CTRL_AHBM_SFTRST_V(v) ((BV_ECC8_CTRL_AHBM_SFTRST__##v << 29) & 0x20000000)
57#define BP_ECC8_CTRL_THROTTLE 24
58#define BM_ECC8_CTRL_THROTTLE 0xf000000
59#define BF_ECC8_CTRL_THROTTLE(v) (((v) << 24) & 0xf000000)
60#define BP_ECC8_CTRL_DEBUG_STALL_IRQ_EN 10
61#define BM_ECC8_CTRL_DEBUG_STALL_IRQ_EN 0x400
62#define BF_ECC8_CTRL_DEBUG_STALL_IRQ_EN(v) (((v) << 10) & 0x400)
63#define BP_ECC8_CTRL_DEBUG_WRITE_IRQ_EN 9
64#define BM_ECC8_CTRL_DEBUG_WRITE_IRQ_EN 0x200
65#define BF_ECC8_CTRL_DEBUG_WRITE_IRQ_EN(v) (((v) << 9) & 0x200)
66#define BP_ECC8_CTRL_COMPLETE_IRQ_EN 8
67#define BM_ECC8_CTRL_COMPLETE_IRQ_EN 0x100
68#define BF_ECC8_CTRL_COMPLETE_IRQ_EN(v) (((v) << 8) & 0x100)
69#define BP_ECC8_CTRL_BM_ERROR_IRQ 3
70#define BM_ECC8_CTRL_BM_ERROR_IRQ 0x8
71#define BF_ECC8_CTRL_BM_ERROR_IRQ(v) (((v) << 3) & 0x8)
72#define BP_ECC8_CTRL_DEBUG_STALL_IRQ 2
73#define BM_ECC8_CTRL_DEBUG_STALL_IRQ 0x4
74#define BF_ECC8_CTRL_DEBUG_STALL_IRQ(v) (((v) << 2) & 0x4)
75#define BP_ECC8_CTRL_DEBUG_WRITE_IRQ 1
76#define BM_ECC8_CTRL_DEBUG_WRITE_IRQ 0x2
77#define BF_ECC8_CTRL_DEBUG_WRITE_IRQ(v) (((v) << 1) & 0x2)
78#define BP_ECC8_CTRL_COMPLETE_IRQ 0
79#define BM_ECC8_CTRL_COMPLETE_IRQ 0x1
80#define BF_ECC8_CTRL_COMPLETE_IRQ(v) (((v) << 0) & 0x1)
81
82/**
83 * Register: HW_ECC8_STATUS0
84 * Address: 0x10
85 * SCT: no
86*/
87#define HW_ECC8_STATUS0 (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x10))
88#define BP_ECC8_STATUS0_HANDLE 16
89#define BM_ECC8_STATUS0_HANDLE 0xffff0000
90#define BF_ECC8_STATUS0_HANDLE(v) (((v) << 16) & 0xffff0000)
91#define BP_ECC8_STATUS0_RS8ECC_ENC_PRESENT 15
92#define BM_ECC8_STATUS0_RS8ECC_ENC_PRESENT 0x8000
93#define BF_ECC8_STATUS0_RS8ECC_ENC_PRESENT(v) (((v) << 15) & 0x8000)
94#define BP_ECC8_STATUS0_RS8ECC_DEC_PRESENT 14
95#define BM_ECC8_STATUS0_RS8ECC_DEC_PRESENT 0x4000
96#define BF_ECC8_STATUS0_RS8ECC_DEC_PRESENT(v) (((v) << 14) & 0x4000)
97#define BP_ECC8_STATUS0_RS4ECC_ENC_PRESENT 13
98#define BM_ECC8_STATUS0_RS4ECC_ENC_PRESENT 0x2000
99#define BF_ECC8_STATUS0_RS4ECC_ENC_PRESENT(v) (((v) << 13) & 0x2000)
100#define BP_ECC8_STATUS0_RS4ECC_DEC_PRESENT 12
101#define BM_ECC8_STATUS0_RS4ECC_DEC_PRESENT 0x1000
102#define BF_ECC8_STATUS0_RS4ECC_DEC_PRESENT(v) (((v) << 12) & 0x1000)
103#define BP_ECC8_STATUS0_STATUS_AUX 8
104#define BM_ECC8_STATUS0_STATUS_AUX 0xf00
105#define BV_ECC8_STATUS0_STATUS_AUX__NO_ERRORS 0x0
106#define BV_ECC8_STATUS0_STATUS_AUX__ONE_CORRECTABLE 0x1
107#define BV_ECC8_STATUS0_STATUS_AUX__TWO_CORRECTABLE 0x2
108#define BV_ECC8_STATUS0_STATUS_AUX__THREE_CORRECTABLE 0x3
109#define BV_ECC8_STATUS0_STATUS_AUX__FOUR_CORRECTABLE 0x4
110#define BV_ECC8_STATUS0_STATUS_AUX__NOT_CHECKED 0xc
111#define BV_ECC8_STATUS0_STATUS_AUX__UNCORRECTABLE 0xe
112#define BV_ECC8_STATUS0_STATUS_AUX__ALL_ONES 0xf
113#define BF_ECC8_STATUS0_STATUS_AUX(v) (((v) << 8) & 0xf00)
114#define BF_ECC8_STATUS0_STATUS_AUX_V(v) ((BV_ECC8_STATUS0_STATUS_AUX__##v << 8) & 0xf00)
115#define BP_ECC8_STATUS0_ALLONES 4
116#define BM_ECC8_STATUS0_ALLONES 0x10
117#define BF_ECC8_STATUS0_ALLONES(v) (((v) << 4) & 0x10)
118#define BP_ECC8_STATUS0_CORRECTED 3
119#define BM_ECC8_STATUS0_CORRECTED 0x8
120#define BF_ECC8_STATUS0_CORRECTED(v) (((v) << 3) & 0x8)
121#define BP_ECC8_STATUS0_UNCORRECTABLE 2
122#define BM_ECC8_STATUS0_UNCORRECTABLE 0x4
123#define BF_ECC8_STATUS0_UNCORRECTABLE(v) (((v) << 2) & 0x4)
124#define BP_ECC8_STATUS0_COMPLETED_CE 0
125#define BM_ECC8_STATUS0_COMPLETED_CE 0x3
126#define BF_ECC8_STATUS0_COMPLETED_CE(v) (((v) << 0) & 0x3)
127
128/**
129 * Register: HW_ECC8_STATUS1
130 * Address: 0x20
131 * SCT: no
132*/
133#define HW_ECC8_STATUS1 (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x20))
134#define BP_ECC8_STATUS1_STATUS_PAYLOAD7 28
135#define BM_ECC8_STATUS1_STATUS_PAYLOAD7 0xf0000000
136#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__NO_ERRORS 0x0
137#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__ONE_CORRECTABLE 0x1
138#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__TWO_CORRECTABLE 0x2
139#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__THREE_CORRECTABLE 0x3
140#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__FOUR_CORRECTABLE 0x4
141#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__FIVE_CORRECTABLE 0x5
142#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__SIX_CORRECTABLE 0x6
143#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__SEVEN_CORRECTABLE 0x7
144#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__EIGHT_CORRECTABLE 0x8
145#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__NOT_CHECKED 0xc
146#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__UNCORRECTABLE 0xe
147#define BV_ECC8_STATUS1_STATUS_PAYLOAD7__ALL_ONES 0xf
148#define BF_ECC8_STATUS1_STATUS_PAYLOAD7(v) (((v) << 28) & 0xf0000000)
149#define BF_ECC8_STATUS1_STATUS_PAYLOAD7_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD7__##v << 28) & 0xf0000000)
150#define BP_ECC8_STATUS1_STATUS_PAYLOAD6 24
151#define BM_ECC8_STATUS1_STATUS_PAYLOAD6 0xf000000
152#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__NO_ERRORS 0x0
153#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__ONE_CORRECTABLE 0x1
154#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__TWO_CORRECTABLE 0x2
155#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__THREE_CORRECTABLE 0x3
156#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__FOUR_CORRECTABLE 0x4
157#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__FIVE_CORRECTABLE 0x5
158#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__SIX_CORRECTABLE 0x6
159#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__SEVEN_CORRECTABLE 0x7
160#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__EIGHT_CORRECTABLE 0x8
161#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__NOT_CHECKED 0xc
162#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__UNCORRECTABLE 0xe
163#define BV_ECC8_STATUS1_STATUS_PAYLOAD6__ALL_ONES 0xf
164#define BF_ECC8_STATUS1_STATUS_PAYLOAD6(v) (((v) << 24) & 0xf000000)
165#define BF_ECC8_STATUS1_STATUS_PAYLOAD6_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD6__##v << 24) & 0xf000000)
166#define BP_ECC8_STATUS1_STATUS_PAYLOAD5 20
167#define BM_ECC8_STATUS1_STATUS_PAYLOAD5 0xf00000
168#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__NO_ERRORS 0x0
169#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__ONE_CORRECTABLE 0x1
170#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__TWO_CORRECTABLE 0x2
171#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__THREE_CORRECTABLE 0x3
172#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__FOUR_CORRECTABLE 0x4
173#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__FIVE_CORRECTABLE 0x5
174#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__SIX_CORRECTABLE 0x6
175#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__SEVEN_CORRECTABLE 0x7
176#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__EIGHT_CORRECTABLE 0x8
177#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__NOT_CHECKED 0xc
178#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__UNCORRECTABLE 0xe
179#define BV_ECC8_STATUS1_STATUS_PAYLOAD5__ALL_ONES 0xf
180#define BF_ECC8_STATUS1_STATUS_PAYLOAD5(v) (((v) << 20) & 0xf00000)
181#define BF_ECC8_STATUS1_STATUS_PAYLOAD5_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD5__##v << 20) & 0xf00000)
182#define BP_ECC8_STATUS1_STATUS_PAYLOAD4 16
183#define BM_ECC8_STATUS1_STATUS_PAYLOAD4 0xf0000
184#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__NO_ERRORS 0x0
185#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__ONE_CORRECTABLE 0x1
186#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__TWO_CORRECTABLE 0x2
187#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__THREE_CORRECTABLE 0x3
188#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__FOUR_CORRECTABLE 0x4
189#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__FIVE_CORRECTABLE 0x5
190#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__SIX_CORRECTABLE 0x6
191#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__SEVEN_CORRECTABLE 0x7
192#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__EIGHT_CORRECTABLE 0x8
193#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__NOT_CHECKED 0xc
194#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__UNCORRECTABLE 0xe
195#define BV_ECC8_STATUS1_STATUS_PAYLOAD4__ALL_ONES 0xf
196#define BF_ECC8_STATUS1_STATUS_PAYLOAD4(v) (((v) << 16) & 0xf0000)
197#define BF_ECC8_STATUS1_STATUS_PAYLOAD4_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD4__##v << 16) & 0xf0000)
198#define BP_ECC8_STATUS1_STATUS_PAYLOAD3 12
199#define BM_ECC8_STATUS1_STATUS_PAYLOAD3 0xf000
200#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__NO_ERRORS 0x0
201#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__ONE_CORRECTABLE 0x1
202#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__TWO_CORRECTABLE 0x2
203#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__THREE_CORRECTABLE 0x3
204#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__FOUR_CORRECTABLE 0x4
205#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__FIVE_CORRECTABLE 0x5
206#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__SIX_CORRECTABLE 0x6
207#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__SEVEN_CORRECTABLE 0x7
208#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__EIGHT_CORRECTABLE 0x8
209#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__NOT_CHECKED 0xc
210#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__UNCORRECTABLE 0xe
211#define BV_ECC8_STATUS1_STATUS_PAYLOAD3__ALL_ONES 0xf
212#define BF_ECC8_STATUS1_STATUS_PAYLOAD3(v) (((v) << 12) & 0xf000)
213#define BF_ECC8_STATUS1_STATUS_PAYLOAD3_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD3__##v << 12) & 0xf000)
214#define BP_ECC8_STATUS1_STATUS_PAYLOAD2 8
215#define BM_ECC8_STATUS1_STATUS_PAYLOAD2 0xf00
216#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__NO_ERRORS 0x0
217#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__ONE_CORRECTABLE 0x1
218#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__TWO_CORRECTABLE 0x2
219#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__THREE_CORRECTABLE 0x3
220#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__FOUR_CORRECTABLE 0x4
221#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__FIVE_CORRECTABLE 0x5
222#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__SIX_CORRECTABLE 0x6
223#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__SEVEN_CORRECTABLE 0x7
224#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__EIGHT_CORRECTABLE 0x8
225#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__NOT_CHECKED 0xc
226#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__UNCORRECTABLE 0xe
227#define BV_ECC8_STATUS1_STATUS_PAYLOAD2__ALL_ONES 0xf
228#define BF_ECC8_STATUS1_STATUS_PAYLOAD2(v) (((v) << 8) & 0xf00)
229#define BF_ECC8_STATUS1_STATUS_PAYLOAD2_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD2__##v << 8) & 0xf00)
230#define BP_ECC8_STATUS1_STATUS_PAYLOAD1 4
231#define BM_ECC8_STATUS1_STATUS_PAYLOAD1 0xf0
232#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__NO_ERRORS 0x0
233#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__ONE_CORRECTABLE 0x1
234#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__TWO_CORRECTABLE 0x2
235#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__THREE_CORRECTABLE 0x3
236#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__FOUR_CORRECTABLE 0x4
237#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__FIVE_CORRECTABLE 0x5
238#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__SIX_CORRECTABLE 0x6
239#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__SEVEN_CORRECTABLE 0x7
240#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__EIGHT_CORRECTABLE 0x8
241#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__NOT_CHECKED 0xc
242#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__UNCORRECTABLE 0xe
243#define BV_ECC8_STATUS1_STATUS_PAYLOAD1__ALL_ONES 0xf
244#define BF_ECC8_STATUS1_STATUS_PAYLOAD1(v) (((v) << 4) & 0xf0)
245#define BF_ECC8_STATUS1_STATUS_PAYLOAD1_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD1__##v << 4) & 0xf0)
246#define BP_ECC8_STATUS1_STATUS_PAYLOAD0 0
247#define BM_ECC8_STATUS1_STATUS_PAYLOAD0 0xf
248#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__NO_ERRORS 0x0
249#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__ONE_CORRECTABLE 0x1
250#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__TWO_CORRECTABLE 0x2
251#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__THREE_CORRECTABLE 0x3
252#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__FOUR_CORRECTABLE 0x4
253#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__FIVE_CORRECTABLE 0x5
254#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__SIX_CORRECTABLE 0x6
255#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__SEVEN_CORRECTABLE 0x7
256#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__EIGHT_CORRECTABLE 0x8
257#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__NOT_CHECKED 0xc
258#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__UNCORRECTABLE 0xe
259#define BV_ECC8_STATUS1_STATUS_PAYLOAD0__ALL_ONES 0xf
260#define BF_ECC8_STATUS1_STATUS_PAYLOAD0(v) (((v) << 0) & 0xf)
261#define BF_ECC8_STATUS1_STATUS_PAYLOAD0_V(v) ((BV_ECC8_STATUS1_STATUS_PAYLOAD0__##v << 0) & 0xf)
262
263/**
264 * Register: HW_ECC8_DEBUG0
265 * Address: 0x30
266 * SCT: yes
267*/
268#define HW_ECC8_DEBUG0 (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x30 + 0x0))
269#define HW_ECC8_DEBUG0_SET (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x30 + 0x4))
270#define HW_ECC8_DEBUG0_CLR (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x30 + 0x8))
271#define HW_ECC8_DEBUG0_TOG (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x30 + 0xc))
272#define BP_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 16
273#define BM_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL 0x1ff0000
274#define BV_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__NORMAL 0x0
275#define BV_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__TEST_MODE 0x1
276#define BF_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL(v) (((v) << 16) & 0x1ff0000)
277#define BF_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_V(v) ((BV_ECC8_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL__##v << 16) & 0x1ff0000)
278#define BP_ECC8_DEBUG0_KES_DEBUG_SHIFT_SYND 15
279#define BM_ECC8_DEBUG0_KES_DEBUG_SHIFT_SYND 0x8000
280#define BF_ECC8_DEBUG0_KES_DEBUG_SHIFT_SYND(v) (((v) << 15) & 0x8000)
281#define BP_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG 14
282#define BM_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG 0x4000
283#define BV_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__DATA 0x1
284#define BV_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__AUX 0x1
285#define BF_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG(v) (((v) << 14) & 0x4000)
286#define BF_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG_V(v) ((BV_ECC8_DEBUG0_KES_DEBUG_PAYLOAD_FLAG__##v << 14) & 0x4000)
287#define BP_ECC8_DEBUG0_KES_DEBUG_MODE4K 13
288#define BM_ECC8_DEBUG0_KES_DEBUG_MODE4K 0x2000
289#define BV_ECC8_DEBUG0_KES_DEBUG_MODE4K__4k 0x1
290#define BV_ECC8_DEBUG0_KES_DEBUG_MODE4K__2k 0x1
291#define BF_ECC8_DEBUG0_KES_DEBUG_MODE4K(v) (((v) << 13) & 0x2000)
292#define BF_ECC8_DEBUG0_KES_DEBUG_MODE4K_V(v) ((BV_ECC8_DEBUG0_KES_DEBUG_MODE4K__##v << 13) & 0x2000)
293#define BP_ECC8_DEBUG0_KES_DEBUG_KICK 12
294#define BM_ECC8_DEBUG0_KES_DEBUG_KICK 0x1000
295#define BF_ECC8_DEBUG0_KES_DEBUG_KICK(v) (((v) << 12) & 0x1000)
296#define BP_ECC8_DEBUG0_KES_STANDALONE 11
297#define BM_ECC8_DEBUG0_KES_STANDALONE 0x800
298#define BV_ECC8_DEBUG0_KES_STANDALONE__NORMAL 0x0
299#define BV_ECC8_DEBUG0_KES_STANDALONE__TEST_MODE 0x1
300#define BF_ECC8_DEBUG0_KES_STANDALONE(v) (((v) << 11) & 0x800)
301#define BF_ECC8_DEBUG0_KES_STANDALONE_V(v) ((BV_ECC8_DEBUG0_KES_STANDALONE__##v << 11) & 0x800)
302#define BP_ECC8_DEBUG0_KES_DEBUG_STEP 10
303#define BM_ECC8_DEBUG0_KES_DEBUG_STEP 0x400
304#define BF_ECC8_DEBUG0_KES_DEBUG_STEP(v) (((v) << 10) & 0x400)
305#define BP_ECC8_DEBUG0_KES_DEBUG_STALL 9
306#define BM_ECC8_DEBUG0_KES_DEBUG_STALL 0x200
307#define BV_ECC8_DEBUG0_KES_DEBUG_STALL__NORMAL 0x0
308#define BV_ECC8_DEBUG0_KES_DEBUG_STALL__WAIT 0x1
309#define BF_ECC8_DEBUG0_KES_DEBUG_STALL(v) (((v) << 9) & 0x200)
310#define BF_ECC8_DEBUG0_KES_DEBUG_STALL_V(v) ((BV_ECC8_DEBUG0_KES_DEBUG_STALL__##v << 9) & 0x200)
311#define BP_ECC8_DEBUG0_BM_KES_TEST_BYPASS 8
312#define BM_ECC8_DEBUG0_BM_KES_TEST_BYPASS 0x100
313#define BV_ECC8_DEBUG0_BM_KES_TEST_BYPASS__NORMAL 0x0
314#define BV_ECC8_DEBUG0_BM_KES_TEST_BYPASS__TEST_MODE 0x1
315#define BF_ECC8_DEBUG0_BM_KES_TEST_BYPASS(v) (((v) << 8) & 0x100)
316#define BF_ECC8_DEBUG0_BM_KES_TEST_BYPASS_V(v) ((BV_ECC8_DEBUG0_BM_KES_TEST_BYPASS__##v << 8) & 0x100)
317#define BP_ECC8_DEBUG0_DEBUG_REG_SELECT 0
318#define BM_ECC8_DEBUG0_DEBUG_REG_SELECT 0x3f
319#define BF_ECC8_DEBUG0_DEBUG_REG_SELECT(v) (((v) << 0) & 0x3f)
320
321/**
322 * Register: HW_ECC8_DBGKESREAD
323 * Address: 0x40
324 * SCT: no
325*/
326#define HW_ECC8_DBGKESREAD (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x40))
327#define BP_ECC8_DBGKESREAD_VALUES 0
328#define BM_ECC8_DBGKESREAD_VALUES 0xffffffff
329#define BF_ECC8_DBGKESREAD_VALUES(v) (((v) << 0) & 0xffffffff)
330
331/**
332 * Register: HW_ECC8_DBGCSFEREAD
333 * Address: 0x50
334 * SCT: no
335*/
336#define HW_ECC8_DBGCSFEREAD (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x50))
337#define BP_ECC8_DBGCSFEREAD_VALUES 0
338#define BM_ECC8_DBGCSFEREAD_VALUES 0xffffffff
339#define BF_ECC8_DBGCSFEREAD_VALUES(v) (((v) << 0) & 0xffffffff)
340
341/**
342 * Register: HW_ECC8_DBGSYNDGENREAD
343 * Address: 0x60
344 * SCT: no
345*/
346#define HW_ECC8_DBGSYNDGENREAD (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x60))
347#define BP_ECC8_DBGSYNDGENREAD_VALUES 0
348#define BM_ECC8_DBGSYNDGENREAD_VALUES 0xffffffff
349#define BF_ECC8_DBGSYNDGENREAD_VALUES(v) (((v) << 0) & 0xffffffff)
350
351/**
352 * Register: HW_ECC8_DBGAHBMREAD
353 * Address: 0x70
354 * SCT: no
355*/
356#define HW_ECC8_DBGAHBMREAD (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x70))
357#define BP_ECC8_DBGAHBMREAD_VALUES 0
358#define BM_ECC8_DBGAHBMREAD_VALUES 0xffffffff
359#define BF_ECC8_DBGAHBMREAD_VALUES(v) (((v) << 0) & 0xffffffff)
360
361/**
362 * Register: HW_ECC8_BLOCKNAME
363 * Address: 0x80
364 * SCT: no
365*/
366#define HW_ECC8_BLOCKNAME (*(volatile unsigned long *)(REGS_ECC8_BASE + 0x80))
367#define BP_ECC8_BLOCKNAME_NAME 0
368#define BM_ECC8_BLOCKNAME_NAME 0xffffffff
369#define BF_ECC8_BLOCKNAME_NAME(v) (((v) << 0) & 0xffffffff)
370
371/**
372 * Register: HW_ECC8_VERSION
373 * Address: 0xa0
374 * SCT: no
375*/
376#define HW_ECC8_VERSION (*(volatile unsigned long *)(REGS_ECC8_BASE + 0xa0))
377#define BP_ECC8_VERSION_MAJOR 24
378#define BM_ECC8_VERSION_MAJOR 0xff000000
379#define BF_ECC8_VERSION_MAJOR(v) (((v) << 24) & 0xff000000)
380#define BP_ECC8_VERSION_MINOR 16
381#define BM_ECC8_VERSION_MINOR 0xff0000
382#define BF_ECC8_VERSION_MINOR(v) (((v) << 16) & 0xff0000)
383#define BP_ECC8_VERSION_STEP 0
384#define BM_ECC8_VERSION_STEP 0xffff
385#define BF_ECC8_VERSION_STEP(v) (((v) << 0) & 0xffff)
386
387#endif /* __HEADERGEN__STMP3700__ECC8__H__ */