imx233: generate register headers for stmp3600, stmp3700 and imx233

Change-Id: Ia87086f4f4f4ecbb844ffd869407b14ea2509934

1 files changed, 304 insertions, 0 deletions

diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-rtc.h b/firmware/target/arm/imx233/regs/stmp3600/regs-rtc.h
new file mode 100644
index 0000000000..8661e75706
--- /dev/null
+++ b/firmware/target/arm/imx233/regs/stmp3600/regs-rtc.h
@@ -0,0 +1,304 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * This file was automatically generated by headergen, DO NOT EDIT it.
+ * headergen version: 2.1.7
+ * XML versions: stmp3600:2.3.0
+ *
+ * Copyright (C) 2013 by Amaury Pouly
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __HEADERGEN__STMP3600__RTC__H__
+#define __HEADERGEN__STMP3600__RTC__H__
+
+#define REGS_RTC_BASE (0x8005c000)
+
+#define REGS_RTC_VERSION "2.3.0"
+
+/**
+ * Register: HW_RTC_CTRL
+ * Address: 0
+ * SCT: yes
+*/
+#define HW_RTC_CTRL                                 (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x0))
+#define HW_RTC_CTRL_SET                             (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x4))
+#define HW_RTC_CTRL_CLR                             (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x8))
+#define HW_RTC_CTRL_TOG                             (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0xc))
+#define BP_RTC_CTRL_SFTRST                          31
+#define BM_RTC_CTRL_SFTRST                          0x80000000
+#define BF_RTC_CTRL_SFTRST(v)                       (((v) << 31) & 0x80000000)
+#define BP_RTC_CTRL_CLKGATE                         30
+#define BM_RTC_CTRL_CLKGATE                         0x40000000
+#define BF_RTC_CTRL_CLKGATE(v)                      (((v) << 30) & 0x40000000)
+#define BP_RTC_CTRL_CLKDIV                          24
+#define BM_RTC_CTRL_CLKDIV                          0xf000000
+#define BF_RTC_CTRL_CLKDIV(v)                       (((v) << 24) & 0xf000000)
+#define BP_RTC_CTRL_SUPPRESS_COPY2ANALOG            6
+#define BM_RTC_CTRL_SUPPRESS_COPY2ANALOG            0x40
+#define BV_RTC_CTRL_SUPPRESS_COPY2ANALOG__NORMAL    0x0
+#define BV_RTC_CTRL_SUPPRESS_COPY2ANALOG__NO_COPY   0x1
+#define BF_RTC_CTRL_SUPPRESS_COPY2ANALOG(v)         (((v) << 6) & 0x40)
+#define BF_RTC_CTRL_SUPPRESS_COPY2ANALOG_V(v)       ((BV_RTC_CTRL_SUPPRESS_COPY2ANALOG__##v << 6) & 0x40)
+#define BP_RTC_CTRL_FORCE_UPDATE                    5
+#define BM_RTC_CTRL_FORCE_UPDATE                    0x20
+#define BV_RTC_CTRL_FORCE_UPDATE__NORMAL            0x0
+#define BV_RTC_CTRL_FORCE_UPDATE__FORCE_COPY        0x1
+#define BF_RTC_CTRL_FORCE_UPDATE(v)                 (((v) << 5) & 0x20)
+#define BF_RTC_CTRL_FORCE_UPDATE_V(v)               ((BV_RTC_CTRL_FORCE_UPDATE__##v << 5) & 0x20)
+#define BP_RTC_CTRL_WATCHDOGEN                      4
+#define BM_RTC_CTRL_WATCHDOGEN                      0x10
+#define BF_RTC_CTRL_WATCHDOGEN(v)                   (((v) << 4) & 0x10)
+#define BP_RTC_CTRL_ONEMSEC_IRQ                     3
+#define BM_RTC_CTRL_ONEMSEC_IRQ                     0x8
+#define BF_RTC_CTRL_ONEMSEC_IRQ(v)                  (((v) << 3) & 0x8)
+#define BP_RTC_CTRL_ALARM_IRQ                       2
+#define BM_RTC_CTRL_ALARM_IRQ                       0x4
+#define BF_RTC_CTRL_ALARM_IRQ(v)                    (((v) << 2) & 0x4)
+#define BP_RTC_CTRL_ONEMSEC_IRQ_EN                  1
+#define BM_RTC_CTRL_ONEMSEC_IRQ_EN                  0x2
+#define BF_RTC_CTRL_ONEMSEC_IRQ_EN(v)               (((v) << 1) & 0x2)
+#define BP_RTC_CTRL_ALARM_IRQ_EN                    0
+#define BM_RTC_CTRL_ALARM_IRQ_EN                    0x1
+#define BF_RTC_CTRL_ALARM_IRQ_EN(v)                 (((v) << 0) & 0x1)
+
+/**
+ * Register: HW_RTC_STAT
+ * Address: 0x10
+ * SCT: no
+*/
+#define HW_RTC_STAT                         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x10))
+#define BP_RTC_STAT_RTC_PRESENT             31
+#define BM_RTC_STAT_RTC_PRESENT             0x80000000
+#define BF_RTC_STAT_RTC_PRESENT(v)          (((v) << 31) & 0x80000000)
+#define BP_RTC_STAT_ALARM_PRESENT           30
+#define BM_RTC_STAT_ALARM_PRESENT           0x40000000
+#define BF_RTC_STAT_ALARM_PRESENT(v)        (((v) << 30) & 0x40000000)
+#define BP_RTC_STAT_WATCHDOG_PRESENT        29
+#define BM_RTC_STAT_WATCHDOG_PRESENT        0x20000000
+#define BF_RTC_STAT_WATCHDOG_PRESENT(v)     (((v) << 29) & 0x20000000)
+#define BP_RTC_STAT_XTAL32768_PRESENT       28
+#define BM_RTC_STAT_XTAL32768_PRESENT       0x10000000
+#define BF_RTC_STAT_XTAL32768_PRESENT(v)    (((v) << 28) & 0x10000000)
+#define BP_RTC_STAT_STALE_REGS              16
+#define BM_RTC_STAT_STALE_REGS              0x3f0000
+#define BF_RTC_STAT_STALE_REGS(v)           (((v) << 16) & 0x3f0000)
+#define BP_RTC_STAT_NEW_REGS                8
+#define BM_RTC_STAT_NEW_REGS                0x3f00
+#define BF_RTC_STAT_NEW_REGS(v)             (((v) << 8) & 0x3f00)
+#define BP_RTC_STAT_FUSE_UNLOCK             1
+#define BM_RTC_STAT_FUSE_UNLOCK             0x2
+#define BF_RTC_STAT_FUSE_UNLOCK(v)          (((v) << 1) & 0x2)
+#define BP_RTC_STAT_FUSE_DONE               0
+#define BM_RTC_STAT_FUSE_DONE               0x1
+#define BF_RTC_STAT_FUSE_DONE(v)            (((v) << 0) & 0x1)
+
+/**
+ * Register: HW_RTC_MILLISECONDS
+ * Address: 0x20
+ * SCT: yes
+*/
+#define HW_RTC_MILLISECONDS             (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x0))
+#define HW_RTC_MILLISECONDS_SET         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x4))
+#define HW_RTC_MILLISECONDS_CLR         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x8))
+#define HW_RTC_MILLISECONDS_TOG         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0xc))
+#define BP_RTC_MILLISECONDS_COUNT       0
+#define BM_RTC_MILLISECONDS_COUNT       0xffffffff
+#define BF_RTC_MILLISECONDS_COUNT(v)    (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_SECONDS
+ * Address: 0x30
+ * SCT: yes
+*/
+#define HW_RTC_SECONDS          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x0))
+#define HW_RTC_SECONDS_SET      (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x4))
+#define HW_RTC_SECONDS_CLR      (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x8))
+#define HW_RTC_SECONDS_TOG      (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0xc))
+#define BP_RTC_SECONDS_COUNT    0
+#define BM_RTC_SECONDS_COUNT    0xffffffff
+#define BF_RTC_SECONDS_COUNT(v) (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_ALARM
+ * Address: 0x40
+ * SCT: yes
+*/
+#define HW_RTC_ALARM            (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x0))
+#define HW_RTC_ALARM_SET        (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x4))
+#define HW_RTC_ALARM_CLR        (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x8))
+#define HW_RTC_ALARM_TOG        (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0xc))
+#define BP_RTC_ALARM_VALUE      0
+#define BM_RTC_ALARM_VALUE      0xffffffff
+#define BF_RTC_ALARM_VALUE(v)   (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_WATCHDOG
+ * Address: 0x50
+ * SCT: yes
+*/
+#define HW_RTC_WATCHDOG             (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x0))
+#define HW_RTC_WATCHDOG_SET         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x4))
+#define HW_RTC_WATCHDOG_CLR         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x8))
+#define HW_RTC_WATCHDOG_TOG         (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0xc))
+#define BP_RTC_WATCHDOG_COUNT       0
+#define BM_RTC_WATCHDOG_COUNT       0xffffffff
+#define BF_RTC_WATCHDOG_COUNT(v)    (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_PERSISTENT0
+ * Address: 0x60
+ * SCT: yes
+*/
+#define HW_RTC_PERSISTENT0                                  (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x0))
+#define HW_RTC_PERSISTENT0_SET                              (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x4))
+#define HW_RTC_PERSISTENT0_CLR                              (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x8))
+#define HW_RTC_PERSISTENT0_TOG                              (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0xc))
+#define BP_RTC_PERSISTENT0_GENERAL                          16
+#define BM_RTC_PERSISTENT0_GENERAL                          0xffff0000
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_BOOT              0x8000
+#define BV_RTC_PERSISTENT0_GENERAL__ENUMERATE_500MA_TWICE   0x4000
+#define BV_RTC_PERSISTENT0_GENERAL__USB_BOOT_PLAYER_MODE    0x2000
+#define BV_RTC_PERSISTENT0_GENERAL__SKIP_CHECKDISK          0x1000
+#define BV_RTC_PERSISTENT0_GENERAL__USB_LOW_POWER_MODE      0x800
+#define BV_RTC_PERSISTENT0_GENERAL__OTG_HNP_BIT             0x400
+#define BV_RTC_PERSISTENT0_GENERAL__OTG_ATL_ROLE_BIT        0x200
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_CS_HI             0x100
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_CS_LO             0x80
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_NDX_3             0x40
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_NDX_2             0x20
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_NDX_1             0x10
+#define BV_RTC_PERSISTENT0_GENERAL__SDRAM_NDX_0             0x8
+#define BV_RTC_PERSISTENT0_GENERAL__ETM_ENABLE              0x4
+#define BF_RTC_PERSISTENT0_GENERAL(v)                       (((v) << 16) & 0xffff0000)
+#define BF_RTC_PERSISTENT0_GENERAL_V(v)                     ((BV_RTC_PERSISTENT0_GENERAL__##v << 16) & 0xffff0000)
+#define BP_RTC_PERSISTENT0_DCDC_CTRL                        6
+#define BM_RTC_PERSISTENT0_DCDC_CTRL                        0xffc0
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__SD_PRESENT            0x200
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__LOWBAT_3P0            0x100
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__SELFBIAS_PWRUP        0x80
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__AUTO_RESTART          0x40
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__DETECT_LOWBAT         0x20
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__DROP_BIAS1            0x10
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__DROP_BIAS2            0x8
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__SPARE                 0x4
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__DISABLE_XTALSTOP      0x2
+#define BV_RTC_PERSISTENT0_DCDC_CTRL__SPARE2                0x1
+#define BF_RTC_PERSISTENT0_DCDC_CTRL(v)                     (((v) << 6) & 0xffc0)
+#define BF_RTC_PERSISTENT0_DCDC_CTRL_V(v)                   ((BV_RTC_PERSISTENT0_DCDC_CTRL__##v << 6) & 0xffc0)
+#define BP_RTC_PERSISTENT0_XTAL32_PDOWN                     5
+#define BM_RTC_PERSISTENT0_XTAL32_PDOWN                     0x20
+#define BF_RTC_PERSISTENT0_XTAL32_PDOWN(v)                  (((v) << 5) & 0x20)
+#define BP_RTC_PERSISTENT0_XTAL24_PDOWN                     4
+#define BM_RTC_PERSISTENT0_XTAL24_PDOWN                     0x10
+#define BF_RTC_PERSISTENT0_XTAL24_PDOWN(v)                  (((v) << 4) & 0x10)
+#define BP_RTC_PERSISTENT0_ALARM_WAKE_EN                    3
+#define BM_RTC_PERSISTENT0_ALARM_WAKE_EN                    0x8
+#define BF_RTC_PERSISTENT0_ALARM_WAKE_EN(v)                 (((v) << 3) & 0x8)
+#define BP_RTC_PERSISTENT0_ALARM_EN                         2
+#define BM_RTC_PERSISTENT0_ALARM_EN                         0x4
+#define BF_RTC_PERSISTENT0_ALARM_EN(v)                      (((v) << 2) & 0x4)
+#define BP_RTC_PERSISTENT0_ALARM_WAKE                       1
+#define BM_RTC_PERSISTENT0_ALARM_WAKE                       0x2
+#define BF_RTC_PERSISTENT0_ALARM_WAKE(v)                    (((v) << 1) & 0x2)
+#define BP_RTC_PERSISTENT0_CLOCKSOURCE                      0
+#define BM_RTC_PERSISTENT0_CLOCKSOURCE                      0x1
+#define BF_RTC_PERSISTENT0_CLOCKSOURCE(v)                   (((v) << 0) & 0x1)
+
+/**
+ * Register: HW_RTC_PERSISTENT1
+ * Address: 0x70
+ * SCT: yes
+*/
+#define HW_RTC_PERSISTENT1              (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x0))
+#define HW_RTC_PERSISTENT1_SET          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x4))
+#define HW_RTC_PERSISTENT1_CLR          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x8))
+#define HW_RTC_PERSISTENT1_TOG          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0xc))
+#define BP_RTC_PERSISTENT1_GENERAL      0
+#define BM_RTC_PERSISTENT1_GENERAL      0xffffffff
+#define BF_RTC_PERSISTENT1_GENERAL(v)   (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_PERSISTENT2
+ * Address: 0x80
+ * SCT: yes
+*/
+#define HW_RTC_PERSISTENT2                      (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x0))
+#define HW_RTC_PERSISTENT2_SET                  (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x4))
+#define HW_RTC_PERSISTENT2_CLR                  (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x8))
+#define HW_RTC_PERSISTENT2_TOG                  (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0xc))
+#define BP_RTC_PERSISTENT2_SRAM_LO              0
+#define BM_RTC_PERSISTENT2_SRAM_LO              0xffffffff
+#define BV_RTC_PERSISTENT2_SRAM_LO__WARM_BOOT   0x80000000
+#define BF_RTC_PERSISTENT2_SRAM_LO(v)           (((v) << 0) & 0xffffffff)
+#define BF_RTC_PERSISTENT2_SRAM_LO_V(v)         ((BV_RTC_PERSISTENT2_SRAM_LO__##v << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_PERSISTENT3
+ * Address: 0x90
+ * SCT: yes
+*/
+#define HW_RTC_PERSISTENT3              (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x0))
+#define HW_RTC_PERSISTENT3_SET          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x4))
+#define HW_RTC_PERSISTENT3_CLR          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x8))
+#define HW_RTC_PERSISTENT3_TOG          (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0xc))
+#define BP_RTC_PERSISTENT3_SRAM_HI      0
+#define BM_RTC_PERSISTENT3_SRAM_HI      0xffffffff
+#define BF_RTC_PERSISTENT3_SRAM_HI(v)   (((v) << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_DEBUG
+ * Address: 0xa0
+ * SCT: yes
+*/
+#define HW_RTC_DEBUG                        (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x0))
+#define HW_RTC_DEBUG_SET                    (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x4))
+#define HW_RTC_DEBUG_CLR                    (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x8))
+#define HW_RTC_DEBUG_TOG                    (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0xc))
+#define BP_RTC_DEBUG_WATCHDOG_RESET_MASK    1
+#define BM_RTC_DEBUG_WATCHDOG_RESET_MASK    0x2
+#define BF_RTC_DEBUG_WATCHDOG_RESET_MASK(v) (((v) << 1) & 0x2)
+#define BP_RTC_DEBUG_WATCHDOG_RESET         0
+#define BM_RTC_DEBUG_WATCHDOG_RESET         0x1
+#define BF_RTC_DEBUG_WATCHDOG_RESET(v)      (((v) << 0) & 0x1)
+
+/**
+ * Register: HW_RTC_UNLOCK
+ * Address: 0x200
+ * SCT: yes
+*/
+#define HW_RTC_UNLOCK           (*(volatile unsigned long *)(REGS_RTC_BASE + 0x200 + 0x0))
+#define HW_RTC_UNLOCK_SET       (*(volatile unsigned long *)(REGS_RTC_BASE + 0x200 + 0x4))
+#define HW_RTC_UNLOCK_CLR       (*(volatile unsigned long *)(REGS_RTC_BASE + 0x200 + 0x8))
+#define HW_RTC_UNLOCK_TOG       (*(volatile unsigned long *)(REGS_RTC_BASE + 0x200 + 0xc))
+#define BP_RTC_UNLOCK_KEY       0
+#define BM_RTC_UNLOCK_KEY       0xffffffff
+#define BV_RTC_UNLOCK_KEY__VAL  0xc6a83957
+#define BF_RTC_UNLOCK_KEY(v)    (((v) << 0) & 0xffffffff)
+#define BF_RTC_UNLOCK_KEY_V(v)  ((BV_RTC_UNLOCK_KEY__##v << 0) & 0xffffffff)
+
+/**
+ * Register: HW_RTC_LASERFUSEn
+ * Address: 0x300+n*0x10
+ * SCT: yes
+*/
+#define HW_RTC_LASERFUSEn(n)        (*(volatile unsigned long *)(REGS_RTC_BASE + 0x300+(n)*0x10 + 0x0))
+#define HW_RTC_LASERFUSEn_SET(n)    (*(volatile unsigned long *)(REGS_RTC_BASE + 0x300+(n)*0x10 + 0x4))
+#define HW_RTC_LASERFUSEn_CLR(n)    (*(volatile unsigned long *)(REGS_RTC_BASE + 0x300+(n)*0x10 + 0x8))
+#define HW_RTC_LASERFUSEn_TOG(n)    (*(volatile unsigned long *)(REGS_RTC_BASE + 0x300+(n)*0x10 + 0xc))
+#define BP_RTC_LASERFUSEn_BITS      0
+#define BM_RTC_LASERFUSEn_BITS      0xffffffff
+#define BF_RTC_LASERFUSEn_BITS(v)   (((v) << 0) & 0xffffffff)
+
+#endif /* __HEADERGEN__STMP3600__RTC__H__ */