4 files changed, 57 insertions, 1 deletions

diff --git a/firmware/target/coldfire/crt0.S b/firmware/target/coldfire/crt0.S
index bc8a370823..38365c7d71 100644
--- a/firmware/target/coldfire/crt0.S
+++ b/firmware/target/coldfire/crt0.S
@@ -63,7 +63,16 @@ start:
     move.l  #0x00000180,%d0 /* CSCR0 - no wait states, 16 bits, no bursts */
     move.l  %d0,(0x088,%a0)
         
-#ifndef IAUDIO_M3
+#ifdef MPIO_HD200
+    /* Chip select 3 - LCD controller */
+    /* values taken from original firmware except base address*/
+    move.l  #0xf0000000,%d0 /* CSAR3 - Base = 0xf0000000 */
+    move.l  %d0,(0x0a4,%a0)
+    moveq.l #0x1,%d0        /* CSMR3 - 64K */
+    move.l  %d0,(0x0a8,%a0)
+    move.l  #0x00000980,%d0 /* CSCR3 - 1 wait state, 16 bits no bursts */
+    move.l  %d0,(0x0ac,%a0)
+#elif !(defined IAUDIO_M3)
     /* Chip select 1 - LCD controller */
     move.l  #0xf0000000,%d0 /* CSAR1 - Base = 0xf0000000 */
     move.l  %d0,(0x08c,%a0)
@@ -267,6 +276,14 @@ start:
     or.l %d0,(0xbc,%a1)
 #endif
 
+#ifdef MPIO_HD200
+    /* Set KEEP_ACT */
+    move.l #0x02200000,%d0
+    or.l %d0,(0xb4,%a1)
+    or.l %d0,(0xb8,%a1)
+    or.l %d0,(0xbc,%a1)
+#endif
+
     /* zero out bss */
     lea     _edata,%a2
     lea     _end,%a4
diff --git a/firmware/target/coldfire/i2c-coldfire.c b/firmware/target/coldfire/i2c-coldfire.c
index ebfe0a006e..ab3018d713 100644
--- a/firmware/target/coldfire/i2c-coldfire.c
+++ b/firmware/target/coldfire/i2c-coldfire.c
@@ -70,6 +70,10 @@ void i2c_init(void)
 #elif defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES)
     MBDR = 0;    /* iRiver firmware does this */
     MBCR = IEN;  /* Enable interface */
+#elif defined(MPIO_HD200)
+    /* second channel */
+    MFDR2 = 0x0d;
+    MBCR2 = IEN;
 #endif
 }
 
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c
index 0782b116b4..209d227187 100644
--- a/firmware/target/coldfire/pcm-coldfire.c
+++ b/firmware/target/coldfire/pcm-coldfire.c
@@ -55,6 +55,24 @@
 
 #define FPARM_CLOCKSEL       0
 #define FPARM_CLSEL          1
+
+/* SCLK = Fs * bit clocks per word
+ * so SCLK should be Fs * 64
+ *
+ * CLOCKSEL sets SCLK freq based on Audio CLK
+ * 0x0c SCLK = Audio CLK/2   88200 * 64 = 5644800 Hz
+ * 0x06 SCLK = Audio CLK/4   44100 * 64 = 2822400 Hz
+ * 0x04 SCLK = Audio CLK/8   22050 * 64 = 1411200 Hz
+ * 0x02 SCLK = Audio CLK/16  11025 * 64 = 705600 Hz
+ *
+ * CLSEL sets MCLK1/2 DAC freq based on XTAL freq
+ * 0x01 MCLK1/2 = XTAL freq
+ * 0x02 MCLK1/2 = XTAL/2 freq
+ *
+ * Audio CLK can be XTAL freq or XTAL/2 freq  (bit22 in PLLCR)
+ * we always set bit22 so Audio CLK is always XTAL freq
+ */
+
 #if CONFIG_CPU == MCF5249 && defined(HAVE_UDA1380)
 static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
 {
@@ -65,6 +83,16 @@ static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
 };
 #endif
 
+#if CONFIG_CPU == MCF5249 && defined(HAVE_WM8750)
+static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
+{
+    [HW_FREQ_88] = { 0x0c, 0x01 },
+    [HW_FREQ_44] = { 0x06, 0x01 },
+    [HW_FREQ_22] = { 0x04, 0x01 },
+    [HW_FREQ_11] = { 0x02, 0x01 },
+};
+#endif
+
 #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320)
 static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
 {
@@ -324,6 +352,7 @@ const void * pcm_play_dma_get_peak_buffer(int *count)
     return (void *)((addr + 2) & ~3);
 } /* pcm_play_dma_get_peak_buffer */
 
+#ifdef HAVE_RECORDING
 /****************************************************************************
  ** Recording DMA transfer
  **/
@@ -487,3 +516,4 @@ const void * pcm_rec_dma_get_peak_buffer(int *count)
     *count = (end >> 2) - addr;
     return (void *)(addr << 2);
 } /* pcm_rec_dma_get_peak_buffer */
+#endif
diff --git a/firmware/target/coldfire/system-coldfire.c b/firmware/target/coldfire/system-coldfire.c
index a387824526..ba67daa3a6 100644
--- a/firmware/target/coldfire/system-coldfire.c
+++ b/firmware/target/coldfire/system-coldfire.c
@@ -152,6 +152,11 @@ default_interrupt (ADC);  /* A/D converter */
 #define EXCP_BUTTON_MASK        0x00000202
 #define EXCP_BUTTON_VALUE       0x00000200 /* On button and !hold */
 #define EXCP_PLLCR              0x10800000
+#elif defined(MPIO_HD200)
+#define EXCP_BUTTON_GPIO_READ   GPIO1_READ
+#define EXCP_BUTTON_MASK        0x01000010
+#define EXCP_BUTTON_VALUE       0x01000000 /* Play button and !hold */
+#define EXCP_PLLCR              0x10800000
 #else
 #define EXCP_BUTTON_GPIO_READ   GPIO1_READ
 #define EXCP_BUTTON_MASK        0x00000022