diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/SOURCES | 24 | ||||
-rw-r--r-- | firmware/drivers/audio/wm8751.c | 25 | ||||
-rw-r--r-- | firmware/export/audiohw.h | 2 | ||||
-rw-r--r-- | firmware/export/config.h | 3 | ||||
-rw-r--r-- | firmware/export/wm8751.h | 9 | ||||
-rw-r--r-- | firmware/sound.c | 11 | ||||
-rw-r--r-- | firmware/target/coldfire/crt0.S | 19 | ||||
-rw-r--r-- | firmware/target/coldfire/i2c-coldfire.c | 4 | ||||
-rw-r--r-- | firmware/target/coldfire/pcm-coldfire.c | 30 | ||||
-rw-r--r-- | firmware/target/coldfire/system-coldfire.c | 5 |
10 files changed, 122 insertions, 10 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES index b13f6a0df8..48360d7b45 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES | |||
@@ -258,7 +258,8 @@ drivers/mas.c | |||
258 | #if !defined(SIMULATOR) && !defined(BOOTLOADER) | 258 | #if !defined(SIMULATOR) && !defined(BOOTLOADER) |
259 | #if defined(HAVE_UDA1380) | 259 | #if defined(HAVE_UDA1380) |
260 | drivers/audio/uda1380.c | 260 | drivers/audio/uda1380.c |
261 | #elif defined(HAVE_WM8751) | 261 | #elif defined(HAVE_WM8751) \ |
262 | || defined(HAVE_WM8750) | ||
262 | drivers/audio/wm8751.c | 263 | drivers/audio/wm8751.c |
263 | #elif defined(HAVE_WM8978) | 264 | #elif defined(HAVE_WM8978) |
264 | drivers/audio/wm8978.c | 265 | drivers/audio/wm8978.c |
@@ -1609,3 +1610,24 @@ target/arm/usb-fw-pp502x.c | |||
1609 | #endif /* SIMULATOR */ | 1610 | #endif /* SIMULATOR */ |
1610 | #endif | 1611 | #endif |
1611 | 1612 | ||
1613 | #ifdef MPIO_HD200 | ||
1614 | #ifndef SIMULATOR | ||
1615 | /* TODO: currently including all files */ | ||
1616 | target/coldfire/mpio/hd200/adc-hd200.c | ||
1617 | target/coldfire/mpio/hd200/button-hd200.c | ||
1618 | target/coldfire/mpio/hd200/lcd-hd200.c | ||
1619 | target/coldfire/mpio/hd200/lcd-as-hd200.S | ||
1620 | target/coldfire/mpio/hd200/power-hd200.c | ||
1621 | target/coldfire/mpio/hd200/powermgmt-hd200.c | ||
1622 | target/coldfire/mpio/hd200/backlight-hd200.c | ||
1623 | target/coldfire/mpio/hd200/system-hd200.c | ||
1624 | target/coldfire/mpio/hd200/usb-hd200.c | ||
1625 | target/coldfire/mpio/fmradio_i2c-mpio.c | ||
1626 | target/coldfire/mpio/ata-mpio.c | ||
1627 | target/coldfire/mpio/ata-as-mpio.S | ||
1628 | #ifndef BOOTLOADER | ||
1629 | target/coldfire/mpio/audio-mpio.c | ||
1630 | target/coldfire/wmcodec-coldfire.c | ||
1631 | #endif /* BOOTLOADER */ | ||
1632 | #endif /* SIMULATOR */ | ||
1633 | #endif | ||
diff --git a/firmware/drivers/audio/wm8751.c b/firmware/drivers/audio/wm8751.c index b42c4b1041..cdc64fd69b 100644 --- a/firmware/drivers/audio/wm8751.c +++ b/firmware/drivers/audio/wm8751.c | |||
@@ -116,17 +116,22 @@ void audiohw_preinit(void) | |||
116 | * and Headphone outputs are all OFF (DACMU = 1 Power | 116 | * and Headphone outputs are all OFF (DACMU = 1 Power |
117 | * Management registers 1 and 2 are all zeros). | 117 | * Management registers 1 and 2 are all zeros). |
118 | */ | 118 | */ |
119 | |||
119 | wmcodec_write(RESET, RESET_RESET); /*Reset*/ | 120 | wmcodec_write(RESET, RESET_RESET); /*Reset*/ |
120 | 121 | ||
121 | /* 2. Enable Vmid and VREF. */ | 122 | /* 2. Enable Vmid and VREF. */ |
122 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_5K); | 123 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_5K); |
123 | 124 | ||
125 | #ifdef CODEC_SLAVE | ||
126 | wmcodec_write(AINTFCE,AINTFCE_WL_16|AINTFCE_FORMAT_I2S); | ||
127 | #else | ||
124 | /* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */ | 128 | /* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */ |
125 | /* IWL=00(16 bit) FORMAT=10(I2S format) */ | 129 | /* IWL=00(16 bit) FORMAT=10(I2S format) */ |
126 | wmcodec_write(AINTFCE, AINTFCE_MS | AINTFCE_WL_16 | | 130 | wmcodec_write(AINTFCE, AINTFCE_MS | AINTFCE_WL_16 | |
127 | AINTFCE_FORMAT_I2S); | 131 | AINTFCE_FORMAT_I2S); |
128 | 132 | #endif | |
129 | /* Set default samplerate */ | 133 | /* Set default samplerate */ |
134 | |||
130 | audiohw_set_frequency(HW_FREQ_DEFAULT); | 135 | audiohw_set_frequency(HW_FREQ_DEFAULT); |
131 | } | 136 | } |
132 | 137 | ||
@@ -140,7 +145,7 @@ void audiohw_postinit(void) | |||
140 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR); | 145 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR); |
141 | 146 | ||
142 | /* 4. Enable line and / or headphone output buffers as required. */ | 147 | /* 4. Enable line and / or headphone output buffers as required. */ |
143 | #ifdef MROBE_100 | 148 | #if defined(MROBE_100) || defined(MPIO_HD200) |
144 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | | 149 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | |
145 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); | 150 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); |
146 | #else | 151 | #else |
@@ -166,6 +171,19 @@ void audiohw_postinit(void) | |||
166 | #endif | 171 | #endif |
167 | #endif | 172 | #endif |
168 | 173 | ||
174 | #ifdef MPIO_HD200 | ||
175 | /* Crude fix for high pitch noise at startup | ||
176 | * I should find out what realy causes this | ||
177 | */ | ||
178 | wmcodec_write(LOUT1, LOUT1_BITS|0x7f); | ||
179 | wmcodec_write(ROUT1, ROUT1_BITS|0x7f); | ||
180 | wmcodec_write(LOUT1, LOUT1_BITS); | ||
181 | wmcodec_write(ROUT1, ROUT1_BITS); | ||
182 | #endif | ||
183 | |||
184 | /* lower power consumption */ | ||
185 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | ||
186 | |||
169 | audiohw_mute(false); | 187 | audiohw_mute(false); |
170 | 188 | ||
171 | #ifdef MROBE_100 | 189 | #ifdef MROBE_100 |
@@ -234,6 +252,8 @@ void audiohw_close(void) | |||
234 | 252 | ||
235 | void audiohw_set_frequency(int fsel) | 253 | void audiohw_set_frequency(int fsel) |
236 | { | 254 | { |
255 | (void)fsel; | ||
256 | #ifndef CODEC_SLAVE | ||
237 | static const unsigned char srctrl_table[HW_NUM_FREQ] = | 257 | static const unsigned char srctrl_table[HW_NUM_FREQ] = |
238 | { | 258 | { |
239 | HW_HAVE_11_([HW_FREQ_11] = CODEC_SRCTRL_11025HZ,) | 259 | HW_HAVE_11_([HW_FREQ_11] = CODEC_SRCTRL_11025HZ,) |
@@ -246,4 +266,5 @@ void audiohw_set_frequency(int fsel) | |||
246 | fsel = HW_FREQ_DEFAULT; | 266 | fsel = HW_FREQ_DEFAULT; |
247 | 267 | ||
248 | wmcodec_write(CLOCKING, srctrl_table[fsel]); | 268 | wmcodec_write(CLOCKING, srctrl_table[fsel]); |
269 | #endif | ||
249 | } | 270 | } |
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h index 781bc12f8e..c00b673a4a 100644 --- a/firmware/export/audiohw.h +++ b/firmware/export/audiohw.h | |||
@@ -38,7 +38,7 @@ | |||
38 | #include "uda1380.h" | 38 | #include "uda1380.h" |
39 | #elif defined(HAVE_UDA1341) | 39 | #elif defined(HAVE_UDA1341) |
40 | #include "uda1341.h" | 40 | #include "uda1341.h" |
41 | #elif defined(HAVE_WM8751) | 41 | #elif defined(HAVE_WM8750) || defined(HAVE_WM8751) |
42 | #include "wm8751.h" | 42 | #include "wm8751.h" |
43 | #elif defined(HAVE_WM8978) | 43 | #elif defined(HAVE_WM8978) |
44 | #include "wm8978.h" | 44 | #include "wm8978.h" |
diff --git a/firmware/export/config.h b/firmware/export/config.h index fb9381e7da..906a3fef1a 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -117,6 +117,7 @@ | |||
117 | #define MINI2440_PAD 41 | 117 | #define MINI2440_PAD 41 |
118 | #define PHILIPS_HDD6330_PAD 42 | 118 | #define PHILIPS_HDD6330_PAD 42 |
119 | #define PBELL_VIBE500_PAD 43 | 119 | #define PBELL_VIBE500_PAD 43 |
120 | #define MPIO_HD200_PAD 44 | ||
120 | 121 | ||
121 | /* CONFIG_REMOTE_KEYPAD */ | 122 | /* CONFIG_REMOTE_KEYPAD */ |
122 | #define H100_REMOTE 1 | 123 | #define H100_REMOTE 1 |
@@ -412,6 +413,8 @@ Lyre prototype 1 */ | |||
412 | #include "config/samsungyps3.h" | 413 | #include "config/samsungyps3.h" |
413 | #elif defined(PBELL_VIBE500) | 414 | #elif defined(PBELL_VIBE500) |
414 | #include "config/vibe500.h" | 415 | #include "config/vibe500.h" |
416 | #elif defined(MPIO_HD200) | ||
417 | #include "config/mpiohd200.h" | ||
415 | #else | 418 | #else |
416 | /* no known platform */ | 419 | /* no known platform */ |
417 | #endif | 420 | #endif |
diff --git a/firmware/export/wm8751.h b/firmware/export/wm8751.h index 15170b76bc..c171642853 100644 --- a/firmware/export/wm8751.h +++ b/firmware/export/wm8751.h | |||
@@ -98,6 +98,15 @@ extern void audiohw_set_lineout_vol(int vol_l, int vol_r); | |||
98 | #define RESET 0x0f | 98 | #define RESET 0x0f |
99 | #define RESET_RESET 0x000 | 99 | #define RESET_RESET 0x000 |
100 | 100 | ||
101 | /* WM8750 only */ | ||
102 | #define ENHANCE_3D 0x10 | ||
103 | #define ENHANCE_3D_3DEN (1 << 0) | ||
104 | #define ENHANCE_3D_DEPTH(x) (((x) & 0xf) << 1) | ||
105 | #define ENHANCE_3D_3DLC (1 << 5) | ||
106 | #define ENHANCE_3D_3DUC (1 << 6) | ||
107 | #define ENHANCE_3D_MODE3D_PLAYBACK (1 << 7) | ||
108 | #define ENHANCE_3D_MODE3D_RECORD (0 << 7) | ||
109 | |||
101 | #define ADDITIONAL1 0x17 | 110 | #define ADDITIONAL1 0x17 |
102 | #define ADDITIONAL1_TOEN (1 << 0) | 111 | #define ADDITIONAL1_TOEN (1 << 0) |
103 | #define ADDITIONAL1_DACINV (1 << 1) | 112 | #define ADDITIONAL1_DACINV (1 << 1) |
diff --git a/firmware/sound.c b/firmware/sound.c index d64dfcfdb9..4f95b6ed50 100644 --- a/firmware/sound.c +++ b/firmware/sound.c | |||
@@ -235,11 +235,12 @@ static void set_prescaled_volume(void) | |||
235 | dac_volume(tenthdb2reg(l), tenthdb2reg(r), false); | 235 | dac_volume(tenthdb2reg(l), tenthdb2reg(r), false); |
236 | #elif defined(HAVE_UDA1380) || defined(HAVE_WM8975) || defined(HAVE_WM8758) \ | 236 | #elif defined(HAVE_UDA1380) || defined(HAVE_WM8975) || defined(HAVE_WM8758) \ |
237 | || defined(HAVE_WM8711) || defined(HAVE_WM8721) || defined(HAVE_WM8731) \ | 237 | || defined(HAVE_WM8711) || defined(HAVE_WM8721) || defined(HAVE_WM8731) \ |
238 | || defined(HAVE_WM8751) || defined(HAVE_AS3514) || defined(HAVE_TSC2100) \ | 238 | || defined(HAVE_WM8750) || defined(HAVE_WM8751) || defined(HAVE_AS3514) \ |
239 | || defined(HAVE_AK4537) || defined(HAVE_UDA1341) | 239 | || defined(HAVE_TSC2100) || defined(HAVE_AK4537) || defined(HAVE_UDA1341) |
240 | audiohw_set_master_vol(tenthdb2master(l), tenthdb2master(r)); | 240 | audiohw_set_master_vol(tenthdb2master(l), tenthdb2master(r)); |
241 | #if defined(HAVE_WM8975) || defined(HAVE_WM8758) \ | 241 | #if defined(HAVE_WM8975) || defined(HAVE_WM8758) \ |
242 | || (defined(HAVE_WM8751) && !defined(MROBE_100)) || defined(HAVE_WM8985) | 242 | || defined(HAVE_WM8750) || (defined(HAVE_WM8751) && !defined(MROBE_100)) \ |
243 | || defined(HAVE_WM8985) | ||
243 | audiohw_set_lineout_vol(tenthdb2master(0), tenthdb2master(0)); | 244 | audiohw_set_lineout_vol(tenthdb2master(0), tenthdb2master(0)); |
244 | #endif | 245 | #endif |
245 | 246 | ||
@@ -295,7 +296,7 @@ void sound_set_bass(int value) | |||
295 | return; | 296 | return; |
296 | 297 | ||
297 | #if !defined(AUDIOHW_HAVE_CLIPPING) | 298 | #if !defined(AUDIOHW_HAVE_CLIPPING) |
298 | #if defined(HAVE_WM8751) | 299 | #if defined(HAVE_WM8750) || defined(HAVE_WM8751) |
299 | current_bass = value; | 300 | current_bass = value; |
300 | #else | 301 | #else |
301 | current_bass = value * 10; | 302 | current_bass = value * 10; |
@@ -319,7 +320,7 @@ void sound_set_treble(int value) | |||
319 | return; | 320 | return; |
320 | 321 | ||
321 | #if !defined(AUDIOHW_HAVE_CLIPPING) | 322 | #if !defined(AUDIOHW_HAVE_CLIPPING) |
322 | #if defined(HAVE_WM8751) | 323 | #if defined(HAVE_WM8750) || defined(HAVE_WM8751) |
323 | current_treble = value; | 324 | current_treble = value; |
324 | #else | 325 | #else |
325 | current_treble = value * 10; | 326 | current_treble = value * 10; |
diff --git a/firmware/target/coldfire/crt0.S b/firmware/target/coldfire/crt0.S index bc8a370823..38365c7d71 100644 --- a/firmware/target/coldfire/crt0.S +++ b/firmware/target/coldfire/crt0.S | |||
@@ -63,7 +63,16 @@ start: | |||
63 | move.l #0x00000180,%d0 /* CSCR0 - no wait states, 16 bits, no bursts */ | 63 | move.l #0x00000180,%d0 /* CSCR0 - no wait states, 16 bits, no bursts */ |
64 | move.l %d0,(0x088,%a0) | 64 | move.l %d0,(0x088,%a0) |
65 | 65 | ||
66 | #ifndef IAUDIO_M3 | 66 | #ifdef MPIO_HD200 |
67 | /* Chip select 3 - LCD controller */ | ||
68 | /* values taken from original firmware except base address*/ | ||
69 | move.l #0xf0000000,%d0 /* CSAR3 - Base = 0xf0000000 */ | ||
70 | move.l %d0,(0x0a4,%a0) | ||
71 | moveq.l #0x1,%d0 /* CSMR3 - 64K */ | ||
72 | move.l %d0,(0x0a8,%a0) | ||
73 | move.l #0x00000980,%d0 /* CSCR3 - 1 wait state, 16 bits no bursts */ | ||
74 | move.l %d0,(0x0ac,%a0) | ||
75 | #elif !(defined IAUDIO_M3) | ||
67 | /* Chip select 1 - LCD controller */ | 76 | /* Chip select 1 - LCD controller */ |
68 | move.l #0xf0000000,%d0 /* CSAR1 - Base = 0xf0000000 */ | 77 | move.l #0xf0000000,%d0 /* CSAR1 - Base = 0xf0000000 */ |
69 | move.l %d0,(0x08c,%a0) | 78 | move.l %d0,(0x08c,%a0) |
@@ -267,6 +276,14 @@ start: | |||
267 | or.l %d0,(0xbc,%a1) | 276 | or.l %d0,(0xbc,%a1) |
268 | #endif | 277 | #endif |
269 | 278 | ||
279 | #ifdef MPIO_HD200 | ||
280 | /* Set KEEP_ACT */ | ||
281 | move.l #0x02200000,%d0 | ||
282 | or.l %d0,(0xb4,%a1) | ||
283 | or.l %d0,(0xb8,%a1) | ||
284 | or.l %d0,(0xbc,%a1) | ||
285 | #endif | ||
286 | |||
270 | /* zero out bss */ | 287 | /* zero out bss */ |
271 | lea _edata,%a2 | 288 | lea _edata,%a2 |
272 | lea _end,%a4 | 289 | lea _end,%a4 |
diff --git a/firmware/target/coldfire/i2c-coldfire.c b/firmware/target/coldfire/i2c-coldfire.c index ebfe0a006e..ab3018d713 100644 --- a/firmware/target/coldfire/i2c-coldfire.c +++ b/firmware/target/coldfire/i2c-coldfire.c | |||
@@ -70,6 +70,10 @@ void i2c_init(void) | |||
70 | #elif defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) | 70 | #elif defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) |
71 | MBDR = 0; /* iRiver firmware does this */ | 71 | MBDR = 0; /* iRiver firmware does this */ |
72 | MBCR = IEN; /* Enable interface */ | 72 | MBCR = IEN; /* Enable interface */ |
73 | #elif defined(MPIO_HD200) | ||
74 | /* second channel */ | ||
75 | MFDR2 = 0x0d; | ||
76 | MBCR2 = IEN; | ||
73 | #endif | 77 | #endif |
74 | } | 78 | } |
75 | 79 | ||
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c index 0782b116b4..209d227187 100644 --- a/firmware/target/coldfire/pcm-coldfire.c +++ b/firmware/target/coldfire/pcm-coldfire.c | |||
@@ -55,6 +55,24 @@ | |||
55 | 55 | ||
56 | #define FPARM_CLOCKSEL 0 | 56 | #define FPARM_CLOCKSEL 0 |
57 | #define FPARM_CLSEL 1 | 57 | #define FPARM_CLSEL 1 |
58 | |||
59 | /* SCLK = Fs * bit clocks per word | ||
60 | * so SCLK should be Fs * 64 | ||
61 | * | ||
62 | * CLOCKSEL sets SCLK freq based on Audio CLK | ||
63 | * 0x0c SCLK = Audio CLK/2 88200 * 64 = 5644800 Hz | ||
64 | * 0x06 SCLK = Audio CLK/4 44100 * 64 = 2822400 Hz | ||
65 | * 0x04 SCLK = Audio CLK/8 22050 * 64 = 1411200 Hz | ||
66 | * 0x02 SCLK = Audio CLK/16 11025 * 64 = 705600 Hz | ||
67 | * | ||
68 | * CLSEL sets MCLK1/2 DAC freq based on XTAL freq | ||
69 | * 0x01 MCLK1/2 = XTAL freq | ||
70 | * 0x02 MCLK1/2 = XTAL/2 freq | ||
71 | * | ||
72 | * Audio CLK can be XTAL freq or XTAL/2 freq (bit22 in PLLCR) | ||
73 | * we always set bit22 so Audio CLK is always XTAL freq | ||
74 | */ | ||
75 | |||
58 | #if CONFIG_CPU == MCF5249 && defined(HAVE_UDA1380) | 76 | #if CONFIG_CPU == MCF5249 && defined(HAVE_UDA1380) |
59 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | 77 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = |
60 | { | 78 | { |
@@ -65,6 +83,16 @@ static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | |||
65 | }; | 83 | }; |
66 | #endif | 84 | #endif |
67 | 85 | ||
86 | #if CONFIG_CPU == MCF5249 && defined(HAVE_WM8750) | ||
87 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | ||
88 | { | ||
89 | [HW_FREQ_88] = { 0x0c, 0x01 }, | ||
90 | [HW_FREQ_44] = { 0x06, 0x01 }, | ||
91 | [HW_FREQ_22] = { 0x04, 0x01 }, | ||
92 | [HW_FREQ_11] = { 0x02, 0x01 }, | ||
93 | }; | ||
94 | #endif | ||
95 | |||
68 | #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320) | 96 | #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320) |
69 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | 97 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = |
70 | { | 98 | { |
@@ -324,6 +352,7 @@ const void * pcm_play_dma_get_peak_buffer(int *count) | |||
324 | return (void *)((addr + 2) & ~3); | 352 | return (void *)((addr + 2) & ~3); |
325 | } /* pcm_play_dma_get_peak_buffer */ | 353 | } /* pcm_play_dma_get_peak_buffer */ |
326 | 354 | ||
355 | #ifdef HAVE_RECORDING | ||
327 | /**************************************************************************** | 356 | /**************************************************************************** |
328 | ** Recording DMA transfer | 357 | ** Recording DMA transfer |
329 | **/ | 358 | **/ |
@@ -487,3 +516,4 @@ const void * pcm_rec_dma_get_peak_buffer(int *count) | |||
487 | *count = (end >> 2) - addr; | 516 | *count = (end >> 2) - addr; |
488 | return (void *)(addr << 2); | 517 | return (void *)(addr << 2); |
489 | } /* pcm_rec_dma_get_peak_buffer */ | 518 | } /* pcm_rec_dma_get_peak_buffer */ |
519 | #endif | ||
diff --git a/firmware/target/coldfire/system-coldfire.c b/firmware/target/coldfire/system-coldfire.c index a387824526..ba67daa3a6 100644 --- a/firmware/target/coldfire/system-coldfire.c +++ b/firmware/target/coldfire/system-coldfire.c | |||
@@ -152,6 +152,11 @@ default_interrupt (ADC); /* A/D converter */ | |||
152 | #define EXCP_BUTTON_MASK 0x00000202 | 152 | #define EXCP_BUTTON_MASK 0x00000202 |
153 | #define EXCP_BUTTON_VALUE 0x00000200 /* On button and !hold */ | 153 | #define EXCP_BUTTON_VALUE 0x00000200 /* On button and !hold */ |
154 | #define EXCP_PLLCR 0x10800000 | 154 | #define EXCP_PLLCR 0x10800000 |
155 | #elif defined(MPIO_HD200) | ||
156 | #define EXCP_BUTTON_GPIO_READ GPIO1_READ | ||
157 | #define EXCP_BUTTON_MASK 0x01000010 | ||
158 | #define EXCP_BUTTON_VALUE 0x01000000 /* Play button and !hold */ | ||
159 | #define EXCP_PLLCR 0x10800000 | ||
155 | #else | 160 | #else |
156 | #define EXCP_BUTTON_GPIO_READ GPIO1_READ | 161 | #define EXCP_BUTTON_GPIO_READ GPIO1_READ |
157 | #define EXCP_BUTTON_MASK 0x00000022 | 162 | #define EXCP_BUTTON_MASK 0x00000022 |