diff options
Diffstat (limited to 'firmware/target/arm/s5l8700')
-rw-r--r-- | firmware/target/arm/s5l8700/app.lds | 4 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/crt0.S | 96 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c | 2 |
3 files changed, 51 insertions, 51 deletions
diff --git a/firmware/target/arm/s5l8700/app.lds b/firmware/target/arm/s5l8700/app.lds index ed47ad5643..e431ee1fd7 100644 --- a/firmware/target/arm/s5l8700/app.lds +++ b/firmware/target/arm/s5l8700/app.lds | |||
@@ -28,7 +28,7 @@ STARTUP(target/arm/s5l8700/crt0.o) | |||
28 | #define DRAMSIZE (DRAM_SIZE - STUBOFFSET - PLUGINSIZE - CODECSIZE) | 28 | #define DRAMSIZE (DRAM_SIZE - STUBOFFSET - PLUGINSIZE - CODECSIZE) |
29 | #define CODECORIG (ENDAUDIOADDR) | 29 | #define CODECORIG (ENDAUDIOADDR) |
30 | #if CONFIG_CPU==S5L8700 | 30 | #if CONFIG_CPU==S5L8700 |
31 | #define IRAMSIZE (128*1024) /* 256KB total - 128KB for core, 128KB for plugins */ | 31 | #define IRAMSIZE (64*1024) /* 128KB total - 64KB for core, 64KB for plugins */ |
32 | #else /* S5L8701 */ | 32 | #else /* S5L8701 */ |
33 | #define IRAMSIZE (96*1024) /* 176KB total - 96KB for core, 80KB for plugins */ | 33 | #define IRAMSIZE (96*1024) /* 176KB total - 96KB for core, 80KB for plugins */ |
34 | #endif | 34 | #endif |
@@ -108,7 +108,7 @@ SECTIONS | |||
108 | stackbegin = .; | 108 | stackbegin = .; |
109 | _stackbegin = .; | 109 | _stackbegin = .; |
110 | #ifdef IPOD_NANO2G | 110 | #ifdef IPOD_NANO2G |
111 | . += 0x2000; | 111 | . += 0x4000; |
112 | #endif | 112 | #endif |
113 | . += 0x2000; | 113 | . += 0x2000; |
114 | stackend = .; | 114 | stackend = .; |
diff --git a/firmware/target/arm/s5l8700/crt0.S b/firmware/target/arm/s5l8700/crt0.S index fe2a2c1980..bb6d910e22 100644 --- a/firmware/target/arm/s5l8700/crt0.S +++ b/firmware/target/arm/s5l8700/crt0.S | |||
@@ -260,64 +260,64 @@ start_loc: | |||
260 | 260 | ||
261 | #if defined(MEIZU_M6SP) || defined(MEIZU_M3) | 261 | #if defined(MEIZU_M6SP) || defined(MEIZU_M3) |
262 | /* setup SDRAM for Meizu M6SP */ | 262 | /* setup SDRAM for Meizu M6SP */ |
263 | ldr r1, =0x38200000 | 263 | ldr r1, =0x38200000 |
264 | // configure SDR drive strength and pad settings | 264 | // configure SDR drive strength and pad settings |
265 | mov r0, #SDR_DSS_SEL_B | 265 | mov r0, #SDR_DSS_SEL_B |
266 | str r0, [r1, #0x4C] // MIU_DSS_SEL_B | 266 | str r0, [r1, #0x4C] // MIU_DSS_SEL_B |
267 | mov r0, #SDR_DSS_SEL_O | 267 | mov r0, #SDR_DSS_SEL_O |
268 | str r0, [r1, #0x50] // MIU_DSS_SEL_O | 268 | str r0, [r1, #0x50] // MIU_DSS_SEL_O |
269 | mov r0, #SDR_DSS_SEL_C | 269 | mov r0, #SDR_DSS_SEL_C |
270 | str r0, [r1, #0x54] // MIU_DSS_SEL_C | 270 | str r0, [r1, #0x54] // MIU_DSS_SEL_C |
271 | mov r0, #2 | 271 | mov r0, #2 |
272 | str r0, [r1, #0x60] // SSTL2_PAD_ON | 272 | str r0, [r1, #0x60] // SSTL2_PAD_ON |
273 | // select SDR mode | 273 | // select SDR mode |
274 | ldr r0, [r1, #0x40] | 274 | ldr r0, [r1, #0x40] |
275 | mov r2, #0xFFFDFFFF | 275 | mov r2, #0xFFFDFFFF |
276 | and r0, r0, r2 | 276 | and r0, r0, r2 |
277 | orr r0, r0, #1 | 277 | orr r0, r0, #1 |
278 | str r0, [r1, #0x40] // MIUORG | 278 | str r0, [r1, #0x40] // MIUORG |
279 | // set controller configuration | 279 | // set controller configuration |
280 | mov r0, #SDR_CONFIG | 280 | mov r0, #SDR_CONFIG |
281 | str r0, [r1] // MIUCON | 281 | str r0, [r1] // MIUCON |
282 | // set SDRAM timing | 282 | // set SDRAM timing |
283 | ldr r0, =SDR_TIMING | 283 | ldr r0, =SDR_TIMING |
284 | str r0, [r1, #0x10] // MIUSDPARA | 284 | str r0, [r1, #0x10] // MIUSDPARA |
285 | // set refresh rate | 285 | // set refresh rate |
286 | mov r0, #0x1080 | 286 | mov r0, #0x1080 |
287 | str r0, [r1, #0x08] // MIUAREF | 287 | str r0, [r1, #0x08] // MIUAREF |
288 | // initialise SDRAM | 288 | // initialise SDRAM |
289 | mov r0, #0x003 | 289 | mov r0, #0x003 |
290 | str r0, [r1, #0x04] // MIUCOM = nop | 290 | str r0, [r1, #0x04] // MIUCOM = nop |
291 | ldr r0, =0x203 | 291 | ldr r0, =0x203 |
292 | str r0, [r1, #0x04] // MIUCOM = precharge all banks | 292 | str r0, [r1, #0x04] // MIUCOM = precharge all banks |
293 | nop | 293 | nop |
294 | nop | 294 | nop |
295 | nop | 295 | nop |
296 | ldr r0, =0x303 | 296 | ldr r0, =0x303 |
297 | str r0, [r1, #0x04] // MIUCOM = auto-refresh | 297 | str r0, [r1, #0x04] // MIUCOM = auto-refresh |
298 | nop | 298 | nop |
299 | nop | 299 | nop |
300 | nop | 300 | nop |
301 | nop | 301 | nop |
302 | str r0, [r1, #0x04] // MIUCOM = auto-refresh | 302 | str r0, [r1, #0x04] // MIUCOM = auto-refresh |
303 | nop | 303 | nop |
304 | nop | 304 | nop |
305 | nop | 305 | nop |
306 | nop | 306 | nop |
307 | str r0, [r1, #0x04] // MIUCOM = auto-refresh | 307 | str r0, [r1, #0x04] // MIUCOM = auto-refresh |
308 | nop | 308 | nop |
309 | nop | 309 | nop |
310 | nop | 310 | nop |
311 | nop | 311 | nop |
312 | // set mode register | 312 | // set mode register |
313 | mov r0, #SDR_MRS | 313 | mov r0, #SDR_MRS |
314 | str r0, [r1, #0x0C] // MIUMRS | 314 | str r0, [r1, #0x0C] // MIUMRS |
315 | ldr r0, =0x103 | 315 | ldr r0, =0x103 |
316 | str r0, [r1, #0x04] // MIUCOM = mode register set | 316 | str r0, [r1, #0x04] // MIUCOM = mode register set |
317 | ldr r0, =SDR_EMRS | 317 | ldr r0, =SDR_EMRS |
318 | str r0, [r1, #0x0C] // MIUMRS | 318 | str r0, [r1, #0x0C] // MIUMRS |
319 | ldr r0, =0x103 | 319 | ldr r0, =0x103 |
320 | str r0, [r1, #0x04] // MIUCOM = mode register set | 320 | str r0, [r1, #0x04] // MIUCOM = mode register set |
321 | #endif /* MEIZU_M6SP */ | 321 | #endif /* MEIZU_M6SP */ |
322 | 322 | ||
323 | mov r1, #0x1 | 323 | mov r1, #0x1 |
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c index 0626a91514..419c71a867 100644 --- a/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c +++ b/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c | |||
@@ -48,7 +48,7 @@ void power_off(void) | |||
48 | 48 | ||
49 | void power_init(void) | 49 | void power_init(void) |
50 | { | 50 | { |
51 | pmu_write(0x1e, 15); /* Vcore = 1.000V */ | 51 | /* TODO */ |
52 | } | 52 | } |
53 | 53 | ||
54 | #if CONFIG_CHARGING | 54 | #if CONFIG_CHARGING |