4 files changed, 52 insertions, 52 deletions

diff --git a/firmware/panic.c b/firmware/panic.c
index 36eec67f12..9230337ba4 100644
--- a/firmware/panic.c
+++ b/firmware/panic.c
@@ -32,7 +32,7 @@
 #include "system.h"
 
 static char panic_buf[128];
-#define LINECHARS (LCD_WIDTH/SYSFONT_WIDTH) - 2
+#define LINECHARS (LCD_WIDTH/SYSFONT_WIDTH)
 
 /*
  * "Dude. This is pretty fucked-up, right here." 
diff --git a/firmware/target/arm/s5l8700/app.lds b/firmware/target/arm/s5l8700/app.lds
index ed47ad5643..e431ee1fd7 100644
--- a/firmware/target/arm/s5l8700/app.lds
+++ b/firmware/target/arm/s5l8700/app.lds
@@ -28,7 +28,7 @@ STARTUP(target/arm/s5l8700/crt0.o)
 #define DRAMSIZE (DRAM_SIZE - STUBOFFSET - PLUGINSIZE - CODECSIZE)
 #define CODECORIG (ENDAUDIOADDR)
 #if CONFIG_CPU==S5L8700
-#define IRAMSIZE (128*1024)  /* 256KB total - 128KB for core, 128KB for plugins */
+#define IRAMSIZE (64*1024)  /* 128KB total - 64KB for core, 64KB for plugins */
 #else /* S5L8701 */
 #define IRAMSIZE (96*1024)  /* 176KB total - 96KB for core, 80KB for plugins */
 #endif
@@ -108,7 +108,7 @@ SECTIONS
        stackbegin = .;
        _stackbegin = .;
 #ifdef IPOD_NANO2G
-       . += 0x2000;
+       . += 0x4000;
 #endif
        . += 0x2000;
        stackend = .;
diff --git a/firmware/target/arm/s5l8700/crt0.S b/firmware/target/arm/s5l8700/crt0.S
index fe2a2c1980..bb6d910e22 100644
--- a/firmware/target/arm/s5l8700/crt0.S
+++ b/firmware/target/arm/s5l8700/crt0.S
@@ -260,64 +260,64 @@ start_loc:
 
 #if defined(MEIZU_M6SP) || defined(MEIZU_M3)
     /* setup SDRAM for Meizu M6SP */
-    ldr r1, =0x38200000
-    // configure SDR drive strength and pad settings
+    ldr r1, =0x38200000

+    // configure SDR drive strength and pad settings

     mov r0, #SDR_DSS_SEL_B

-    str r0, [r1, #0x4C] // MIU_DSS_SEL_B
+    str r0, [r1, #0x4C] // MIU_DSS_SEL_B

     mov r0, #SDR_DSS_SEL_O

-    str r0, [r1, #0x50] // MIU_DSS_SEL_O
+    str r0, [r1, #0x50] // MIU_DSS_SEL_O

     mov r0, #SDR_DSS_SEL_C

-    str r0, [r1, #0x54] // MIU_DSS_SEL_C
-    mov r0, #2
-    str r0, [r1, #0x60] // SSTL2_PAD_ON
-    // select SDR mode
+    str r0, [r1, #0x54] // MIU_DSS_SEL_C

+    mov r0, #2

+    str r0, [r1, #0x60] // SSTL2_PAD_ON

+    // select SDR mode

     ldr r0, [r1, #0x40]
-    mov r2, #0xFFFDFFFF
-    and r0, r0, r2
-    orr r0, r0, #1
-    str r0, [r1, #0x40] // MIUORG
+    mov r2, #0xFFFDFFFF

+    and r0, r0, r2

+    orr r0, r0, #1

+    str r0, [r1, #0x40] // MIUORG

     // set controller configuration
     mov r0, #SDR_CONFIG
     str r0, [r1]        // MIUCON
-    // set SDRAM timing
+    // set SDRAM timing

     ldr r0, =SDR_TIMING

-    str r0, [r1, #0x10] // MIUSDPARA
-    // set refresh rate
-    mov r0, #0x1080
-    str r0, [r1, #0x08] // MIUAREF
-    // initialise SDRAM 
-    mov r0, #0x003
-    str r0, [r1, #0x04] // MIUCOM = nop
-    ldr r0, =0x203
-    str r0, [r1, #0x04] // MIUCOM = precharge all banks
-    nop
-    nop
-    nop
-    ldr r0, =0x303
-    str r0, [r1, #0x04] // MIUCOM = auto-refresh
-    nop
-    nop
-    nop
-    nop
-    str r0, [r1, #0x04] // MIUCOM = auto-refresh
-    nop
-    nop
-    nop
-    nop
-    str r0, [r1, #0x04] // MIUCOM = auto-refresh
-    nop
-    nop
-    nop
-    nop
-    // set mode register
+    str r0, [r1, #0x10] // MIUSDPARA

+    // set refresh rate

+    mov r0, #0x1080

+    str r0, [r1, #0x08] // MIUAREF

+    // initialise SDRAM 

+    mov r0, #0x003

+    str r0, [r1, #0x04] // MIUCOM = nop

+    ldr r0, =0x203

+    str r0, [r1, #0x04] // MIUCOM = precharge all banks

+    nop

+    nop

+    nop

+    ldr r0, =0x303

+    str r0, [r1, #0x04] // MIUCOM = auto-refresh

+    nop

+    nop

+    nop

+    nop

+    str r0, [r1, #0x04] // MIUCOM = auto-refresh

+    nop

+    nop

+    nop

+    nop

+    str r0, [r1, #0x04] // MIUCOM = auto-refresh

+    nop

+    nop

+    nop

+    nop

+    // set mode register

     mov r0, #SDR_MRS

-    str r0, [r1, #0x0C] // MIUMRS
-    ldr r0, =0x103
-    str r0, [r1, #0x04] // MIUCOM = mode register set
+    str r0, [r1, #0x0C] // MIUMRS

+    ldr r0, =0x103

+    str r0, [r1, #0x04] // MIUCOM = mode register set

     ldr r0, =SDR_EMRS

-    str r0, [r1, #0x0C] // MIUMRS
-    ldr r0, =0x103
-    str r0, [r1, #0x04] // MIUCOM = mode register set
+    str r0, [r1, #0x0C] // MIUMRS

+    ldr r0, =0x103

+    str r0, [r1, #0x04] // MIUCOM = mode register set

 #endif /* MEIZU_M6SP */
 
     mov r1, #0x1
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c
index 0626a91514..419c71a867 100644
--- a/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c
+++ b/firmware/target/arm/s5l8700/ipodnano2g/power-nano2g.c
@@ -48,7 +48,7 @@ void power_off(void)
 
 void power_init(void)
 {
-    pmu_write(0x1e, 15);  /* Vcore = 1.000V */
+    /* TODO */
 }
 
 #if CONFIG_CHARGING