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-rw-r--r--firmware/asm/arm/corelock.c3
-rw-r--r--firmware/asm/arm/lcd-as-memframe.S4
-rw-r--r--firmware/asm/arm/memcpy.S20
-rw-r--r--firmware/asm/arm/memmove.S20
-rw-r--r--firmware/asm/arm/memset.S26
-rw-r--r--firmware/asm/arm/memset16.S20
-rw-r--r--firmware/asm/arm/thread.c5
7 files changed, 50 insertions, 48 deletions
diff --git a/firmware/asm/arm/corelock.c b/firmware/asm/arm/corelock.c
index b36a40b45b..07ec77a60e 100644
--- a/firmware/asm/arm/corelock.c
+++ b/firmware/asm/arm/corelock.c
@@ -61,6 +61,7 @@ int corelock_try_lock(struct corelock *cl)
61 61
62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */ 62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */
63 asm volatile ( 63 asm volatile (
64 ".syntax unified \n"
64 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */ 65 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */
65 "ldrb r1, [r1] \n" 66 "ldrb r1, [r1] \n"
66 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */ 67 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */
@@ -71,7 +72,7 @@ int corelock_try_lock(struct corelock *cl)
71 "bne 1f \n" /* yes? lock acquired */ 72 "bne 1f \n" /* yes? lock acquired */
72 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */ 73 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */
73 "ands %[rv], %[rv], r1 \n" 74 "ands %[rv], %[rv], r1 \n"
74 "streqb %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */ 75 "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */
75 "1: \n" /* Done */ 76 "1: \n" /* Done */
76 : [rv] "=r"(rval) 77 : [rv] "=r"(rval)
77 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl) 78 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl)
diff --git a/firmware/asm/arm/lcd-as-memframe.S b/firmware/asm/arm/lcd-as-memframe.S
index 52ab0447c2..d42b2a920d 100644
--- a/firmware/asm/arm/lcd-as-memframe.S
+++ b/firmware/asm/arm/lcd-as-memframe.S
@@ -91,9 +91,9 @@ lcd_copy_buffer_rect: @
91 stmia r0!, { r6-r12, r14 } @ 91 stmia r0!, { r6-r12, r14 } @
92 bgt 30b @ octword loop @ 92 bgt 30b @ octword loop @
9340: @ finish line @ 9340: @ finish line @
94 ldreqh r6, [r1], #2 @ finish last halfword if eq ... 94 ldrheq r6, [r1], #2 @ finish last halfword if eq ...
95 add r1, r1, r4, lsl #1 @ 95 add r1, r1, r4, lsl #1 @
96 streqh r6, [r0], #2 @ ... 96 strheq r6, [r0], #2 @ ...
97 add r0, r0, r4, lsl #1 @ 97 add r0, r0, r4, lsl #1 @
98 subs r3, r3, #1 @ next line 98 subs r3, r3, #1 @ next line
99 bgt 10b @ copy line @ 99 bgt 10b @ copy line @
diff --git a/firmware/asm/arm/memcpy.S b/firmware/asm/arm/memcpy.S
index 83d43293e6..86fc6b7930 100644
--- a/firmware/asm/arm/memcpy.S
+++ b/firmware/asm/arm/memcpy.S
@@ -99,22 +99,22 @@ memcpy:
997: ldmfd sp!, {r5 - r8} 997: ldmfd sp!, {r5 - r8}
100 100
1018: movs r2, r2, lsl #31 1018: movs r2, r2, lsl #31
102 ldrneb r3, [r1], #1 102 ldrbne r3, [r1], #1
103 ldrcsb r4, [r1], #1 103 ldrbcs r4, [r1], #1
104 ldrcsb ip, [r1] 104 ldrbcs ip, [r1]
105 strneb r3, [r0], #1 105 strbne r3, [r0], #1
106 strcsb r4, [r0], #1 106 strbcs r4, [r0], #1
107 strcsb ip, [r0] 107 strbcs ip, [r0]
108 108
109 ldmpc regs="r0, r4" 109 ldmpc regs="r0, r4"
110 110
1119: rsb ip, ip, #4 1119: rsb ip, ip, #4
112 cmp ip, #2 112 cmp ip, #2
113 ldrgtb r3, [r1], #1 113 ldrbgt r3, [r1], #1
114 ldrgeb r4, [r1], #1 114 ldrbge r4, [r1], #1
115 ldrb lr, [r1], #1 115 ldrb lr, [r1], #1
116 strgtb r3, [r0], #1 116 strbgt r3, [r0], #1
117 strgeb r4, [r0], #1 117 strbge r4, [r0], #1
118 subs r2, r2, ip 118 subs r2, r2, ip
119 strb lr, [r0], #1 119 strb lr, [r0], #1
120 blt 8b 120 blt 8b
diff --git a/firmware/asm/arm/memmove.S b/firmware/asm/arm/memmove.S
index d8cab048be..e5c9b42928 100644
--- a/firmware/asm/arm/memmove.S
+++ b/firmware/asm/arm/memmove.S
@@ -106,20 +106,20 @@ memmove:
1067: ldmfd sp!, {r5 - r8} 1067: ldmfd sp!, {r5 - r8}
107 107
1088: movs r2, r2, lsl #31 1088: movs r2, r2, lsl #31
109 ldrneb r3, [r1, #-1]! 109 ldrbne r3, [r1, #-1]!
110 ldrcsb r4, [r1, #-1]! 110 ldrbcs r4, [r1, #-1]!
111 ldrcsb ip, [r1, #-1] 111 ldrbcs ip, [r1, #-1]
112 strneb r3, [r0, #-1]! 112 strbne r3, [r0, #-1]!
113 strcsb r4, [r0, #-1]! 113 strbcs r4, [r0, #-1]!
114 strcsb ip, [r0, #-1] 114 strbcs ip, [r0, #-1]
115 ldmpc regs="r0, r4" 115 ldmpc regs="r0, r4"
116 116
1179: cmp ip, #2 1179: cmp ip, #2
118 ldrgtb r3, [r1, #-1]! 118 ldrbgt r3, [r1, #-1]!
119 ldrgeb r4, [r1, #-1]! 119 ldrbge r4, [r1, #-1]!
120 ldrb lr, [r1, #-1]! 120 ldrb lr, [r1, #-1]!
121 strgtb r3, [r0, #-1]! 121 strbgt r3, [r0, #-1]!
122 strgeb r4, [r0, #-1]! 122 strbge r4, [r0, #-1]!
123 subs r2, r2, ip 123 subs r2, r2, ip
124 strb lr, [r0, #-1]! 124 strb lr, [r0, #-1]!
125 blt 8b 125 blt 8b
diff --git a/firmware/asm/arm/memset.S b/firmware/asm/arm/memset.S
index 64cd95cc9e..d727f2a5ec 100644
--- a/firmware/asm/arm/memset.S
+++ b/firmware/asm/arm/memset.S
@@ -34,8 +34,8 @@
341: cmp r2, #4 @ 1 do we have enough 341: cmp r2, #4 @ 1 do we have enough
35 blt 5f @ 1 bytes to align with? 35 blt 5f @ 1 bytes to align with?
36 cmp r3, #2 @ 1 36 cmp r3, #2 @ 1
37 strgtb r1, [r0, #-1]! @ 1 37 strbgt r1, [r0, #-1]! @ 1
38 strgeb r1, [r0, #-1]! @ 1 38 strbge r1, [r0, #-1]! @ 1
39 strb r1, [r0, #-1]! @ 1 39 strb r1, [r0, #-1]! @ 1
40 sub r2, r2, r3 @ 1 r2 = r2 - r3 40 sub r2, r2, r3 @ 1 r2 = r2 - r3
41 b 2f 41 b 2f
@@ -65,24 +65,24 @@ memset:
65 mov lr, r1 65 mov lr, r1
66 66
673: subs r2, r2, #64 673: subs r2, r2, #64
68 stmgedb r0!, {r1, r3, ip, lr} @ 64 bytes at a time. 68 stmdbge r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
69 stmgedb r0!, {r1, r3, ip, lr} 69 stmdbge r0!, {r1, r3, ip, lr}
70 stmgedb r0!, {r1, r3, ip, lr} 70 stmdbge r0!, {r1, r3, ip, lr}
71 stmgedb r0!, {r1, r3, ip, lr} 71 stmdbge r0!, {r1, r3, ip, lr}
72 bgt 3b 72 bgt 3b
73 ldrpc cond=eq @ Now <64 bytes to go. 73 ldrpc cond=eq @ Now <64 bytes to go.
74/* 74/*
75 * No need to correct the count; we're only testing bits from now on 75 * No need to correct the count; we're only testing bits from now on
76 */ 76 */
77 tst r2, #32 77 tst r2, #32
78 stmnedb r0!, {r1, r3, ip, lr} 78 stmdbne r0!, {r1, r3, ip, lr}
79 stmnedb r0!, {r1, r3, ip, lr} 79 stmdbne r0!, {r1, r3, ip, lr}
80 tst r2, #16 80 tst r2, #16
81 stmnedb r0!, {r1, r3, ip, lr} 81 stmdbne r0!, {r1, r3, ip, lr}
82 ldr lr, [sp], #4 82 ldr lr, [sp], #4
83 83
845: tst r2, #8 845: tst r2, #8
85 stmnedb r0!, {r1, r3} 85 stmdbne r0!, {r1, r3}
86 tst r2, #4 86 tst r2, #4
87 strne r1, [r0, #-4]! 87 strne r1, [r0, #-4]!
88/* 88/*
@@ -90,10 +90,10 @@ memset:
90 * may have an unaligned pointer as well. 90 * may have an unaligned pointer as well.
91 */ 91 */
926: tst r2, #2 926: tst r2, #2
93 strneb r1, [r0, #-1]! 93 strbne r1, [r0, #-1]!
94 strneb r1, [r0, #-1]! 94 strbne r1, [r0, #-1]!
95 tst r2, #1 95 tst r2, #1
96 strneb r1, [r0, #-1]! 96 strbne r1, [r0, #-1]!
97 bx lr 97 bx lr
98.end: 98.end:
99 .size memset,.end-memset 99 .size memset,.end-memset
diff --git a/firmware/asm/arm/memset16.S b/firmware/asm/arm/memset16.S
index 5c787b1bed..226eac39e1 100644
--- a/firmware/asm/arm/memset16.S
+++ b/firmware/asm/arm/memset16.S
@@ -35,7 +35,7 @@
35memset16: 35memset16:
36 tst r0, #2 @ unaligned? 36 tst r0, #2 @ unaligned?
37 cmpne r2, #0 37 cmpne r2, #0
38 strneh r1, [r0], #2 @ store one halfword to align 38 strhne r1, [r0], #2 @ store one halfword to align
39 subne r2, r2, #1 39 subne r2, r2, #1
40 40
41/* 41/*
@@ -54,29 +54,29 @@ memset16:
54 mov lr, r1 54 mov lr, r1
55 55
562: subs r2, r2, #32 562: subs r2, r2, #32
57 stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time. 57 stmiage r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
58 stmgeia r0!, {r1, r3, ip, lr} 58 stmiage r0!, {r1, r3, ip, lr}
59 stmgeia r0!, {r1, r3, ip, lr} 59 stmiage r0!, {r1, r3, ip, lr}
60 stmgeia r0!, {r1, r3, ip, lr} 60 stmiage r0!, {r1, r3, ip, lr}
61 bgt 2b 61 bgt 2b
62 ldrpc cond=eq @ Now <64 bytes to go. 62 ldrpc cond=eq @ Now <64 bytes to go.
63/* 63/*
64 * No need to correct the count; we're only testing bits from now on 64 * No need to correct the count; we're only testing bits from now on
65 */ 65 */
66 tst r2, #16 66 tst r2, #16
67 stmneia r0!, {r1, r3, ip, lr} 67 stmiane r0!, {r1, r3, ip, lr}
68 stmneia r0!, {r1, r3, ip, lr} 68 stmiane r0!, {r1, r3, ip, lr}
69 tst r2, #8 69 tst r2, #8
70 stmneia r0!, {r1, r3, ip, lr} 70 stmiane r0!, {r1, r3, ip, lr}
71 ldr lr, [sp], #4 71 ldr lr, [sp], #4
72 72
734: tst r2, #4 734: tst r2, #4
74 stmneia r0!, {r1, r3} 74 stmiane r0!, {r1, r3}
75 tst r2, #2 75 tst r2, #2
76 strne r1, [r0], #4 76 strne r1, [r0], #4
77 77
78 tst r2, #1 78 tst r2, #1
79 strneh r1, [r0], #2 79 strhne r1, [r0], #2
80 bx lr 80 bx lr
81.end: 81.end:
82 .size memset16,.end-memset16 82 .size memset16,.end-memset16
diff --git a/firmware/asm/arm/thread.c b/firmware/asm/arm/thread.c
index cf685526e3..bd9f950616 100644
--- a/firmware/asm/arm/thread.c
+++ b/firmware/asm/arm/thread.c
@@ -73,15 +73,16 @@ static inline void store_context(void* addr)
73static inline void load_context(const void* addr) 73static inline void load_context(const void* addr)
74{ 74{
75 asm volatile( 75 asm volatile(
76 ".syntax unified \n"
76 "ldr r0, [%0, #40] \n" /* Load start pointer */ 77 "ldr r0, [%0, #40] \n" /* Load start pointer */
77 "cmp r0, #0 \n" /* Check for NULL */ 78 "cmp r0, #0 \n" /* Check for NULL */
78 79
79 /* If not already running, jump to start */ 80 /* If not already running, jump to start */
80#if ARM_ARCH == 4 && defined(USE_THUMB) 81#if ARM_ARCH == 4 && defined(USE_THUMB)
81 "ldmneia %0, { r0, r12 } \n" 82 "ldmiane %0, { r0, r12 } \n"
82 "bxne r12 \n" 83 "bxne r12 \n"
83#else 84#else
84 "ldmneia %0, { r0, pc } \n" 85 "ldmiane %0, { r0, pc } \n"
85#endif 86#endif
86 87
87 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */ 88 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */