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-rw-r--r--firmware/asm/arm/corelock.c3
-rw-r--r--firmware/asm/arm/lcd-as-memframe.S4
-rw-r--r--firmware/asm/arm/memcpy.S20
-rw-r--r--firmware/asm/arm/memmove.S20
-rw-r--r--firmware/asm/arm/memset.S26
-rw-r--r--firmware/asm/arm/memset16.S20
-rw-r--r--firmware/asm/arm/thread.c5
-rw-r--r--firmware/export/config.h5
-rw-r--r--firmware/target/arm/ata-as-arm.S32
-rw-r--r--firmware/target/arm/ipod/video/lcd-as-video.S26
-rw-r--r--firmware/target/arm/pcm-telechips.c5
-rw-r--r--firmware/target/arm/pp/pcm-pp.c7
12 files changed, 89 insertions, 84 deletions
diff --git a/firmware/asm/arm/corelock.c b/firmware/asm/arm/corelock.c
index b36a40b45b..07ec77a60e 100644
--- a/firmware/asm/arm/corelock.c
+++ b/firmware/asm/arm/corelock.c
@@ -61,6 +61,7 @@ int corelock_try_lock(struct corelock *cl)
61 61
62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */ 62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */
63 asm volatile ( 63 asm volatile (
64 ".syntax unified \n"
64 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */ 65 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */
65 "ldrb r1, [r1] \n" 66 "ldrb r1, [r1] \n"
66 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */ 67 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */
@@ -71,7 +72,7 @@ int corelock_try_lock(struct corelock *cl)
71 "bne 1f \n" /* yes? lock acquired */ 72 "bne 1f \n" /* yes? lock acquired */
72 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */ 73 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */
73 "ands %[rv], %[rv], r1 \n" 74 "ands %[rv], %[rv], r1 \n"
74 "streqb %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */ 75 "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */
75 "1: \n" /* Done */ 76 "1: \n" /* Done */
76 : [rv] "=r"(rval) 77 : [rv] "=r"(rval)
77 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl) 78 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl)
diff --git a/firmware/asm/arm/lcd-as-memframe.S b/firmware/asm/arm/lcd-as-memframe.S
index 52ab0447c2..d42b2a920d 100644
--- a/firmware/asm/arm/lcd-as-memframe.S
+++ b/firmware/asm/arm/lcd-as-memframe.S
@@ -91,9 +91,9 @@ lcd_copy_buffer_rect: @
91 stmia r0!, { r6-r12, r14 } @ 91 stmia r0!, { r6-r12, r14 } @
92 bgt 30b @ octword loop @ 92 bgt 30b @ octword loop @
9340: @ finish line @ 9340: @ finish line @
94 ldreqh r6, [r1], #2 @ finish last halfword if eq ... 94 ldrheq r6, [r1], #2 @ finish last halfword if eq ...
95 add r1, r1, r4, lsl #1 @ 95 add r1, r1, r4, lsl #1 @
96 streqh r6, [r0], #2 @ ... 96 strheq r6, [r0], #2 @ ...
97 add r0, r0, r4, lsl #1 @ 97 add r0, r0, r4, lsl #1 @
98 subs r3, r3, #1 @ next line 98 subs r3, r3, #1 @ next line
99 bgt 10b @ copy line @ 99 bgt 10b @ copy line @
diff --git a/firmware/asm/arm/memcpy.S b/firmware/asm/arm/memcpy.S
index 83d43293e6..86fc6b7930 100644
--- a/firmware/asm/arm/memcpy.S
+++ b/firmware/asm/arm/memcpy.S
@@ -99,22 +99,22 @@ memcpy:
997: ldmfd sp!, {r5 - r8} 997: ldmfd sp!, {r5 - r8}
100 100
1018: movs r2, r2, lsl #31 1018: movs r2, r2, lsl #31
102 ldrneb r3, [r1], #1 102 ldrbne r3, [r1], #1
103 ldrcsb r4, [r1], #1 103 ldrbcs r4, [r1], #1
104 ldrcsb ip, [r1] 104 ldrbcs ip, [r1]
105 strneb r3, [r0], #1 105 strbne r3, [r0], #1
106 strcsb r4, [r0], #1 106 strbcs r4, [r0], #1
107 strcsb ip, [r0] 107 strbcs ip, [r0]
108 108
109 ldmpc regs="r0, r4" 109 ldmpc regs="r0, r4"
110 110
1119: rsb ip, ip, #4 1119: rsb ip, ip, #4
112 cmp ip, #2 112 cmp ip, #2
113 ldrgtb r3, [r1], #1 113 ldrbgt r3, [r1], #1
114 ldrgeb r4, [r1], #1 114 ldrbge r4, [r1], #1
115 ldrb lr, [r1], #1 115 ldrb lr, [r1], #1
116 strgtb r3, [r0], #1 116 strbgt r3, [r0], #1
117 strgeb r4, [r0], #1 117 strbge r4, [r0], #1
118 subs r2, r2, ip 118 subs r2, r2, ip
119 strb lr, [r0], #1 119 strb lr, [r0], #1
120 blt 8b 120 blt 8b
diff --git a/firmware/asm/arm/memmove.S b/firmware/asm/arm/memmove.S
index d8cab048be..e5c9b42928 100644
--- a/firmware/asm/arm/memmove.S
+++ b/firmware/asm/arm/memmove.S
@@ -106,20 +106,20 @@ memmove:
1067: ldmfd sp!, {r5 - r8} 1067: ldmfd sp!, {r5 - r8}
107 107
1088: movs r2, r2, lsl #31 1088: movs r2, r2, lsl #31
109 ldrneb r3, [r1, #-1]! 109 ldrbne r3, [r1, #-1]!
110 ldrcsb r4, [r1, #-1]! 110 ldrbcs r4, [r1, #-1]!
111 ldrcsb ip, [r1, #-1] 111 ldrbcs ip, [r1, #-1]
112 strneb r3, [r0, #-1]! 112 strbne r3, [r0, #-1]!
113 strcsb r4, [r0, #-1]! 113 strbcs r4, [r0, #-1]!
114 strcsb ip, [r0, #-1] 114 strbcs ip, [r0, #-1]
115 ldmpc regs="r0, r4" 115 ldmpc regs="r0, r4"
116 116
1179: cmp ip, #2 1179: cmp ip, #2
118 ldrgtb r3, [r1, #-1]! 118 ldrbgt r3, [r1, #-1]!
119 ldrgeb r4, [r1, #-1]! 119 ldrbge r4, [r1, #-1]!
120 ldrb lr, [r1, #-1]! 120 ldrb lr, [r1, #-1]!
121 strgtb r3, [r0, #-1]! 121 strbgt r3, [r0, #-1]!
122 strgeb r4, [r0, #-1]! 122 strbge r4, [r0, #-1]!
123 subs r2, r2, ip 123 subs r2, r2, ip
124 strb lr, [r0, #-1]! 124 strb lr, [r0, #-1]!
125 blt 8b 125 blt 8b
diff --git a/firmware/asm/arm/memset.S b/firmware/asm/arm/memset.S
index 64cd95cc9e..d727f2a5ec 100644
--- a/firmware/asm/arm/memset.S
+++ b/firmware/asm/arm/memset.S
@@ -34,8 +34,8 @@
341: cmp r2, #4 @ 1 do we have enough 341: cmp r2, #4 @ 1 do we have enough
35 blt 5f @ 1 bytes to align with? 35 blt 5f @ 1 bytes to align with?
36 cmp r3, #2 @ 1 36 cmp r3, #2 @ 1
37 strgtb r1, [r0, #-1]! @ 1 37 strbgt r1, [r0, #-1]! @ 1
38 strgeb r1, [r0, #-1]! @ 1 38 strbge r1, [r0, #-1]! @ 1
39 strb r1, [r0, #-1]! @ 1 39 strb r1, [r0, #-1]! @ 1
40 sub r2, r2, r3 @ 1 r2 = r2 - r3 40 sub r2, r2, r3 @ 1 r2 = r2 - r3
41 b 2f 41 b 2f
@@ -65,24 +65,24 @@ memset:
65 mov lr, r1 65 mov lr, r1
66 66
673: subs r2, r2, #64 673: subs r2, r2, #64
68 stmgedb r0!, {r1, r3, ip, lr} @ 64 bytes at a time. 68 stmdbge r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
69 stmgedb r0!, {r1, r3, ip, lr} 69 stmdbge r0!, {r1, r3, ip, lr}
70 stmgedb r0!, {r1, r3, ip, lr} 70 stmdbge r0!, {r1, r3, ip, lr}
71 stmgedb r0!, {r1, r3, ip, lr} 71 stmdbge r0!, {r1, r3, ip, lr}
72 bgt 3b 72 bgt 3b
73 ldrpc cond=eq @ Now <64 bytes to go. 73 ldrpc cond=eq @ Now <64 bytes to go.
74/* 74/*
75 * No need to correct the count; we're only testing bits from now on 75 * No need to correct the count; we're only testing bits from now on
76 */ 76 */
77 tst r2, #32 77 tst r2, #32
78 stmnedb r0!, {r1, r3, ip, lr} 78 stmdbne r0!, {r1, r3, ip, lr}
79 stmnedb r0!, {r1, r3, ip, lr} 79 stmdbne r0!, {r1, r3, ip, lr}
80 tst r2, #16 80 tst r2, #16
81 stmnedb r0!, {r1, r3, ip, lr} 81 stmdbne r0!, {r1, r3, ip, lr}
82 ldr lr, [sp], #4 82 ldr lr, [sp], #4
83 83
845: tst r2, #8 845: tst r2, #8
85 stmnedb r0!, {r1, r3} 85 stmdbne r0!, {r1, r3}
86 tst r2, #4 86 tst r2, #4
87 strne r1, [r0, #-4]! 87 strne r1, [r0, #-4]!
88/* 88/*
@@ -90,10 +90,10 @@ memset:
90 * may have an unaligned pointer as well. 90 * may have an unaligned pointer as well.
91 */ 91 */
926: tst r2, #2 926: tst r2, #2
93 strneb r1, [r0, #-1]! 93 strbne r1, [r0, #-1]!
94 strneb r1, [r0, #-1]! 94 strbne r1, [r0, #-1]!
95 tst r2, #1 95 tst r2, #1
96 strneb r1, [r0, #-1]! 96 strbne r1, [r0, #-1]!
97 bx lr 97 bx lr
98.end: 98.end:
99 .size memset,.end-memset 99 .size memset,.end-memset
diff --git a/firmware/asm/arm/memset16.S b/firmware/asm/arm/memset16.S
index 5c787b1bed..226eac39e1 100644
--- a/firmware/asm/arm/memset16.S
+++ b/firmware/asm/arm/memset16.S
@@ -35,7 +35,7 @@
35memset16: 35memset16:
36 tst r0, #2 @ unaligned? 36 tst r0, #2 @ unaligned?
37 cmpne r2, #0 37 cmpne r2, #0
38 strneh r1, [r0], #2 @ store one halfword to align 38 strhne r1, [r0], #2 @ store one halfword to align
39 subne r2, r2, #1 39 subne r2, r2, #1
40 40
41/* 41/*
@@ -54,29 +54,29 @@ memset16:
54 mov lr, r1 54 mov lr, r1
55 55
562: subs r2, r2, #32 562: subs r2, r2, #32
57 stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time. 57 stmiage r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
58 stmgeia r0!, {r1, r3, ip, lr} 58 stmiage r0!, {r1, r3, ip, lr}
59 stmgeia r0!, {r1, r3, ip, lr} 59 stmiage r0!, {r1, r3, ip, lr}
60 stmgeia r0!, {r1, r3, ip, lr} 60 stmiage r0!, {r1, r3, ip, lr}
61 bgt 2b 61 bgt 2b
62 ldrpc cond=eq @ Now <64 bytes to go. 62 ldrpc cond=eq @ Now <64 bytes to go.
63/* 63/*
64 * No need to correct the count; we're only testing bits from now on 64 * No need to correct the count; we're only testing bits from now on
65 */ 65 */
66 tst r2, #16 66 tst r2, #16
67 stmneia r0!, {r1, r3, ip, lr} 67 stmiane r0!, {r1, r3, ip, lr}
68 stmneia r0!, {r1, r3, ip, lr} 68 stmiane r0!, {r1, r3, ip, lr}
69 tst r2, #8 69 tst r2, #8
70 stmneia r0!, {r1, r3, ip, lr} 70 stmiane r0!, {r1, r3, ip, lr}
71 ldr lr, [sp], #4 71 ldr lr, [sp], #4
72 72
734: tst r2, #4 734: tst r2, #4
74 stmneia r0!, {r1, r3} 74 stmiane r0!, {r1, r3}
75 tst r2, #2 75 tst r2, #2
76 strne r1, [r0], #4 76 strne r1, [r0], #4
77 77
78 tst r2, #1 78 tst r2, #1
79 strneh r1, [r0], #2 79 strhne r1, [r0], #2
80 bx lr 80 bx lr
81.end: 81.end:
82 .size memset16,.end-memset16 82 .size memset16,.end-memset16
diff --git a/firmware/asm/arm/thread.c b/firmware/asm/arm/thread.c
index cf685526e3..bd9f950616 100644
--- a/firmware/asm/arm/thread.c
+++ b/firmware/asm/arm/thread.c
@@ -73,15 +73,16 @@ static inline void store_context(void* addr)
73static inline void load_context(const void* addr) 73static inline void load_context(const void* addr)
74{ 74{
75 asm volatile( 75 asm volatile(
76 ".syntax unified \n"
76 "ldr r0, [%0, #40] \n" /* Load start pointer */ 77 "ldr r0, [%0, #40] \n" /* Load start pointer */
77 "cmp r0, #0 \n" /* Check for NULL */ 78 "cmp r0, #0 \n" /* Check for NULL */
78 79
79 /* If not already running, jump to start */ 80 /* If not already running, jump to start */
80#if ARM_ARCH == 4 && defined(USE_THUMB) 81#if ARM_ARCH == 4 && defined(USE_THUMB)
81 "ldmneia %0, { r0, r12 } \n" 82 "ldmiane %0, { r0, r12 } \n"
82 "bxne r12 \n" 83 "bxne r12 \n"
83#else 84#else
84 "ldmneia %0, { r0, pc } \n" 85 "ldmiane %0, { r0, pc } \n"
85#endif 86#endif
86 87
87 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */ 88 "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 0882cad61c..19ee03b4c7 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -1006,13 +1006,14 @@ Lyre prototype 1 */
1006#endif 1006#endif
1007 1007
1008#if defined(CPU_ARM) && defined(__ASSEMBLER__) 1008#if defined(CPU_ARM) && defined(__ASSEMBLER__)
1009.syntax unified
1009/* ARMv4T doesn't switch the T bit when popping pc directly, we must use BX */ 1010/* ARMv4T doesn't switch the T bit when popping pc directly, we must use BX */
1010.macro ldmpc cond="", order="ia", regs 1011.macro ldmpc cond="", order="ia", regs
1011#if ARM_ARCH == 4 && defined(USE_THUMB) 1012#if ARM_ARCH == 4 && defined(USE_THUMB)
1012 ldm\cond\order sp!, { \regs, lr } 1013 ldm\order\cond sp!, { \regs, lr }
1013 bx\cond lr 1014 bx\cond lr
1014#else 1015#else
1015 ldm\cond\order sp!, { \regs, pc } 1016 ldm\order\cond sp!, { \regs, pc }
1016#endif 1017#endif
1017.endm 1018.endm
1018.macro ldrpc cond="" 1019.macro ldrpc cond=""
diff --git a/firmware/target/arm/ata-as-arm.S b/firmware/target/arm/ata-as-arm.S
index 101bc4dcc1..16c2928bf1 100644
--- a/firmware/target/arm/ata-as-arm.S
+++ b/firmware/target/arm/ata-as-arm.S
@@ -139,9 +139,9 @@ copy_read_sectors:
139.r_end2_u: 139.r_end2_u:
140 140
141 tst r1, #1 /* one halfword left? */ 141 tst r1, #1 /* one halfword left? */
142 ldrneh r4, [r2] 142 ldrhne r4, [r2]
143 orrne r3, r3, r4, lsl #8 143 orrne r3, r3, r4, lsl #8
144 strneh r3, [r0], #2 144 strhne r3, [r0], #2
145 movne r3, r4, lsr #8 145 movne r3, r4, lsr #8
146 146
147 strb r3, [r0], #1 /* store final byte */ 147 strb r3, [r0], #1 /* store final byte */
@@ -151,8 +151,8 @@ copy_read_sectors:
151 /* 16-bit aligned */ 151 /* 16-bit aligned */
152.r_aligned: 152.r_aligned:
153 tst r0, #2 /* 32 bit aligned? */ 153 tst r0, #2 /* 32 bit aligned? */
154 ldrneh r3, [r2] /* no: read first halfword */ 154 ldrhne r3, [r2] /* no: read first halfword */
155 strneh r3, [r0], #2 /* store */ 155 strhne r3, [r0], #2 /* store */
156 subne r1, r1, #1 /* one halfword taken */ 156 subne r1, r1, #1 /* one halfword taken */
157 157
158 sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */ 158 sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
@@ -186,14 +186,14 @@ copy_read_sectors:
186.r_end4_a: 186.r_end4_a:
187 187
188 tst r1, #2 /* 2 or more halfwords left? */ 188 tst r1, #2 /* 2 or more halfwords left? */
189 ldrneh r3, [r2] 189 ldrhne r3, [r2]
190 ldrneh r4, [r2] 190 ldrhne r4, [r2]
191 orrne r3, r3, r4, lsl #16 191 orrne r3, r3, r4, lsl #16
192 strne r3, [r0], #4 192 strne r3, [r0], #4
193 193
194 tst r1, #1 /* one halfword left? */ 194 tst r1, #1 /* one halfword left? */
195 ldrneh r3, [r2] 195 ldrhne r3, [r2]
196 strneh r3, [r0], #2 196 strhne r3, [r0], #2
197 197
198 ldmpc regs=r4-r5 198 ldmpc regs=r4-r5
199 199
@@ -291,9 +291,9 @@ copy_write_sectors:
291.w_end2_u: 291.w_end2_u:
292 292
293 tst r1, #1 /* one halfword left? */ 293 tst r1, #1 /* one halfword left? */
294 ldrneh r4, [r0], #2 294 ldrhne r4, [r0], #2
295 orrne r3, r3, r4, lsl #8 295 orrne r3, r3, r4, lsl #8
296 strneh r3, [r2] 296 strhne r3, [r2]
297 movne r3, r3, lsr #16 297 movne r3, r3, lsr #16
298 298
299 ldrb r4, [r0], #1 /* load final byte */ 299 ldrb r4, [r0], #1 /* load final byte */
@@ -305,8 +305,8 @@ copy_write_sectors:
305 /* 16-bit aligned */ 305 /* 16-bit aligned */
306.w_aligned: 306.w_aligned:
307 tst r0, #2 /* 32 bit aligned? */ 307 tst r0, #2 /* 32 bit aligned? */
308 ldrneh r3, [r0], #2 /* no: load first halfword */ 308 ldrhne r3, [r0], #2 /* no: load first halfword */
309 strneh r3, [r2] /* write */ 309 strhne r3, [r2] /* write */
310 subne r1, r1, #1 /* one halfword taken */ 310 subne r1, r1, #1 /* one halfword taken */
311 311
312 sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */ 312 sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
@@ -341,13 +341,13 @@ copy_write_sectors:
341 341
342 tst r1, #2 /* 2 or more halfwords left? */ 342 tst r1, #2 /* 2 or more halfwords left? */
343 ldrne r3, [r0], #4 343 ldrne r3, [r0], #4
344 strneh r3, [r2] 344 strhne r3, [r2]
345 movne r3, r3, lsr #16 345 movne r3, r3, lsr #16
346 strneh r3, [r2] 346 strhne r3, [r2]
347 347
348 tst r1, #1 /* one halfword left? */ 348 tst r1, #1 /* one halfword left? */
349 ldrneh r3, [r0], #2 349 ldrhne r3, [r0], #2
350 strneh r3, [r2] 350 strhne r3, [r2]
351 351
352 ldmpc regs=r4-r5 352 ldmpc regs=r4-r5
353 353
diff --git a/firmware/target/arm/ipod/video/lcd-as-video.S b/firmware/target/arm/ipod/video/lcd-as-video.S
index 47155b8c75..7d6caef448 100644
--- a/firmware/target/arm/ipod/video/lcd-as-video.S
+++ b/firmware/target/arm/ipod/video/lcd-as-video.S
@@ -40,24 +40,24 @@ lcd_write_data: /* r1 = pixel count, must be even */
40 40
41 subs r1, r1, #16 41 subs r1, r1, #16
42.loop16: 42.loop16:
43 ldmgeia r0!, {r2-r3} 43 ldmiage r0!, {r2-r3}
44 stmgeia lr, {r2-r3} 44 stmiage lr, {r2-r3}
45 ldmgeia r0!, {r2-r3} 45 ldmiage r0!, {r2-r3}
46 stmgeia lr, {r2-r3} 46 stmiage lr, {r2-r3}
47 ldmgeia r0!, {r2-r3} 47 ldmiage r0!, {r2-r3}
48 stmgeia lr, {r2-r3} 48 stmiage lr, {r2-r3}
49 ldmgeia r0!, {r2-r3} 49 ldmiage r0!, {r2-r3}
50 stmgeia lr, {r2-r3} 50 stmiage lr, {r2-r3}
51 subges r1, r1, #16 51 subsge r1, r1, #16
52 bge .loop16 52 bge .loop16
53 53
54 /* no need to correct the count, we're just checking bits from now */ 54 /* no need to correct the count, we're just checking bits from now */
55 tst r1, #8 55 tst r1, #8
56 ldmneia r0!, {r2-r4, r12} 56 ldmiane r0!, {r2-r4, r12}
57 stmneia lr, {r2-r4, r12} 57 stmiane lr, {r2-r4, r12}
58 tst r1, #4 58 tst r1, #4
59 ldmneia r0!, {r2-r3} 59 ldmiane r0!, {r2-r3}
60 stmneia lr, {r2-r3} 60 stmiane lr, {r2-r3}
61 tst r1, #2 61 tst r1, #2
62 ldrne r3, [r0], #4 62 ldrne r3, [r0], #4
63 strne r3, [lr] 63 strne r3, [lr]
diff --git a/firmware/target/arm/pcm-telechips.c b/firmware/target/arm/pcm-telechips.c
index 336b5626ca..747765d8fb 100644
--- a/firmware/target/arm/pcm-telechips.c
+++ b/firmware/target/arm/pcm-telechips.c
@@ -218,6 +218,7 @@ void fiq_handler(void)
218 * r0-r3 and r12 is a working register. 218 * r0-r3 and r12 is a working register.
219 */ 219 */
220 asm volatile ( 220 asm volatile (
221 ".syntax unified \n"
221 "sub lr, lr, #4 \n" 222 "sub lr, lr, #4 \n"
222 "stmfd sp!, { r0-r3, lr } \n" /* stack scratch regs and lr */ 223 "stmfd sp!, { r0-r3, lr } \n" /* stack scratch regs and lr */
223 "mov r14, #0 \n" /* Was the callback called? */ 224 "mov r14, #0 \n" /* Was the callback called? */
@@ -251,7 +252,7 @@ void fiq_handler(void)
251 "stmia r11, { r8-r9 } \n" /* save p and size */ 252 "stmia r11, { r8-r9 } \n" /* save p and size */
252 253
253 "cmp r14, #0 \n" /* Callback called? */ 254 "cmp r14, #0 \n" /* Callback called? */
254 "ldmeqfd sp!, { r0-r3, pc }^ \n" /* no? -> exit */ 255 "ldmfdeq sp!, { r0-r3, pc }^ \n" /* no? -> exit */
255 256
256 "ldr r1, =pcm_play_status_callback \n" 257 "ldr r1, =pcm_play_status_callback \n"
257 "ldr r1, [r1] \n" 258 "ldr r1, [r1] \n"
@@ -268,7 +269,7 @@ void fiq_handler(void)
268 "mov lr, pc \n" 269 "mov lr, pc \n"
269 "ldr pc, =pcm_play_dma_complete_callback \n" 270 "ldr pc, =pcm_play_dma_complete_callback \n"
270 "cmp r0, #0 \n" /* any more to play? */ 271 "cmp r0, #0 \n" /* any more to play? */
271 "ldmneia r11, { r8-r9 } \n" /* load new p and size */ 272 "ldmiane r11, { r8-r9 } \n" /* load new p and size */
272 "cmpne r9, #0x0f \n" /* did we actually get enough data? */ 273 "cmpne r9, #0x0f \n" /* did we actually get enough data? */
273 "bhi .fill_fifo \n" /* not stop and enough? refill */ 274 "bhi .fill_fifo \n" /* not stop and enough? refill */
274 "ldmfd sp!, { r0-r3, pc }^ \n" /* exit */ 275 "ldmfd sp!, { r0-r3, pc }^ \n" /* exit */
diff --git a/firmware/target/arm/pp/pcm-pp.c b/firmware/target/arm/pp/pcm-pp.c
index 0d61eb44ff..fd798f0506 100644
--- a/firmware/target/arm/pp/pcm-pp.c
+++ b/firmware/target/arm/pp/pcm-pp.c
@@ -327,6 +327,7 @@ void fiq_playback(void)
327 */ 327 */
328 asm volatile ( 328 asm volatile (
329 /* No external calls */ 329 /* No external calls */
330 ".syntax unified \n"
330 "sub lr, lr, #4 \n" /* Prepare return address */ 331 "sub lr, lr, #4 \n" /* Prepare return address */
331 "stmfd sp!, { lr } \n" /* stack lr so we can use it */ 332 "stmfd sp!, { lr } \n" /* stack lr so we can use it */
332 "ldr r12, =0xcf001040 \n" /* Some magic from iPodLinux ... */ 333 "ldr r12, =0xcf001040 \n" /* Some magic from iPodLinux ... */
@@ -349,8 +350,8 @@ void fiq_playback(void)
349 "bhi 0b \n" /* ... yes, continue */ 350 "bhi 0b \n" /* ... yes, continue */
350 351
351 "cmp r9, #0 \n" /* either FIFO full or size empty? */ 352 "cmp r9, #0 \n" /* either FIFO full or size empty? */
352 "stmneia r11, { r8-r9 } \n" /* save p and size, if not empty */ 353 "stmiane r11, { r8-r9 } \n" /* save p and size, if not empty */
353 "ldmnefd sp!, { pc }^ \n" /* RFE if not empty */ 354 "ldmfdne sp!, { pc }^ \n" /* RFE if not empty */
354 355
355 /* Making external calls */ 356 /* Making external calls */
356 "1: \n" 357 "1: \n"
@@ -363,7 +364,7 @@ void fiq_playback(void)
363 "mov lr, pc \n" /* long call (not in same section) */ 364 "mov lr, pc \n" /* long call (not in same section) */
364 "bx r3 \n" 365 "bx r3 \n"
365 "cmp r0, #0 \n" /* more data? */ 366 "cmp r0, #0 \n" /* more data? */
366 "ldmeqfd sp!, { r0-r3, pc }^ \n" /* no? -> exit */ 367 "ldmfdeq sp!, { r0-r3, pc }^ \n" /* no? -> exit */
367 368
368 "ldr r14, [r10, #0x1c] \n" /* read IISFIFO_CFG to check FIFO status */ 369 "ldr r14, [r10, #0x1c] \n" /* read IISFIFO_CFG to check FIFO status */
369 "ands r14, r14, #(0xe<<23) \n" /* r14 = (IIS_TX_FREE_COUNT & ~1) << 23 */ 370 "ands r14, r14, #(0xe<<23) \n" /* r14 = (IIS_TX_FREE_COUNT & ~1) << 23 */