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Diffstat (limited to 'firmware/asm/arm/corelock.c')
-rw-r--r--firmware/asm/arm/corelock.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/firmware/asm/arm/corelock.c b/firmware/asm/arm/corelock.c
index b36a40b45b..07ec77a60e 100644
--- a/firmware/asm/arm/corelock.c
+++ b/firmware/asm/arm/corelock.c
@@ -61,6 +61,7 @@ int corelock_try_lock(struct corelock *cl)
61 61
62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */ 62 /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */
63 asm volatile ( 63 asm volatile (
64 ".syntax unified \n"
64 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */ 65 "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */
65 "ldrb r1, [r1] \n" 66 "ldrb r1, [r1] \n"
66 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */ 67 "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */
@@ -71,7 +72,7 @@ int corelock_try_lock(struct corelock *cl)
71 "bne 1f \n" /* yes? lock acquired */ 72 "bne 1f \n" /* yes? lock acquired */
72 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */ 73 "ldrb %[rv], [%[cl], #2] \n" /* || cl->turn == core? */
73 "ands %[rv], %[rv], r1 \n" 74 "ands %[rv], %[rv], r1 \n"
74 "streqb %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */ 75 "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */
75 "1: \n" /* Done */ 76 "1: \n" /* Done */
76 : [rv] "=r"(rval) 77 : [rv] "=r"(rval)
77 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl) 78 : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl)