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authorSolomon Peachy <pizza@shaftnet.org>2020-07-15 19:40:55 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-07-24 21:20:13 +0000
commit092c340a2062fa98b7387fc5fd63578ddae7d0b6 (patch)
tree98ec96946eeb2ae709cb0528cc6998e21bb9b290 /firmware
parent17f7cc92c258bc456a27c3e7c5a19c9409851879 (diff)
downloadrockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.tar.gz
rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.zip
[1/4] Remove SH support and all archos targets
This removes all code specific to SH targets Change-Id: I7980523785d2596e65c06430f4638eec74a06061
Diffstat (limited to 'firmware')
-rw-r--r--firmware/SOURCES81
-rw-r--r--firmware/asm/sh/memcpy.S227
-rw-r--r--firmware/asm/sh/memmove.S222
-rw-r--r--firmware/asm/sh/memset.S109
-rw-r--r--firmware/asm/sh/strlen.S96
-rw-r--r--firmware/asm/sh/thread.c96
-rw-r--r--firmware/asm/sh/thread.h30
-rw-r--r--firmware/asm/thread.c2
-rw-r--r--firmware/asm/thread.h2
-rw-r--r--firmware/common/file_internal.c3
-rw-r--r--firmware/debug.c193
-rw-r--r--firmware/drivers/audio/mas35xx.c285
-rw-r--r--firmware/drivers/audio/sdl.c22
-rw-r--r--firmware/drivers/button.c9
-rw-r--r--firmware/drivers/fmradio.c121
-rw-r--r--firmware/drivers/rtc/rtc_m41st84w.c296
-rw-r--r--firmware/drivers/tuner/s1a0903x01.c179
-rw-r--r--firmware/export/audiohw.h2
-rw-r--r--firmware/export/audiohw_settings.h10
-rw-r--r--firmware/export/config.h48
-rw-r--r--firmware/export/config/archosfmrecorder.h147
-rw-r--r--firmware/export/config/archosondiofm.h147
-rw-r--r--firmware/export/config/archosondiosp.h131
-rw-r--r--firmware/export/config/archosplayer.h111
-rw-r--r--firmware/export/config/archosrecorder.h141
-rw-r--r--firmware/export/config/archosrecorderv2.h147
-rw-r--r--firmware/export/cpu.h3
-rw-r--r--firmware/export/hwcompat.h31
-rw-r--r--firmware/export/mas35xx.h292
-rw-r--r--firmware/export/mascodec.h45
-rw-r--r--firmware/export/mp3_playback.h9
-rw-r--r--firmware/export/rtc.h10
-rw-r--r--firmware/export/s1a0903x01.h42
-rw-r--r--firmware/export/sh7034.h376
-rw-r--r--firmware/export/sound.h11
-rw-r--r--firmware/export/tuner.h9
-rw-r--r--firmware/export/usb.h8
-rw-r--r--firmware/firmware.make4
-rw-r--r--firmware/rolo.c113
-rw-r--r--firmware/rom.lds3
-rw-r--r--firmware/sound.c76
-rw-r--r--firmware/target/hosted/sdl/sim-ui-defines.h38
-rw-r--r--firmware/target/sh/adc-sh.c110
-rw-r--r--firmware/target/sh/archos/app.lds145
-rw-r--r--firmware/target/sh/archos/ata-archos.c71
-rw-r--r--firmware/target/sh/archos/ata-as-archos.S233
-rw-r--r--firmware/target/sh/archos/ata-target.h45
-rw-r--r--firmware/target/sh/archos/audio-archos.c543
-rw-r--r--firmware/target/sh/archos/boot.lds81
-rw-r--r--firmware/target/sh/archos/descramble.S121
-rw-r--r--firmware/target/sh/archos/fm_v2/adc-target.h41
-rw-r--r--firmware/target/sh/archos/fm_v2/backlight-target.h51
-rw-r--r--firmware/target/sh/archos/fm_v2/button-fm_v2.c99
-rw-r--r--firmware/target/sh/archos/fm_v2/button-target.h47
-rw-r--r--firmware/target/sh/archos/fm_v2/power-fm_v2.c115
-rw-r--r--firmware/target/sh/archos/fm_v2/powermgmt-fm_v2.c60
-rw-r--r--firmware/target/sh/archos/fm_v2/usb-fm_v2.c49
-rw-r--r--firmware/target/sh/archos/i2c-archos.c254
-rw-r--r--firmware/target/sh/archos/lcd-archos-bitmap.c224
-rw-r--r--firmware/target/sh/archos/lcd-as-archos-bitmap.S354
-rw-r--r--firmware/target/sh/archos/mascodec-archos.c491
-rw-r--r--firmware/target/sh/archos/ondio/adc-target.h37
-rw-r--r--firmware/target/sh/archos/ondio/ata_mmc.c978
-rw-r--r--firmware/target/sh/archos/ondio/backlight-target.h49
-rw-r--r--firmware/target/sh/archos/ondio/button-ondio.c71
-rw-r--r--firmware/target/sh/archos/ondio/button-target.h39
-rw-r--r--firmware/target/sh/archos/ondio/fmradio_i2c-ondio.c202
-rw-r--r--firmware/target/sh/archos/ondio/power-ondio.c78
-rw-r--r--firmware/target/sh/archos/ondio/powermgmt-ondio.c53
-rw-r--r--firmware/target/sh/archos/ondio/usb-ondio.c61
-rw-r--r--firmware/target/sh/archos/player/adc-target.h35
-rw-r--r--firmware/target/sh/archos/player/backlight-target.h46
-rw-r--r--firmware/target/sh/archos/player/button-player.c76
-rw-r--r--firmware/target/sh/archos/player/button-target.h52
-rw-r--r--firmware/target/sh/archos/player/hwcompat-player.c28
-rw-r--r--firmware/target/sh/archos/player/lcd-as-player.S274
-rw-r--r--firmware/target/sh/archos/player/lcd-player.c213
-rw-r--r--firmware/target/sh/archos/player/power-player.c84
-rw-r--r--firmware/target/sh/archos/player/powermgmt-player.c64
-rw-r--r--firmware/target/sh/archos/player/usb-player.c44
-rw-r--r--firmware/target/sh/archos/recorder/adc-target.h41
-rw-r--r--firmware/target/sh/archos/recorder/backlight-target.h51
-rw-r--r--firmware/target/sh/archos/recorder/button-recorder.c110
-rw-r--r--firmware/target/sh/archos/recorder/button-target.h59
-rw-r--r--firmware/target/sh/archos/recorder/power-recorder.c107
-rw-r--r--firmware/target/sh/archos/recorder/powermgmt-recorder.c501
-rw-r--r--firmware/target/sh/archos/recorder/powermgmt-target.h89
-rw-r--r--firmware/target/sh/archos/recorder/usb-recorder.c49
-rw-r--r--firmware/target/sh/archos/timer-archos.c84
-rw-r--r--firmware/target/sh/archos/uart-archos.c167
-rw-r--r--firmware/target/sh/bitswap.S152
-rw-r--r--firmware/target/sh/crt0.S219
-rw-r--r--firmware/target/sh/debug-sh.c285
-rw-r--r--firmware/target/sh/kernel-sh.c65
-rw-r--r--firmware/target/sh/system-sh.c450
-rw-r--r--firmware/target/sh/system-target.h154
-rw-r--r--firmware/test/buflib/Makefile67
-rw-r--r--firmware/test/buflib/autoconf.h2
-rw-r--r--firmware/test/buflib/system-hosted.h43
-rw-r--r--firmware/test/buflib/test_main.c88
-rw-r--r--firmware/test/buflib/test_main2.c108
-rw-r--r--firmware/test/buflib/test_max.c75
-rw-r--r--firmware/test/buflib/test_move.c63
-rw-r--r--firmware/test/buflib/test_move2.c132
-rw-r--r--firmware/test/buflib/test_shrink.c56
-rw-r--r--firmware/test/buflib/test_shrink_cb.c108
-rw-r--r--firmware/test/buflib/test_shrink_startchanged.c59
-rw-r--r--firmware/test/buflib/test_shrink_unaligned.c56
-rw-r--r--firmware/test/buflib/util.c61
-rw-r--r--firmware/test/buflib/util.h30
-rw-r--r--firmware/test/fat/Makefile49
-rw-r--r--firmware/test/fat/README32
-rw-r--r--firmware/test/fat/ata-sim.c68
-rw-r--r--firmware/test/fat/autoconf.h9
-rw-r--r--firmware/test/fat/main.c724
-rw-r--r--firmware/test/fat/test.sh146
-rw-r--r--firmware/test/fat/test16.sh135
-rw-r--r--firmware/test/i2c/Makefile53
-rw-r--r--firmware/test/i2c/app.lds36
-rw-r--r--firmware/test/i2c/gendata.c31
-rw-r--r--firmware/test/i2c/main.c1280
-rw-r--r--firmware/test/id3/Makefile13
-rw-r--r--firmware/test/kernel/Makefile52
-rw-r--r--firmware/test/kernel/app.lds36
-rw-r--r--firmware/test/kernel/main.c104
-rw-r--r--firmware/test/snprintf/Makefile16
-rw-r--r--firmware/test/snprintf/test.c16
-rw-r--r--firmware/tuner.c5
-rw-r--r--firmware/usb.c2
129 files changed, 19 insertions, 15864 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 5caed4647b..90c1f4011c 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -39,9 +39,9 @@ profile.c
39#if !defined(RKW_FORMAT) && !defined(MI4_FORMAT) && defined(MODEL_NUMBER) 39#if !defined(RKW_FORMAT) && !defined(MI4_FORMAT) && defined(MODEL_NUMBER)
40common/rb-loader.c 40common/rb-loader.c
41#endif 41#endif
42#if !defined(BOOTLOADER) || defined(CPU_SH) 42#if !defined(BOOTLOADER)
43rolo.c 43rolo.c
44#endif /* !defined(BOOTLOADER) || defined(CPU_SH) */ 44#endif /* !defined(BOOTLOADER) */
45timer.c 45timer.c
46debug.c 46debug.c
47#endif /* PLATFORM_NATIVE */ 47#endif /* PLATFORM_NATIVE */
@@ -361,9 +361,7 @@ eeprom_settings.c
361 361
362/* RTC */ 362/* RTC */
363#if (CONFIG_PLATFORM & PLATFORM_NATIVE) 363#if (CONFIG_PLATFORM & PLATFORM_NATIVE)
364#if (CONFIG_RTC == RTC_M41ST84W) 364#if (CONFIG_RTC == RTC_PCF50606)
365drivers/rtc/rtc_m41st84w.c
366#elif (CONFIG_RTC == RTC_PCF50606)
367drivers/rtc/rtc_pcf50606.c 365drivers/rtc/rtc_pcf50606.c
368#elif (CONFIG_RTC == RTC_PCF50605) 366#elif (CONFIG_RTC == RTC_PCF50605)
369drivers/rtc/rtc_pcf50605.c 367drivers/rtc/rtc_pcf50605.c
@@ -406,10 +404,6 @@ tuner.c
406#if (CONFIG_TUNER & LV24020LP) 404#if (CONFIG_TUNER & LV24020LP)
407drivers/tuner/lv24020lp.c 405drivers/tuner/lv24020lp.c
408#endif /* (CONFIG_TUNER & LV24020LP) */ 406#endif /* (CONFIG_TUNER & LV24020LP) */
409#if (CONFIG_TUNER & S1A0903X01)
410drivers/fmradio.c
411drivers/tuner/s1a0903x01.c
412#endif /* (CONFIG_TUNER & S1A0903X01) */
413#if (CONFIG_TUNER & TEA5760) 407#if (CONFIG_TUNER & TEA5760)
414drivers/tuner/tea5760uk.c 408drivers/tuner/tea5760uk.c
415#endif 409#endif
@@ -480,8 +474,6 @@ drivers/audio/wm8731.c
480drivers/audio/as3514.c 474drivers/audio/as3514.c
481#elif defined(HAVE_TLV320) 475#elif defined(HAVE_TLV320)
482drivers/audio/tlv320.c 476drivers/audio/tlv320.c
483#elif defined(HAVE_MAS35XX)
484drivers/audio/mas35xx.c
485#elif defined(HAVE_AK4537) 477#elif defined(HAVE_AK4537)
486drivers/audio/ak4537.c 478drivers/audio/ak4537.c
487#elif defined(HAVE_UDA1341) 479#elif defined(HAVE_UDA1341)
@@ -531,18 +523,7 @@ target/hosted/sdl/pcm-sdl.c
531#endif /* (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER) */ 523#endif /* (CONFIG_PLATFORM & PLATFORM_NATIVE) && !defined(BOOTLOADER) */
532 524
533/* CPU Specific - By class then particular chip if applicable */ 525/* CPU Specific - By class then particular chip if applicable */
534#if defined(CPU_SH) 526#if defined(CPU_COLDFIRE)
535
536target/sh/adc-sh.c
537target/sh/bitswap.S
538target/sh/crt0.S
539target/sh/kernel-sh.c
540target/sh/system-sh.c
541target/sh/archos/descramble.S
542target/sh/archos/i2c-archos.c
543target/sh/debug-sh.c
544
545#elif defined(CPU_COLDFIRE)
546 527
547target/coldfire/crt0.S 528target/coldfire/crt0.S
548target/coldfire/kernel-coldfire.c 529target/coldfire/kernel-coldfire.c
@@ -786,16 +767,8 @@ drivers/i2c.c
786/* LCD driver */ 767/* LCD driver */
787#if CONFIG_LCD == LCD_SSD1303 768#if CONFIG_LCD == LCD_SSD1303
788target/arm/as3525/lcd-ssd1303.c 769target/arm/as3525/lcd-ssd1303.c
789#elif CONFIG_LCD == LCD_SSD1801
790target/sh/archos/player/lcd-as-player.S
791target/sh/archos/player/lcd-player.c
792#elif CONFIG_LCD == LCD_SSD1815 770#elif CONFIG_LCD == LCD_SSD1815
793# if CONFIG_CPU == SH7034
794target/sh/archos/lcd-archos-bitmap.c
795target/sh/archos/lcd-as-archos-bitmap.S
796# else
797target/arm/lcd-ssd1815.c 771target/arm/lcd-ssd1815.c
798# endif
799#elif CONFIG_LCD == LCD_HX8340B 772#elif CONFIG_LCD == LCD_HX8340B
800target/arm/rk27xx/lcd-hifiman.c 773target/arm/rk27xx/lcd-hifiman.c
801#elif CONFIG_LCD == LCD_C200 774#elif CONFIG_LCD == LCD_C200
@@ -907,19 +880,6 @@ target/arm/tcc77x/adc-tcc77x.c
907 880
908#endif /* CONFIG_I2C */ 881#endif /* CONFIG_I2C */
909 882
910#ifdef CPU_SH
911target/sh/archos/mascodec-archos.c
912target/sh/archos/audio-archos.c
913target/sh/archos/timer-archos.c
914# if CONFIG_STORAGE & STORAGE_ATA
915target/sh/archos/ata-archos.c
916target/sh/archos/ata-as-archos.S
917# endif
918# ifdef HAVE_SERIAL
919target/sh/archos/uart-archos.c
920# endif
921#endif
922
923#ifdef CPU_TCC77X 883#ifdef CPU_TCC77X
924target/arm/usb-tcc.c 884target/arm/usb-tcc.c
925target/arm/tcc77x/kernel-tcc77x.c 885target/arm/tcc77x/kernel-tcc77x.c
@@ -958,39 +918,6 @@ target/arm/s3c2440/gigabeat-fx/timer-meg-fx.c
958# endif 918# endif
959#endif /* CONFIG_CPU == S3C2440 */ 919#endif /* CONFIG_CPU == S3C2440 */
960 920
961#ifdef ARCHOS_PLAYER
962target/sh/archos/player/button-player.c
963target/sh/archos/player/hwcompat-player.c
964target/sh/archos/player/power-player.c
965target/sh/archos/player/powermgmt-player.c
966target/sh/archos/player/usb-player.c
967#endif /* ARCHOS_PLAYER */
968
969#ifdef ARCHOS_RECORDER
970target/sh/archos/recorder/button-recorder.c
971target/sh/archos/recorder/power-recorder.c
972target/sh/archos/recorder/powermgmt-recorder.c
973target/sh/archos/recorder/usb-recorder.c
974#endif /* ARCHOS_RECORDER */
975
976#if defined(ARCHOS_FMRECORDER) || defined(ARCHOS_RECORDERV2)
977target/sh/archos/fm_v2/button-fm_v2.c
978target/sh/archos/fm_v2/power-fm_v2.c
979target/sh/archos/fm_v2/powermgmt-fm_v2.c
980target/sh/archos/fm_v2/usb-fm_v2.c
981#endif /* ARCHOS_FMRECORDER || ARCHOS_RECORDERV2 */
982
983#if defined(ARCHOS_ONDIOFM) || defined(ARCHOS_ONDIOSP)
984target/sh/archos/ondio/button-ondio.c
985target/sh/archos/ondio/power-ondio.c
986target/sh/archos/ondio/powermgmt-ondio.c
987target/sh/archos/ondio/usb-ondio.c
988target/sh/archos/ondio/ata_mmc.c
989#if (CONFIG_TUNER & TEA5767)
990target/sh/archos/ondio/fmradio_i2c-ondio.c
991#endif
992#endif /* ARCHOS_ONDIOFM || ARCHOS_ONDIOFM */
993
994#if defined(SANSA_E200) || defined(SANSA_C200) 921#if defined(SANSA_E200) || defined(SANSA_C200)
995target/arm/sandisk/backlight-c200_e200.c 922target/arm/sandisk/backlight-c200_e200.c
996target/arm/sandisk/power-c200_e200.c 923target/arm/sandisk/power-c200_e200.c
diff --git a/firmware/asm/sh/memcpy.S b/firmware/asm/sh/memcpy.S
deleted file mode 100644
index 3d623c48cd..0000000000
--- a/firmware/asm/sh/memcpy.S
+++ /dev/null
@@ -1,227 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004-2005 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23 .section .icode,"ax",@progbits
24
25 .align 2
26 .global _memcpy
27 .global _mempcpy
28 .global ___memcpy_fwd_entry
29 .type _memcpy,@function
30 .type _mempcpy,@function
31
32/* Copies <length> bytes of data in memory from <source> to <dest>
33 * This version is optimized for speed
34 *
35 * arguments:
36 * r4 - destination address
37 * r5 - source address
38 * r6 - length
39 *
40 * return value:
41 * r0 - destination address (like ANSI version)
42 *
43 * register usage:
44 * r0 - data / scratch
45 * r1 - 2nd data / scratch
46 * r2 - scratch
47 * r3 - first long bound / adjusted end address (only if >= 11 bytes)
48 * r4 - current dest address
49 * r5 - current source address
50 * r6 - source end address
51 * r7 - stored dest start address
52 *
53 * The instruction order is devised in a way to utilize the pipelining
54 * of the SH1 to the max. The routine also tries to utilize fast page mode.
55 */
56_mempcpy:
57 mov r4,r7 /* store dest + length for returning */
58 bra ___memcpy_fwd_entry
59 add r6,r7
60
61_memcpy:
62 mov r4,r7 /* store dest for returning */
63___memcpy_fwd_entry:
64 add #-8,r4 /* offset for early increment (max. 2 longs) */
65 mov #11,r0
66 cmp/hs r0,r6 /* at least 11 bytes to copy? (ensures 2 aligned longs) */
67 add r5,r6 /* r6 = source_end */
68 bf .start_b2 /* no: jump directly to byte loop */
69
70 mov #3,r0
71 neg r5,r3
72 and r0,r3 /* r3 = (4 - align_offset) % 4 */
73 tst r3,r3 /* already aligned? */
74 bt .end_b1 /* yes: skip leading byte loop */
75
76 add r5,r3 /* r3 = first source long bound */
77
78 /* leading byte loop: copies 0..3 bytes */
79.loop_b1:
80 mov.b @r5+,r0 /* load byte & increment source addr */
81 add #1,r4 /* increment dest addr */
82 mov.b r0,@(7,r4) /* store byte */
83 cmp/hi r5,r3 /* runs r5 up to first long bound */
84 bt .loop_b1
85 /* now r5 is always at a long boundary */
86 /* -> memory reading is done in longs for all dest alignments */
87
88 /* selector for main copy loop */
89.end_b1:
90 mov #3,r1
91 and r4,r1 /* r1 = dest alignment offset */
92 mova .jmptab,r0
93 mov.b @(r0,r1),r1 /* select appropriate main loop */
94 add r0,r1
95 mov r6,r3 /* move end address to r3 */
96 jmp @r1 /* and jump to it */
97 add #-7,r3 /* adjust end addr for main loops doing 2 longs/pass */
98
99 /** main loops, copying 2 longs per pass to profit from fast page mode **/
100
101 /* long aligned destination (fastest) */
102 .align 2
103.loop_do0:
104 mov.l @r5+,r1 /* load first long & increment source addr */
105 add #16,r4 /* increment dest addr & account for decrementing stores */
106 mov.l @r5+,r0 /* load second long & increment source addr */
107 cmp/hi r5,r3 /* runs r5 up to last or second last long bound */
108 mov.l r0,@-r4 /* store second long */
109 mov.l r1,@-r4 /* store first long; NOT ALIGNED - no speed loss here! */
110 bt .loop_do0
111
112 add #4,r3 /* readjust end address */
113 cmp/hi r5,r3 /* one long left? */
114 bf .start_b2 /* no, jump to trailing byte loop */
115
116 mov.l @r5+,r0 /* load last long & increment source addr */
117 add #4,r4 /* increment dest addr */
118 bra .start_b2 /* jump to trailing byte loop */
119 mov.l r0,@(4,r4) /* store last long */
120
121 /* word aligned destination (long + 2) */
122 .align 2
123.loop_do2:
124 mov.l @r5+,r1 /* load first long & increment source addr */
125 add #16,r4 /* increment dest addr */
126 mov.l @r5+,r0 /* load second long & increment source addr */
127 cmp/hi r5,r3 /* runs r5 up to last or second last long bound */
128 mov.w r0,@-r4 /* store low word of second long */
129 xtrct r1,r0 /* extract low word of first long & high word of second long */
130 mov.l r0,@-r4 /* and store as long */
131 swap.w r1,r0 /* get high word of first long */
132 mov.w r0,@-r4 /* and store it */
133 bt .loop_do2
134
135 add #4,r3 /* readjust end address */
136 cmp/hi r5,r3 /* one long left? */
137 bf .start_b2 /* no, jump to trailing byte loop */
138
139 mov.l @r5+,r0 /* load last long & increment source addr */
140 add #4,r4 /* increment dest addr */
141 mov.w r0,@(6,r4) /* store low word */
142 shlr16 r0 /* get high word */
143 bra .start_b2 /* jump to trailing byte loop */
144 mov.w r0,@(4,r4) /* and store it */
145
146 /* jumptable for loop selector */
147 .align 2
148.jmptab:
149 .byte .loop_do0 - .jmptab /* placed in the middle because the SH1 */
150 .byte .loop_do1 - .jmptab /* loads bytes sign-extended. Otherwise */
151 .byte .loop_do2 - .jmptab /* the last loop would be out of reach */
152 .byte .loop_do3 - .jmptab /* of the offset range. */
153
154 /* byte aligned destination (long + 1) */
155 .align 2
156.loop_do1:
157 mov.l @r5+,r1 /* load first long & increment source addr */
158 add #16,r4 /* increment dest addr */
159 mov.l @r5+,r0 /* load second long & increment source addr */
160 cmp/hi r5,r3 /* runs r5 up to last or second last long bound */
161 mov.b r0,@-r4 /* store low byte of second long */
162 shlr8 r0 /* get upper 3 bytes */
163 mov r1,r2 /* copy first long */
164 shll16 r2 /* move low byte of first long all the way up, .. */
165 shll8 r2
166 or r2,r0 /* ..combine with the 3 bytes of second long.. */
167 mov.l r0,@-r4 /* ..and store as long */
168 shlr8 r1 /* get middle 2 bytes */
169 mov.w r1,@-r4 /* store as word */
170 shlr16 r1 /* get upper byte */
171 mov.b r1,@-r4 /* and store */
172 bt .loop_do1
173
174 add #4,r3 /* readjust end address */
175.last_do13:
176 cmp/hi r5,r3 /* one long left? */
177 bf .start_b2 /* no, jump to trailing byte loop */
178
179 mov.l @r5+,r0 /* load last long & increment source addr */
180 add #12,r4 /* increment dest addr */
181 mov.b r0,@-r4 /* store low byte */
182 shlr8 r0 /* get middle 2 bytes */
183 mov.w r0,@-r4 /* store as word */
184 shlr16 r0 /* get upper byte */
185 mov.b r0,@-r4 /* and store */
186 bra .start_b2 /* jump to trailing byte loop */
187 add #-4,r4 /* readjust destination */
188
189 /* byte aligned destination (long + 3) */
190 .align 2
191.loop_do3:
192 mov.l @r5+,r1 /* load first long & increment source addr */
193 add #16,r4 /* increment dest addr */
194 mov.l @r5+,r0 /* load second long & increment source addr */
195 mov r1,r2 /* copy first long */
196 mov.b r0,@-r4 /* store low byte of second long */
197 shlr8 r0 /* get middle 2 bytes */
198 mov.w r0,@-r4 /* store as word */
199 shlr16 r0 /* get upper byte */
200 shll8 r2 /* move lower 3 bytes of first long one up.. */
201 or r2,r0 /* ..combine with the 1 byte of second long.. */
202 mov.l r0,@-r4 /* ..and store as long */
203 shlr16 r1 /* get upper byte of first long.. */
204 shlr8 r1
205 cmp/hi r5,r3 /* runs r5 up to last or second last long bound */
206 mov.b r1,@-r4 /* ..and store */
207 bt .loop_do3
208
209 bra .last_do13 /* handle last longword: reuse routine for (long + 1) */
210 add #4,r3 /* readjust end address */
211
212 /* trailing byte loop: copies 0..3 bytes (or all for < 11 in total) */
213 .align 2
214.loop_b2:
215 mov.b @r5+,r0 /* load byte & increment source addr */
216 add #1,r4 /* increment dest addr */
217 mov.b r0,@(7,r4) /* store byte */
218.start_b2:
219 cmp/hi r5,r6 /* runs r5 up to end address */
220 bt .loop_b2
221
222 rts
223 mov r7,r0 /* return dest start address */
224.end:
225 .size _memcpy,.end-_memcpy
226 .size _mempcpy,.end-_mempcpy
227
diff --git a/firmware/asm/sh/memmove.S b/firmware/asm/sh/memmove.S
deleted file mode 100644
index d5a7160043..0000000000
--- a/firmware/asm/sh/memmove.S
+++ /dev/null
@@ -1,222 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23 .section .icode,"ax",@progbits
24
25 .align 2
26 .global _memmove
27 .type _memmove,@function
28
29/* Moves <length> bytes of data in memory from <source> to <dest>
30 * Regions may overlap.
31 * This version is optimized for speed, and needs the corresponding memcpy
32 * implementation for the forward copy branch.
33 *
34 * arguments:
35 * r4 - destination address
36 * r5 - source address
37 * r6 - length
38 *
39 * return value:
40 * r0 - destination address (like ANSI version)
41 *
42 * register usage:
43 * r0 - data / scratch
44 * r1 - 2nd data / scratch
45 * r2 - scratch
46 * r3 - last long bound / adjusted start address (only if >= 11 bytes)
47 * r4 - current dest address
48 * r5 - source start address
49 * r6 - current source address
50 *
51 * The instruction order is devised in a way to utilize the pipelining
52 * of the SH1 to the max. The routine also tries to utilize fast page mode.
53 */
54
55_memmove:
56 cmp/hi r4,r5 /* source > destination */
57 bf .backward /* no: backward copy */
58 mov.l .memcpy_fwd,r0
59 jmp @r0
60 mov r4,r7 /* store dest for returning */
61
62 .align 2
63.memcpy_fwd:
64 .long ___memcpy_fwd_entry
65
66.backward:
67 add r6,r4 /* r4 = destination end */
68 mov #11,r0
69 cmp/hs r0,r6 /* at least 11 bytes to copy? (ensures 2 aligned longs) */
70 add #-8,r5 /* adjust for late decrement (max. 2 longs) */
71 add r5,r6 /* r6 = source end - 8 */
72 bf .start_b2r /* no: jump directly to byte loop */
73
74 mov #-4,r3 /* r3 = 0xfffffffc */
75 and r6,r3 /* r3 = last source long bound */
76 cmp/hi r3,r6 /* already aligned? */
77 bf .end_b1r /* yes: skip leading byte loop */
78
79.loop_b1r:
80 mov.b @(7,r6),r0 /* load byte */
81 add #-1,r6 /* decrement source addr */
82 mov.b r0,@-r4 /* store byte */
83 cmp/hi r3,r6 /* runs r6 down to last long bound */
84 bt .loop_b1r
85
86.end_b1r:
87 mov #3,r1
88 and r4,r1 /* r1 = dest alignment offset */
89 mova .jmptab_r,r0
90 mov.b @(r0,r1),r1 /* select appropriate main loop.. */
91 add r0,r1
92 mov r5,r3 /* copy start adress to r3 */
93 jmp @r1 /* ..and jump to it */
94 add #7,r3 /* adjust end addr for main loops doing 2 longs/pass */
95
96 /** main loops, copying 2 longs per pass to profit from fast page mode **/
97
98 /* long aligned destination (fastest) */
99 .align 2
100.loop_do0r:
101 mov.l @r6,r1 /* load first long */
102 add #-8,r6 /* decrement source addr */
103 mov.l @(12,r6),r0 /* load second long */
104 cmp/hi r3,r6 /* runs r6 down to first or second long bound */
105 mov.l r0,@-r4 /* store second long */
106 mov.l r1,@-r4 /* store first long; NOT ALIGNED - no speed loss here! */
107 bt .loop_do0r
108
109 add #-4,r3 /* readjust end address */
110 cmp/hi r3,r6 /* first long left? */
111 bf .start_b2r /* no, jump to trailing byte loop */
112
113 mov.l @(4,r6),r0 /* load first long */
114 add #-4,r6 /* decrement source addr */
115 bra .start_b2r /* jump to trailing byte loop */
116 mov.l r0,@-r4 /* store first long */
117
118 /* word aligned destination (long + 2) */
119 .align 2
120.loop_do2r:
121 mov.l @r6,r1 /* load first long */
122 add #-8,r6 /* decrement source addr */
123 mov.l @(12,r6),r0 /* load second long */
124 cmp/hi r3,r6 /* runs r6 down to first or second long bound */
125 mov.w r0,@-r4 /* store low word of second long */
126 xtrct r1,r0 /* extract low word of first long & high word of second long */
127 mov.l r0,@-r4 /* and store as long */
128 shlr16 r1 /* get high word of first long */
129 mov.w r1,@-r4 /* and store it */
130 bt .loop_do2r
131
132 add #-4,r3 /* readjust end address */
133 cmp/hi r3,r6 /* first long left? */
134 bf .start_b2r /* no, jump to trailing byte loop */
135
136 mov.l @(4,r6),r0 /* load first long & decrement source addr */
137 add #-4,r6 /* decrement source addr */
138 mov.w r0,@-r4 /* store low word */
139 shlr16 r0 /* get high word */
140 bra .start_b2r /* jump to trailing byte loop */
141 mov.w r0,@-r4 /* and store it */
142
143 /* jumptable for loop selector */
144 .align 2
145.jmptab_r:
146 .byte .loop_do0r - .jmptab_r /* placed in the middle because the SH1 */
147 .byte .loop_do1r - .jmptab_r /* loads bytes sign-extended. Otherwise */
148 .byte .loop_do2r - .jmptab_r /* the last loop would be out of reach */
149 .byte .loop_do3r - .jmptab_r /* of the offset range. */
150
151 /* byte aligned destination (long + 1) */
152 .align 2
153.loop_do1r:
154 mov.l @r6,r1 /* load first long */
155 add #-8,r6 /* decrement source addr */
156 mov.l @(12,r6),r0 /* load second long */
157 cmp/hi r3,r6 /* runs r6 down to first or second long bound */
158 mov.b r0,@-r4 /* store low byte of second long */
159 shlr8 r0 /* get upper 3 bytes */
160 mov r1,r2 /* copy first long */
161 shll16 r2 /* move low byte of first long all the way up, .. */
162 shll8 r2
163 or r2,r0 /* ..combine with the 3 bytes of second long.. */
164 mov.l r0,@-r4 /* ..and store as long */
165 shlr8 r1 /* get middle 2 bytes */
166 mov.w r1,@-r4 /* store as word */
167 shlr16 r1 /* get upper byte */
168 mov.b r1,@-r4 /* and store */
169 bt .loop_do1r
170
171 add #-4,r3 /* readjust end address */
172.last_do13r:
173 cmp/hi r3,r6 /* first long left? */
174 bf .start_b2r /* no, jump to trailing byte loop */
175
176 nop /* alignment */
177 mov.l @(4,r6),r0 /* load first long */
178 add #-4,r6 /* decrement source addr */
179 mov.b r0,@-r4 /* store low byte */
180 shlr8 r0 /* get middle 2 bytes */
181 mov.w r0,@-r4 /* store as word */
182 shlr16 r0 /* get upper byte */
183 bra .start_b2r /* jump to trailing byte loop */
184 mov.b r0,@-r4 /* and store */
185
186 /* byte aligned destination (long + 3) */
187 .align 2
188.loop_do3r:
189 mov.l @r6,r1 /* load first long */
190 add #-8,r6 /* decrement source addr */
191 mov.l @(12,r6),r0 /* load second long */
192 mov r1,r2 /* copy first long */
193 mov.b r0,@-r4 /* store low byte of second long */
194 shlr8 r0 /* get middle 2 bytes */
195 mov.w r0,@-r4 /* store as word */
196 shlr16 r0 /* get upper byte */
197 shll8 r2 /* move lower 3 bytes of first long one up.. */
198 or r2,r0 /* ..combine with the 1 byte of second long.. */
199 mov.l r0,@-r4 /* ..and store as long */
200 shlr16 r1 /* get upper byte of first long */
201 shlr8 r1
202 cmp/hi r3,r6 /* runs r6 down to first or second long bound */
203 mov.b r1,@-r4 /* ..and store */
204 bt .loop_do3r
205
206 bra .last_do13r /* handle first longword: reuse routine for (long + 1) */
207 add #-4,r3 /* readjust end address */
208
209 /* trailing byte loop: copies 0..3 bytes (or all for < 11 in total) */
210 .align 2
211.loop_b2r:
212 mov.b @(7,r6),r0 /* load byte */
213 add #-1,r6 /* decrement source addr */
214 mov.b r0,@-r4 /* store byte */
215.start_b2r:
216 cmp/hi r5,r6 /* runs r6 down to start address */
217 bt .loop_b2r
218
219 rts
220 mov r4,r0 /* return dest start address */
221.end:
222 .size _memmove,.end-_memmove
diff --git a/firmware/asm/sh/memset.S b/firmware/asm/sh/memset.S
deleted file mode 100644
index 8cae1ea112..0000000000
--- a/firmware/asm/sh/memset.S
+++ /dev/null
@@ -1,109 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23 .section .icode,"ax",@progbits
24
25 .align 2
26 .global _memset
27 .type _memset,@function
28
29/* Fills a memory region with specified byte value
30 * This version is optimized for speed
31 *
32 * arguments:
33 * r4 - start address
34 * r5 - data
35 * r6 - length
36 *
37 * return value:
38 * r0 - start address (like ANSI version)
39 *
40 * register usage:
41 * r0 - temporary
42 * r1 - start address +11 for main loop
43 * r4 - start address
44 * r5 - data (spread to all 4 bytes when using long stores)
45 * r6 - current address (runs down from end to start)
46 *
47 * The instruction order below is devised in a way to utilize the pipelining
48 * of the SH1 to the max. The routine fills memory from end to start in
49 * order to utilize the auto-decrementing store instructions.
50 */
51
52_memset:
53 neg r4,r0
54 and #3,r0 /* r0 = (4 - align_offset) % 4 */
55 add #4,r0
56 cmp/hs r0,r6 /* at least one aligned longword to fill? */
57 add r4,r6 /* r6 = end_address */
58 bf .no_longs /* no, jump directly to byte loop */
59
60 extu.b r5,r5 /* start: spread data to all 4 bytes */
61 swap.b r5,r0
62 or r0,r5 /* data now in 2 lower bytes of r5 */
63 swap.w r5,r0
64 or r0,r5 /* data now in all 4 bytes of r5 */
65
66 mov r6,r0
67 tst #3,r0 /* r0 already long aligned? */
68 bt .end_b1 /* yes: skip loop */
69
70 /* leading byte loop: sets 0..3 bytes */
71.loop_b1:
72 mov.b r5,@-r0 /* store byte */
73 tst #3,r0 /* r0 long aligned? */
74 bf .loop_b1 /* runs r0 down until long aligned */
75
76 mov r0,r6 /* r6 = last long bound */
77 nop /* keep alignment */
78
79.end_b1:
80 mov r4,r1 /* r1 = start_address... */
81 add #11,r1 /* ... + 11, combined for rounding and offset */
82 xor r1,r0
83 tst #4,r0 /* bit 2 tells whether an even or odd number of */
84 bf .loop_odd /* longwords to set */
85
86 /* main loop: set 2 longs per pass */
87.loop_2l:
88 mov.l r5,@-r6 /* store first long */
89.loop_odd:
90 cmp/hi r1,r6 /* runs r6 down to first long bound */
91 mov.l r5,@-r6 /* store second long */
92 bt .loop_2l
93
94.no_longs:
95 cmp/hi r4,r6 /* any bytes left? */
96 bf .end_b2 /* no: skip loop */
97
98 /* trailing byte loop */
99.loop_b2:
100 mov.b r5,@-r6 /* store byte */
101 cmp/hi r4,r6 /* runs r6 down to the start address */
102 bt .loop_b2
103
104.end_b2:
105 rts
106 mov r4,r0 /* return start address */
107
108.end:
109 .size _memset,.end-_memset
diff --git a/firmware/asm/sh/strlen.S b/firmware/asm/sh/strlen.S
deleted file mode 100644
index e7169e25db..0000000000
--- a/firmware/asm/sh/strlen.S
+++ /dev/null
@@ -1,96 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2005 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23 .section .icode,"ax",@progbits
24
25 .align 2
26 .global _strlen
27 .type _strlen,@function
28
29/* Works out the length of a string
30 * This version is optimized for speed
31 *
32 * arguments:
33 * r4 - start address
34 *
35 * return value:
36 * r0 - string length
37 *
38 * register usage:
39 * r0 - current address
40 * r1 - current value (byte/long)
41 * r2 - mask for alignment / zero (for cmp/str)
42 * r4 - start address
43 *
44 */
45
46_strlen:
47 mov r4,r0 /* r0 = start address */
48 tst #3,r0 /* long aligned? */
49 bt .start_l /* yes, jump directly to the longword loop */
50
51 /* not long aligned: check the first 3 bytes */
52 mov.b @r0+,r1 /* fetch first byte */
53 tst r1,r1 /* byte == 0 ? */
54 bt .hitzero /* yes, string end found */
55 mov.b @r0+,r1 /* fetch second byte */
56 mov #3,r2 /* prepare mask: r2 = 0..00000011b */
57 tst r1,r1 /* byte == 0 ? */
58 bt .hitzero /* yes, string end found */
59 mov.b @r0+,r1 /* fetch third byte */
60 not r2,r2 /* prepare mask: r2 = 1..11111100b */
61 tst r1,r1 /* byte == 0 ? */
62 bt .hitzero /* yes, string end found */
63
64 /* not yet found, fall through into longword loop */
65 and r2,r0 /* align down to long bound */
66
67 /* main loop: check longwords */
68.start_l:
69 mov #0,r2 /* zero longword for cmp/str */
70.loop_l:
71 mov.l @r0+,r1 /* fetch long word */
72 cmp/str r1,r2 /* any zero byte within? */
73 bf .loop_l /* no, loop */
74 add #-4,r0 /* set address back to start of this longword */
75
76 /* the last longword contains the string end: figure out the byte */
77 mov.b @r0+,r1 /* fetch first byte */
78 tst r1,r1 /* byte == 0 ? */
79 bt .hitzero /* yes, string end found */
80 mov.b @r0+,r1 /* fetch second byte */
81 tst r1,r1 /* byte == 0 ? */
82 bt .hitzero /* yes, string end found */
83 mov.b @r0+,r1 /* fetch third byte */
84 tst r1,r1 /* byte == 0 ? */
85 bt .hitzero /* yes, string end found */
86 rts /* must be the fourth byte */
87 sub r4,r0 /* len = string_end - string_start */
88
89.hitzero:
90 add #-1,r0 /* undo address increment */
91 rts
92 sub r4,r0 /* len = string_end - string_start */
93
94.end:
95 .size _strlen,.end-_strlen
96
diff --git a/firmware/asm/sh/thread.c b/firmware/asm/sh/thread.c
deleted file mode 100644
index e63470c4a1..0000000000
--- a/firmware/asm/sh/thread.c
+++ /dev/null
@@ -1,96 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Ulf Ralberg
11 *
12 * SH processor threading support
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23
24/*---------------------------------------------------------------------------
25 * Start the thread running and terminate it if it returns
26 *---------------------------------------------------------------------------
27 */
28void start_thread(void); /* Provide C access to ASM label */
29static void USED_ATTR __start_thread(void)
30{
31 /* r8 = context */
32 asm volatile (
33 "_start_thread: \n" /* Start here - no naked attribute */
34 "mov.l @(4, r8), r0 \n" /* Fetch thread function pointer */
35 "mov.l @(28, r8), r15 \n" /* Set initial sp */
36 "mov #0, r1 \n" /* Start the thread */
37 "jsr @r0 \n"
38 "mov.l r1, @(36, r8) \n" /* Clear start address */
39 );
40 thread_exit();
41}
42
43/* Place context pointer in r8 slot, function pointer in r9 slot, and
44 * start_thread pointer in context_start */
45#define THREAD_STARTUP_INIT(core, thread, function) \
46 ({ (thread)->context.r[0] = (uint32_t)&(thread)->context, \
47 (thread)->context.r[1] = (uint32_t)(function), \
48 (thread)->context.start = (uint32_t)start_thread; })
49
50/*---------------------------------------------------------------------------
51 * Store non-volatile context.
52 *---------------------------------------------------------------------------
53 */
54static inline void store_context(void* addr)
55{
56 asm volatile (
57 "add #36, %0 \n" /* Start at last reg. By the time routine */
58 "sts.l pr, @-%0 \n" /* is done, %0 will have the original value */
59 "mov.l r15,@-%0 \n"
60 "mov.l r14,@-%0 \n"
61 "mov.l r13,@-%0 \n"
62 "mov.l r12,@-%0 \n"
63 "mov.l r11,@-%0 \n"
64 "mov.l r10,@-%0 \n"
65 "mov.l r9, @-%0 \n"
66 "mov.l r8, @-%0 \n"
67 : : "r" (addr)
68 );
69}
70
71/*---------------------------------------------------------------------------
72 * Load non-volatile context.
73 *---------------------------------------------------------------------------
74 */
75static inline void load_context(const void* addr)
76{
77 asm volatile (
78 "mov.l @(36, %0), r0 \n" /* Get start address */
79 "tst r0, r0 \n"
80 "bt .running \n" /* NULL -> already running */
81 "jmp @r0 \n" /* r8 = context */
82 ".running: \n"
83 "mov.l @%0+, r8 \n" /* Executes in delay slot and outside it */
84 "mov.l @%0+, r9 \n"
85 "mov.l @%0+, r10 \n"
86 "mov.l @%0+, r11 \n"
87 "mov.l @%0+, r12 \n"
88 "mov.l @%0+, r13 \n"
89 "mov.l @%0+, r14 \n"
90 "mov.l @%0+, r15 \n"
91 "lds.l @%0+, pr \n"
92 : : "r" (addr) : "r0" /* only! */
93 );
94}
95
96
diff --git a/firmware/asm/sh/thread.h b/firmware/asm/sh/thread.h
deleted file mode 100644
index aa5fe519c6..0000000000
--- a/firmware/asm/sh/thread.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Ulf Ralberg
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22struct regs
23{
24 uint32_t r[7]; /* 0-24 - Registers r8 thru r14 */
25 uint32_t sp; /* 28 - Stack pointer (r15) */
26 uint32_t pr; /* 32 - Procedure register */
27 uint32_t start; /* 36 - Thread start address, or NULL when started */
28};
29
30#define DEFAULT_STACK_SIZE 0x400 /* Bytes */
diff --git a/firmware/asm/thread.c b/firmware/asm/thread.c
index d6b881bdc5..c7779b3054 100644
--- a/firmware/asm/thread.c
+++ b/firmware/asm/thread.c
@@ -9,8 +9,6 @@
9 #include "arm/thread.c" 9 #include "arm/thread.c"
10#elif defined(CPU_COLDFIRE) 10#elif defined(CPU_COLDFIRE)
11 #include "m68k/thread.c" 11 #include "m68k/thread.c"
12#elif CONFIG_CPU == SH7034
13 #include "sh/thread.c"
14#elif defined(CPU_MIPS) 12#elif defined(CPU_MIPS)
15 #include "mips/thread.c" 13 #include "mips/thread.c"
16#else 14#else
diff --git a/firmware/asm/thread.h b/firmware/asm/thread.h
index be48095a8c..82edc81deb 100644
--- a/firmware/asm/thread.h
+++ b/firmware/asm/thread.h
@@ -47,8 +47,6 @@ struct regs
47 #include "arm/thread.h" 47 #include "arm/thread.h"
48#elif defined(CPU_COLDFIRE) 48#elif defined(CPU_COLDFIRE)
49 #include "m68k/thread.h" 49 #include "m68k/thread.h"
50#elif CONFIG_CPU == SH7034
51 #include "sh/thread.h"
52#elif defined(CPU_MIPS) 50#elif defined(CPU_MIPS)
53 #include "mips/thread.h" 51 #include "mips/thread.h"
54#endif 52#endif
diff --git a/firmware/common/file_internal.c b/firmware/common/file_internal.c
index a109563092..fe18f90056 100644
--- a/firmware/common/file_internal.c
+++ b/firmware/common/file_internal.c
@@ -36,8 +36,7 @@
36 36
37/* for internal functions' scanning use to save quite a bit of stack space - 37/* for internal functions' scanning use to save quite a bit of stack space -
38 access must be serialized by the writer lock */ 38 access must be serialized by the writer lock */
39#if defined(CPU_SH) || defined(IAUDIO_M5) \ 39#if defined(IAUDIO_M5) || CONFIG_CPU == IMX233
40 || CONFIG_CPU == IMX233
41/* otherwise, out of IRAM */ 40/* otherwise, out of IRAM */
42struct fat_direntry dir_fatent; 41struct fat_direntry dir_fatent;
43#else 42#else
diff --git a/firmware/debug.c b/firmware/debug.c
index bc382335b6..34f89908a3 100644
--- a/firmware/debug.c
+++ b/firmware/debug.c
@@ -30,9 +30,6 @@
30 30
31#ifdef DEBUG 31#ifdef DEBUG
32static char debugmembuf[200]; 32static char debugmembuf[200];
33#if CONFIG_CPU == SH7034
34static char debugbuf[400];
35#endif
36#endif 33#endif
37 34
38#include "kernel.h" 35#include "kernel.h"
@@ -40,194 +37,6 @@ static char debugbuf[400];
40#include "debug.h" 37#include "debug.h"
41 38
42#ifdef DEBUG 39#ifdef DEBUG
43#if CONFIG_CPU == SH7034 /* these are still very SH-oriented */
44void debug_init(void)
45{
46 /* Clear it all! */
47 SSR1 &= ~(SCI_RDRF | SCI_ORER | SCI_PER | SCI_FER);
48
49 /* This enables the serial Rx interrupt, to be able to exit into the
50 debugger when you hit CTRL-C */
51 SCR1 |= 0x40;
52 SCR1 &= ~0x80;
53 IPRE |= 0xf000; /* Set to highest priority */
54}
55
56static int debug_tx_ready(void)
57{
58 return (SSR1 & SCI_TDRE);
59}
60
61static void debug_tx_char(char ch)
62{
63 while (!debug_tx_ready())
64 {
65 ;
66 }
67
68 /*
69 * Write data into TDR and clear TDRE
70 */
71 TDR1 = ch;
72 SSR1 &= ~SCI_TDRE;
73}
74
75static void debug_handle_error(char ssr)
76{
77 (void)ssr;
78 SSR1 &= ~(SCI_ORER | SCI_PER | SCI_FER);
79}
80
81static int debug_rx_ready(void)
82{
83 char ssr;
84
85 ssr = SSR1 & ( SCI_PER | SCI_FER | SCI_ORER );
86 if ( ssr )
87 debug_handle_error ( ssr );
88 return SSR1 & SCI_RDRF;
89}
90
91static char debug_rx_char(void)
92{
93 char ch;
94 char ssr;
95
96 while (!debug_rx_ready())
97 {
98 ;
99 }
100
101 ch = RDR1;
102 SSR1 &= ~SCI_RDRF;
103
104 ssr = SSR1 & (SCI_PER | SCI_FER | SCI_ORER);
105
106 if (ssr)
107 debug_handle_error (ssr);
108
109 return ch;
110}
111
112static const char hexchars[] = "0123456789abcdef";
113
114static char highhex(int x)
115{
116 return hexchars[(x >> 4) & 0xf];
117}
118
119static char lowhex(int x)
120{
121 return hexchars[x & 0xf];
122}
123
124static void putpacket (const char *buffer)
125{
126 register int checksum;
127
128 const char *src = buffer;
129
130 /* Special debug hack. Shut off the Rx IRQ during I/O to prevent the debug
131 stub from interrupting the message */
132 SCR1 &= ~0x40;
133
134 debug_tx_char ('$');
135 checksum = 0;
136
137 while (*src)
138 {
139 int runlen;
140
141 /* Do run length encoding */
142 for (runlen = 0; runlen < 100; runlen ++)
143 {
144 if (src[0] != src[runlen] || runlen == 99)
145 {
146 if (runlen > 3)
147 {
148 int encode;
149 /* Got a useful amount */
150 debug_tx_char (*src);
151 checksum += *src;
152 debug_tx_char ('*');
153 checksum += '*';
154 checksum += (encode = runlen + ' ' - 4);
155 debug_tx_char (encode);
156 src += runlen;
157 }
158 else
159 {
160 debug_tx_char (*src);
161 checksum += *src;
162 src++;
163 }
164 break;
165 }
166 }
167 }
168
169
170 debug_tx_char ('#');
171 debug_tx_char (highhex(checksum));
172 debug_tx_char (lowhex(checksum));
173
174 /* Wait for the '+' */
175 debug_rx_char();
176
177 /* Special debug hack. Enable the IRQ again */
178 SCR1 |= 0x40;
179}
180
181
182/* convert the memory, pointed to by mem into hex, placing result in buf */
183/* return a pointer to the last char put in buf (null) */
184static char *mem2hex (const char *mem, char *buf, int count)
185{
186 int i;
187 int ch;
188 for (i = 0; i < count; i++)
189 {
190 ch = *mem++;
191 *buf++ = highhex (ch);
192 *buf++ = lowhex (ch);
193 }
194 *buf = 0;
195 return (buf);
196}
197
198static void debug(const char *msg)
199{
200 debugbuf[0] = 'O';
201
202 mem2hex(msg, &debugbuf[1], strlen(msg));
203 putpacket(debugbuf);
204}
205#elif defined(HAVE_GDB_API)
206static void *get_api_function(int n)
207{
208 struct gdb_api *api = (struct gdb_api *)GDB_API_ADDRESS;
209 if (api->magic == GDB_API_MAGIC)
210 return api->func[n];
211 else
212 return NULL;
213}
214
215void breakpoint(void)
216{
217 void (*f)(void) = get_api_function(0);
218 if (f) (*f)();
219}
220
221static void debug(char *msg)
222{
223 void (*f)(char *) = get_api_function(1);
224 if (f) (*f)(msg);
225}
226
227void debug_init(void)
228{
229}
230#else /* !SH7034 && !HAVE_GDB_API */
231void debug_init(void) 40void debug_init(void)
232{ 41{
233} 42}
@@ -236,8 +45,6 @@ static inline void debug(char *msg)
236{ 45{
237 (void)msg; 46 (void)msg;
238} 47}
239#endif
240
241#endif /* end of DEBUG section */ 48#endif /* end of DEBUG section */
242 49
243#ifdef __GNUC__ 50#ifdef __GNUC__
diff --git a/firmware/drivers/audio/mas35xx.c b/firmware/drivers/audio/mas35xx.c
deleted file mode 100644
index 65c582c79c..0000000000
--- a/firmware/drivers/audio/mas35xx.c
+++ /dev/null
@@ -1,285 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Driver for MAS35xx audio codec
11 *
12 *
13 * Copyright (c) 2007 by Christian Gmeiner
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 *
20 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
21 * KIND, either express or implied.
22 *
23 ****************************************************************************/
24
25#include "config.h"
26#include "system.h" /* MAX MIN macros */
27#include "sound.h"
28
29int channel_configuration = SOUND_CHAN_STEREO;
30int stereo_width = 100;
31
32#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
33unsigned long mdb_shape_shadow = 0;
34unsigned long loudness_shadow = 0;
35unsigned long shadow_io_control_main;
36#endif
37
38static void set_channel_config(void)
39{
40 /* default values: stereo */
41 unsigned long val_ll = 0x80000;
42 unsigned long val_lr = 0;
43 unsigned long val_rl = 0;
44 unsigned long val_rr = 0x80000;
45 int bank;
46
47 switch(channel_configuration)
48 {
49 /* case SOUND_CHAN_STEREO unnecessary */
50
51 case SOUND_CHAN_MONO:
52 val_ll = 0xc0000;
53 val_lr = 0xc0000;
54 val_rl = 0xc0000;
55 val_rr = 0xc0000;
56 break;
57
58 case SOUND_CHAN_CUSTOM:
59 {
60 /* fixed point variables (matching MAS internal format)
61 integer part: upper 13 bits (inlcuding sign)
62 fractional part: lower 19 bits */
63 long fp_width, fp_straight, fp_cross;
64
65 fp_width = (stereo_width << 19) / 100;
66 if (stereo_width <= 100)
67 {
68 fp_straight = - ((1<<19) + fp_width) / 2;
69 fp_cross = fp_straight + fp_width;
70 }
71 else
72 {
73 /* straight = - (1 + width) / (2 * width) */
74 fp_straight = - ((((1<<19) + fp_width) / (fp_width >> 9)) << 9);
75 fp_cross = (1<<19) + fp_straight;
76 }
77 val_ll = val_rr = fp_straight & 0xfffff;
78 val_lr = val_rl = fp_cross & 0xfffff;
79 }
80 break;
81
82 case SOUND_CHAN_MONO_LEFT:
83 val_ll = 0x80000;
84 val_lr = 0x80000;
85 val_rl = 0;
86 val_rr = 0;
87 break;
88
89 case SOUND_CHAN_MONO_RIGHT:
90 val_ll = 0;
91 val_lr = 0;
92 val_rl = 0x80000;
93 val_rr = 0x80000;
94 break;
95
96 case SOUND_CHAN_KARAOKE:
97 val_ll = 0xc0000;
98 val_lr = 0x40000;
99 val_rl = 0x40000;
100 val_rr = 0xc0000;
101 break;
102 }
103
104#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
105 bank = MAS_BANK_D0;
106#elif CONFIG_CODEC == MAS3507D
107 bank = MAS_BANK_D1;
108#endif
109
110 mas_writemem(bank, MAS_D0_OUT_LL, &val_ll, 1); /* LL */
111 mas_writemem(bank, MAS_D0_OUT_LR, &val_lr, 1); /* LR */
112 mas_writemem(bank, MAS_D0_OUT_RL, &val_rl, 1); /* RL */
113 mas_writemem(bank, MAS_D0_OUT_RR, &val_rr, 1); /* RR */
114}
115
116void audiohw_set_channel(int val)
117{
118 channel_configuration = val;
119 set_channel_config();
120}
121
122void audiohw_set_stereo_width(int val)
123{
124 stereo_width = val;
125 if (channel_configuration == SOUND_CHAN_CUSTOM) {
126 set_channel_config();
127 }
128}
129
130void audiohw_set_bass(int val)
131{
132#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
133 unsigned tmp = ((unsigned)(val * 8) & 0xff) << 8;
134 mas_codec_writereg(MAS_REG_KBASS, tmp);
135#elif CONFIG_CODEC == MAS3507D
136 mas_writereg(MAS_REG_KBASS, bass_table[val+15]);
137#endif
138}
139
140#if CONFIG_CODEC == MAS3507D
141void audiohw_set_prescaler(int val)
142{
143 mas_writereg(MAS_REG_KPRESCALE, prescale_table[val/10]);
144}
145#endif
146
147void audiohw_set_treble(int val)
148{
149#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
150 unsigned tmp = ((unsigned)(val * 8) & 0xff) << 8;
151 mas_codec_writereg(MAS_REG_KTREBLE, tmp);
152#elif CONFIG_CODEC == MAS3507D
153 mas_writereg(MAS_REG_KTREBLE, treble_table[val+15]);
154#endif
155}
156
157#if (CONFIG_CODEC == MAS3507D)
158/* convert tenth of dB volume (-780..+180) to dac3550 register value */
159static unsigned int tenthdb2reg(int db)
160{
161 if (db < -540) /* 3 dB steps */
162 return (db + 780) / 30;
163 else /* 1.5 dB steps */
164 return (db + 660) / 15;
165}
166
167void audiohw_set_volume(int vol_l, int vol_r)
168{
169 dac_volume(tenthdb2reg(vol_l), tenthdb2reg(vol_r), false);
170}
171#endif /* CONFIG_CODEC == MAS3507D */
172
173#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
174void audiohw_set_volume(int val)
175{
176 unsigned tmp = ((unsigned)(val + 115) & 0xff) << 8;
177 mas_codec_writereg(MAS_REG_VOLUME_CONTROL, tmp);
178}
179
180void audiohw_set_loudness(int value)
181{
182 loudness_shadow = (loudness_shadow & 0x04) |
183 (MAX(MIN(value * 4, 0x44), 0) << 8);
184 mas_codec_writereg(MAS_REG_KLOUDNESS, loudness_shadow);
185}
186
187void audiohw_set_avc(int value)
188{
189 int tmp;
190
191 static const uint16_t avc_vals[] =
192 {
193 (0x1 << 8) | (0x8 << 12), /* 20ms */
194 (0x2 << 8) | (0x8 << 12), /* 2s */
195 (0x4 << 8) | (0x8 << 12), /* 4s */
196 (0x8 << 8) | (0x8 << 12), /* 8s */
197 };
198 switch (value) {
199 case 1:
200 case 2:
201 case 3:
202 case 4:
203 tmp = avc_vals[value -1];
204 break;
205 case -1: /* turn off and then turn on again to decay quickly */
206 tmp = mas_codec_readreg(MAS_REG_KAVC);
207 mas_codec_writereg(MAS_REG_KAVC, 0);
208 break;
209 default: /* off */
210 tmp = 0;
211 break;
212 }
213 mas_codec_writereg(MAS_REG_KAVC, tmp);
214}
215
216void audiohw_set_mdb_strength(int value)
217{
218 mas_codec_writereg(MAS_REG_KMDB_STR, (value & 0x7f) << 8);
219}
220
221void audiohw_set_mdb_harmonics(int value)
222{
223 int tmp = value * 127 / 100;
224 mas_codec_writereg(MAS_REG_KMDB_HAR, (tmp & 0x7f) << 8);
225}
226
227void audiohw_set_mdb_center(int value)
228{
229 mas_codec_writereg(MAS_REG_KMDB_FC, (value/10) << 8);
230}
231
232void audiohw_set_mdb_shape(int value)
233{
234 mdb_shape_shadow = (mdb_shape_shadow & 0x02) | ((value/10) << 8);
235 mas_codec_writereg(MAS_REG_KMDB_SWITCH, mdb_shape_shadow);
236}
237
238void audiohw_set_mdb_enable(int value)
239{
240 mdb_shape_shadow = (mdb_shape_shadow & ~0x02) | (value?2:0);
241 mas_codec_writereg(MAS_REG_KMDB_SWITCH, mdb_shape_shadow);
242}
243
244void audiohw_set_superbass(int value)
245{
246 loudness_shadow = (loudness_shadow & ~0x04) | (value?4:0);
247 mas_codec_writereg(MAS_REG_KLOUDNESS, loudness_shadow);
248}
249
250void audiohw_set_balance(int val)
251{
252 unsigned tmp = ((unsigned)(val * 127 / 100) & 0xff) << 8;
253 mas_codec_writereg(MAS_REG_BALANCE, tmp);
254}
255
256/* This functionality works by telling the decoder that we have another
257 crystal frequency than we actually have. It will adjust its internal
258 parameters and the result is that the audio is played at another pitch.
259*/
260static int32_t last_pitch = PITCH_SPEED_100;
261
262void audiohw_set_pitch(int32_t val)
263{
264 if (val == last_pitch)
265 return;
266
267 /* Calculate the new (bogus) frequency */
268 unsigned long reg = 18432 * PITCH_SPEED_100 / val;
269 mas_writemem(MAS_BANK_D0, MAS_D0_OFREQ_CONTROL, &reg, 1);
270
271 /* We must tell the MAS that the frequency has changed.
272 * This will unfortunately cause a short silence. */
273 mas_writemem(MAS_BANK_D0, MAS_D0_IO_CONTROL_MAIN,
274 &shadow_io_control_main, 1);
275
276 last_pitch = val;
277}
278
279int32_t audiohw_get_pitch(void)
280{
281 return last_pitch;
282}
283
284#endif /* CONFIG_CODEC == MAS3587F || CONFIG_CODEC == MAS3539F */
285
diff --git a/firmware/drivers/audio/sdl.c b/firmware/drivers/audio/sdl.c
index a8fd2ffa07..d701665889 100644
--- a/firmware/drivers/audio/sdl.c
+++ b/firmware/drivers/audio/sdl.c
@@ -134,25 +134,3 @@ unsigned int pcm_sampr_to_hw_sampr(unsigned int samplerate,
134 unsigned int type) 134 unsigned int type)
135 { return samplerate; (void)type; } 135 { return samplerate; (void)type; }
136#endif /* CONFIG_SAMPR_TYPES */ 136#endif /* CONFIG_SAMPR_TYPES */
137#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
138int mas_codec_readreg(int reg)
139{
140 (void)reg;
141 return 0;
142}
143
144int mas_codec_writereg(int reg, unsigned int val)
145{
146 (void)reg;
147 (void)val;
148 return 0;
149}
150int mas_writemem(int bank, int addr, const unsigned long* src, int len)
151{
152 (void)bank;
153 (void)addr;
154 (void)src;
155 (void)len;
156 return 0;
157}
158#endif
diff --git a/firmware/drivers/button.c b/firmware/drivers/button.c
index 626afc415f..c81b629f6d 100644
--- a/firmware/drivers/button.c
+++ b/firmware/drivers/button.c
@@ -575,9 +575,6 @@ static int button_flip(int button)
575#if defined(BUTTON_SCROLL_BACK) && defined(BUTTON_SCROLL_FWD) 575#if defined(BUTTON_SCROLL_BACK) && defined(BUTTON_SCROLL_FWD)
576 | BUTTON_SCROLL_BACK | BUTTON_SCROLL_FWD 576 | BUTTON_SCROLL_BACK | BUTTON_SCROLL_FWD
577#endif 577#endif
578#if CONFIG_KEYPAD == RECORDER_PAD
579 | BUTTON_F1 | BUTTON_F3
580#endif
581#if (CONFIG_KEYPAD == SANSA_C200_PAD) || (CONFIG_KEYPAD == SANSA_CLIP_PAD) ||\ 578#if (CONFIG_KEYPAD == SANSA_C200_PAD) || (CONFIG_KEYPAD == SANSA_CLIP_PAD) ||\
582 (CONFIG_KEYPAD == GIGABEAT_PAD) || (CONFIG_KEYPAD == GIGABEAT_S_PAD) 579 (CONFIG_KEYPAD == GIGABEAT_PAD) || (CONFIG_KEYPAD == GIGABEAT_S_PAD)
583 | BUTTON_VOL_UP | BUTTON_VOL_DOWN 580 | BUTTON_VOL_UP | BUTTON_VOL_DOWN
@@ -604,12 +601,6 @@ static int button_flip(int button)
604 if (button & BUTTON_SCROLL_FWD) 601 if (button & BUTTON_SCROLL_FWD)
605 newbutton |= BUTTON_SCROLL_BACK; 602 newbutton |= BUTTON_SCROLL_BACK;
606#endif 603#endif
607#if CONFIG_KEYPAD == RECORDER_PAD
608 if (button & BUTTON_F1)
609 newbutton |= BUTTON_F3;
610 if (button & BUTTON_F3)
611 newbutton |= BUTTON_F1;
612#endif
613#if (CONFIG_KEYPAD == SANSA_C200_PAD) || (CONFIG_KEYPAD == SANSA_CLIP_PAD) ||\ 604#if (CONFIG_KEYPAD == SANSA_C200_PAD) || (CONFIG_KEYPAD == SANSA_CLIP_PAD) ||\
614 (CONFIG_KEYPAD == GIGABEAT_PAD) || (CONFIG_KEYPAD == GIGABEAT_S_PAD) 605 (CONFIG_KEYPAD == GIGABEAT_PAD) || (CONFIG_KEYPAD == GIGABEAT_S_PAD)
615 if (button & BUTTON_VOL_UP) 606 if (button & BUTTON_VOL_UP)
diff --git a/firmware/drivers/fmradio.c b/firmware/drivers/fmradio.c
deleted file mode 100644
index a6d2e799cb..0000000000
--- a/firmware/drivers/fmradio.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "lcd.h"
22#include "sh7034.h"
23#include "kernel.h"
24#include "thread.h"
25#include "debug.h"
26#include "system.h"
27#include "fmradio.h"
28
29#if CONFIG_TUNER
30
31/* Signals:
32 DI (Data In) - PB0 (doubles as data pin for the LCD)
33 CL (Clock) - PB1 (doubles as clock for the LCD)
34 CE (Chip Enable) - PB3 (also chip select for the LCD, but active low)
35 DO (Data Out) - PB4
36*/
37
38/* cute little functions */
39#define CE_LO and_b(~0x08, PBDRL_ADDR)
40#define CE_HI or_b(0x08, PBDRL_ADDR)
41#define CL_LO and_b(~0x02, PBDRL_ADDR)
42#define CL_HI or_b(0x02, PBDRL_ADDR)
43#define DO (PBDR & 0x10)
44#define DI_LO and_b(~0x01, PBDRL_ADDR)
45#define DI_HI or_b(0x01, PBDRL_ADDR)
46
47#define START or_b((0x08 | 0x02), PBDRL_ADDR)
48
49/* delay loop */
50#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)
51
52
53int fmradio_read(int addr)
54{
55 int i;
56 int data = 0;
57
58 START;
59
60 /* First address bit */
61 CL_LO;
62 if(addr & 2)
63 DI_HI;
64 else
65 DI_LO;
66 DELAY;
67 CL_HI;
68 DELAY;
69
70 /* Second address bit */
71 CL_LO;
72 if(addr & 1)
73 DI_HI;
74 else
75 DI_LO;
76 DELAY;
77 CL_HI;
78 DELAY;
79
80 for(i = 0; i < 21;i++)
81 {
82 CL_LO;
83 DELAY;
84 data <<= 1;
85 data |= (DO)?1:0;
86 CL_HI;
87 DELAY;
88 }
89
90 CE_LO;
91
92 return data;
93}
94
95void fmradio_set(int addr, int data)
96{
97 int i;
98
99 /* Include the address in the data */
100 data |= addr << 21;
101
102 START;
103
104 for(i = 0; i < 23;i++)
105 {
106 CL_LO;
107 DELAY;
108 if(data & (1 << 22))
109 DI_HI;
110 else
111 DI_LO;
112
113 data <<= 1;
114 CL_HI;
115 DELAY;
116 }
117
118 CE_LO;
119}
120
121#endif
diff --git a/firmware/drivers/rtc/rtc_m41st84w.c b/firmware/drivers/rtc/rtc_m41st84w.c
deleted file mode 100644
index 621e650f68..0000000000
--- a/firmware/drivers/rtc/rtc_m41st84w.c
+++ /dev/null
@@ -1,296 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing, Uwe Freese, Laurent Baum
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "i2c.h"
23#include "rtc.h"
24#include "kernel.h"
25#include "system.h"
26#include "timefuncs.h"
27
28#define RTC_ADR 0xd0
29#define RTC_DEV_WRITE (RTC_ADR | 0x00)
30#define RTC_DEV_READ (RTC_ADR | 0x01)
31
32void rtc_init(void)
33{
34 unsigned char data;
35
36#ifdef HAVE_RTC_ALARM
37 /* Check + save alarm bit first, before the power thread starts watching */
38 rtc_check_alarm_started(false);
39#endif
40
41 /* Clear the Stop bit if it is set */
42 data = rtc_read(0x01);
43 if(data & 0x80)
44 rtc_write(0x01, 0x00);
45
46 /* Clear the HT bit if it is set */
47 data = rtc_read(0x0c);
48
49 if(data & 0x40)
50 {
51 data &= ~0x40;
52 rtc_write(0x0c,data);
53 }
54
55#ifdef HAVE_RTC_ALARM
56
57 /* Clear Trec bit, write-protecting the RTC for 200ms when shutting off */
58 /* without this, the alarm won't work! */
59
60 data = rtc_read(0x04);
61 if (data & 0x80)
62 {
63 data &= ~0x80;
64 rtc_write(0x04, data);
65 }
66
67 /* Also, make sure that the OUT bit in register 8 is 1,
68 otherwise the player can't be turned off. */
69 rtc_write(8, rtc_read(8) | 0x80);
70
71#endif
72}
73
74#ifdef HAVE_RTC_ALARM
75
76/* check whether the unit has been started by the RTC alarm function */
77/* (check for AF, which => started using wakeup alarm) */
78bool rtc_check_alarm_started(bool release_alarm)
79{
80 static bool alarm_state, run_before;
81 bool rc;
82
83 if (run_before) {
84 rc = alarm_state;
85 alarm_state &= ~release_alarm;
86 } else {
87 /* This call resets AF, so we store the state for later recall */
88 rc = alarm_state = rtc_check_alarm_flag();
89 run_before = true;
90 }
91
92 return rc;
93}
94/*
95 * Checks the AL register. This call resets AL once read.
96 *
97 * We're only interested if ABE is set. AL is still raised regardless
98 * even if the unit is off when the alarm occurs.
99 */
100bool rtc_check_alarm_flag(void)
101{
102 return ( ( (rtc_read(0x0f) & 0x40) != 0) &&
103 (rtc_read(0x0a) & 0x20) );
104}
105
106/* set alarm time registers to the given time (repeat once per day) */
107void rtc_set_alarm(int h, int m)
108{
109 unsigned char data;
110
111 /* for daily alarm, RPT5=RPT4=on, RPT1=RPT2=RPT3=off */
112
113 rtc_write(0x0e, 0x00); /* seconds 0 and RTP1 */
114 rtc_write(0x0d, DEC2BCD(m)); /* minutes and RPT2 */
115 rtc_write(0x0c, DEC2BCD(h)); /* hour and RPT3 */
116 rtc_write(0x0b, 0xc1); /* set date 01 and RPT4 and RTP5 */
117
118 /* set month to 1, if it's invalid, the rtc does an alarm every second instead */
119 data = rtc_read(0x0a);
120 data &= 0xe0;
121 data |= 0x01;
122 rtc_write(0x0a, data);
123}
124
125/* read out the current alarm time */
126void rtc_get_alarm(int *h, int *m)
127{
128 unsigned char data;
129
130 data = rtc_read(0x0c);
131 *h = BCD2DEC(data & 0x3f);
132
133 data = rtc_read(0x0d);
134 *m = BCD2DEC(data & 0x7f);
135}
136
137/* turn alarm on or off by setting the alarm flag enable */
138/* the alarm is automatically disabled when the RTC gets Vcc power at startup */
139/* avoid that an alarm occurs when the device is on because this locks the ON key forever */
140void rtc_enable_alarm(bool enable)
141{
142 unsigned char data = rtc_read(0x0a);
143 if (enable)
144 {
145 data |= 0xa0; /* turn bit d7=AFE and d5=ABE on */
146 }
147 else
148 data &= 0x5f; /* turn bit d7=AFE and d5=ABE off */
149 rtc_write(0x0a, data);
150
151 /* check if alarm flag AF is off (as it should be) */
152 /* in some cases enabling the alarm results in an activated AF flag */
153 /* this should not happen, but it does */
154 /* if you know why, tell me! */
155 /* for now, we try again forever in this case */
156 while (rtc_check_alarm_flag()) /* on */
157 {
158 data &= 0x5f; /* turn bit d7=AFE and d5=ABE off */
159 rtc_write(0x0a, data);
160 sleep(HZ / 10);
161 rtc_check_alarm_flag();
162 data |= 0xa0; /* turn bit d7=AFE and d5=ABE on */
163 rtc_write(0x0a, data);
164 }
165}
166
167#endif /* HAVE_RTC_ALARM */
168
169int rtc_write(unsigned char address, unsigned char value)
170{
171 int ret = 0;
172 unsigned char buf[2];
173
174 i2c_begin();
175
176 buf[0] = address;
177 buf[1] = value;
178
179 /* send run command */
180 if (i2c_write(RTC_DEV_WRITE,buf,2))
181 {
182 ret = -1;
183 }
184
185 i2c_end();
186 return ret;
187}
188
189int rtc_read(unsigned char address)
190{
191 int value = -1;
192 unsigned char buf[1];
193
194 i2c_begin();
195
196 buf[0] = address;
197
198 /* send read command */
199 if (i2c_write(RTC_DEV_READ,buf,1) >= 0)
200 {
201 i2c_start();
202 i2c_outb(RTC_DEV_READ);
203 if (i2c_getack())
204 {
205 value = i2c_inb(1);
206 }
207 }
208
209 i2c_stop();
210
211 i2c_end();
212 return value;
213}
214
215int rtc_read_multiple(unsigned char address, unsigned char *buf, int numbytes)
216{
217 int ret = 0;
218 unsigned char obuf[1];
219 int i;
220
221 i2c_begin();
222
223 obuf[0] = address;
224
225 /* send read command */
226 if (i2c_write(RTC_DEV_READ, obuf, 1) >= 0)
227 {
228 i2c_start();
229 i2c_outb(RTC_DEV_READ);
230 if (i2c_getack())
231 {
232 for(i = 0;i < numbytes-1;i++)
233 buf[i] = i2c_inb(0);
234
235 buf[i] = i2c_inb(1);
236 }
237 else
238 {
239 ret = -1;
240 }
241 }
242
243 i2c_stop();
244
245 i2c_end();
246 return ret;
247}
248
249int rtc_read_datetime(struct tm *tm)
250{
251 int rc;
252 unsigned char buf[7];
253
254 rc = rtc_read_multiple(1, buf, sizeof(buf));
255
256 /* convert from bcd, avoid getting extra bits */
257 tm->tm_sec = BCD2DEC(buf[0] & 0x7f);
258 tm->tm_min = BCD2DEC(buf[1] & 0x7f);
259 tm->tm_hour = BCD2DEC(buf[2] & 0x3f);
260 tm->tm_mday = BCD2DEC(buf[4] & 0x3f);
261 tm->tm_mon = BCD2DEC(buf[5] & 0x1f) - 1;
262 tm->tm_year = BCD2DEC(buf[6]) + 100;
263 tm->tm_yday = 0; /* Not implemented for now */
264
265 set_day_of_week(tm);
266
267 return rc;
268}
269
270int rtc_write_datetime(const struct tm *tm)
271{
272 unsigned int i;
273 int rc = 0;
274 unsigned char buf[7];
275
276 buf[0] = tm->tm_sec;
277 buf[1] = tm->tm_min;
278 buf[2] = tm->tm_hour;
279 buf[3] = tm->tm_wday;
280 buf[4] = tm->tm_mday;
281 buf[5] = tm->tm_mon + 1;
282 buf[6] = tm->tm_year - 100;
283
284 /* Adjust weekday */
285 if (buf[3] == 0)
286 buf[3] = 7;
287
288 for (i = 0; i < sizeof(buf) ;i++)
289 {
290 rc |= rtc_write(i + 1, DEC2BCD(buf[i]));
291 }
292 rc |= rtc_write(8, 0x80); /* Out=1, calibration = 0 */
293
294 return rc;
295}
296
diff --git a/firmware/drivers/tuner/s1a0903x01.c b/firmware/drivers/tuner/s1a0903x01.c
deleted file mode 100644
index 91d1319fb5..0000000000
--- a/firmware/drivers/tuner/s1a0903x01.c
+++ /dev/null
@@ -1,179 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 * Tuner "middleware" for Samsung S1A0903X01 chip
10 *
11 * Copyright (C) 2003 Linus Nielsen Feltzing
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include <stdbool.h>
24#include <stdlib.h>
25#include "config.h"
26#include "kernel.h"
27#include "tuner.h" /* tuner abstraction interface */
28#include "fmradio.h" /* physical interface driver */
29#include "sound.h"
30#include "mas35xx.h"
31#include "power.h"
32
33#define DEFAULT_IN1 0x100003 /* Mute */
34#define DEFAULT_IN2 0x140884 /* 5kHz, 7.2MHz crystal */
35#define PLL_FREQ_STEP 10000
36
37static int fm_in1;
38static int fm_in2;
39static int fm_present = -1; /* unknown */
40
41/* tuner abstraction layer: set something to the tuner */
42int s1a0903x01_set(int setting, int value)
43{
44 int val = 1;
45
46 switch(setting)
47 {
48 case RADIO_SLEEP:
49 if (!value)
50 {
51 tuner_power(true);
52 /* wakeup: just unit */
53 fm_in1 = DEFAULT_IN1;
54 fm_in2 = DEFAULT_IN2;
55 fmradio_set(1, fm_in1);
56 fmradio_set(2, fm_in2);
57 }
58 else
59 tuner_power(false);
60 /* else we have no sleep mode? */
61 break;
62
63 case RADIO_FREQUENCY:
64 {
65 int pll_cnt;
66#if CONFIG_CODEC == MAS3587F
67 /* Shift the MAS internal clock away for certain frequencies to
68 * avoid interference. */
69 int pitch = 1000;
70
71 /* 4th harmonic falls in the FM frequency range */
72 int if_freq = 4 * mas_get_pllfreq();
73
74 /* shift the mas harmonic >= 300 kHz away using the direction
75 * which needs less shifting. */
76 if (value < if_freq)
77 {
78 if (if_freq - value < 300000)
79 pitch = 1003 - (if_freq - value) / 100000;
80 }
81 else
82 {
83 if (value - if_freq < 300000)
84 pitch = 997 + (value - if_freq) / 100000;
85 }
86 sound_set_pitch(pitch);
87#endif
88 /* We add the standard Intermediate Frequency 10.7MHz
89 ** before calculating the divisor
90 ** The reference frequency is set to 50kHz, and the VCO
91 ** output is prescaled by 2.
92 */
93
94 pll_cnt = (value + 10700000) / (PLL_FREQ_STEP/2) / 2;
95
96 /* 0x100000 == FM mode
97 ** 0x000002 == Microprocessor controlled Mute
98 */
99 fm_in1 = (fm_in1 & 0xfff00007) | (pll_cnt << 3);
100 fmradio_set(1, fm_in1);
101 break;
102 }
103
104 case RADIO_SCAN_FREQUENCY:
105 /* Tune in and delay */
106 s1a0903x01_set(RADIO_FREQUENCY, value);
107 sleep(1);
108 /* Start IF measurement */
109 fm_in1 |= 4;
110 fmradio_set(1, fm_in1);
111 sleep(1);
112 val = s1a0903x01_get(RADIO_TUNED);
113 break;
114
115 case RADIO_MUTE:
116 fm_in1 = (fm_in1 & 0xfffffffe) | (value?1:0);
117 fmradio_set(1, fm_in1);
118 break;
119
120 case RADIO_FORCE_MONO:
121 fm_in2 = (fm_in2 & 0xfffffffb) | (value?0:4);
122 fmradio_set(2, fm_in2);
123 break;
124 /* NOTE: These were only zeroed when starting the tuner from OFF
125 but the default values already set them to 0. */
126#if 0
127 case S1A0903X01_IF_MEASUREMENT:
128 fm_in1 = (fm_in1 & 0xfffffffb) | (value?4:0);
129 fmradio_set(1, fm_in1);
130 break;
131
132 case S1A0903X01_SENSITIVITY:
133 fm_in2 = (fm_in2 & 0xffff9fff) | ((value & 3) << 13);
134 fmradio_set(2, fm_in2);
135 break;
136#endif
137 default:
138 val = -1;
139 }
140
141 return val;
142}
143
144/* tuner abstraction layer: read something from the tuner */
145int s1a0903x01_get(int setting)
146{
147 int val = -1;
148 switch(setting)
149 {
150 case RADIO_PRESENT:
151 if (fm_present == -1)
152 {
153#ifdef HAVE_TUNER_PWR_CTRL
154 bool fmstatus = tuner_power(true);
155#endif
156 /* 5kHz, 7.2MHz crystal, test mode 1 */
157 fmradio_set(2, 0x140885);
158 fm_present = (fmradio_read(0) == 0x140885);
159#ifdef HAVE_TUNER_PWR_CTRL
160 if (!fmstatus)
161 tuner_power(false);
162#endif
163 }
164
165 val = fm_present;
166 break;
167
168 case RADIO_TUNED:
169 val = fmradio_read(3);
170 val = abs(10700 - ((val & 0x7ffff) / 8)) < 50; /* convert to kHz */
171 break;
172
173 case RADIO_STEREO:
174 val = fmradio_read(3);
175 val = ((val & 0x100000) ? true : false);
176 break;
177 }
178 return val;
179}
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h
index f22e72554d..490c8fc571 100644
--- a/firmware/export/audiohw.h
+++ b/firmware/export/audiohw.h
@@ -184,8 +184,6 @@ struct sound_settings_info
184#include "tlv320.h" 184#include "tlv320.h"
185#elif defined(HAVE_AS3514) 185#elif defined(HAVE_AS3514)
186#include "as3514.h" 186#include "as3514.h"
187#elif defined(HAVE_MAS35XX)
188#include "mas35xx.h"
189#if defined(HAVE_DAC3550A) 187#if defined(HAVE_DAC3550A)
190#include "dac3550a.h" 188#include "dac3550a.h"
191#endif /* HAVE_DAC3550A */ 189#endif /* HAVE_DAC3550A */
diff --git a/firmware/export/audiohw_settings.h b/firmware/export/audiohw_settings.h
index 675ec59a7b..1d3e0dc12f 100644
--- a/firmware/export/audiohw_settings.h
+++ b/firmware/export/audiohw_settings.h
@@ -84,16 +84,6 @@ AUDIOHW_SETTINGS(
84 AUDIOHW_SETTING_ENT(BALANCE, sound_set_balance) 84 AUDIOHW_SETTING_ENT(BALANCE, sound_set_balance)
85 AUDIOHW_SETTING_ENT(CHANNELS, sound_set_channels) 85 AUDIOHW_SETTING_ENT(CHANNELS, sound_set_channels)
86 AUDIOHW_SETTING_ENT(STEREO_WIDTH, sound_set_stereo_width) 86 AUDIOHW_SETTING_ENT(STEREO_WIDTH, sound_set_stereo_width)
87#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
88 AUDIOHW_SETTING_ENT(LOUDNESS, sound_set_loudness)
89 AUDIOHW_SETTING_ENT(AVC, sound_set_avc)
90 AUDIOHW_SETTING_ENT(MDB_STRENGTH, sound_set_mdb_strength)
91 AUDIOHW_SETTING_ENT(MDB_HARMONICS, sound_set_mdb_harmonics)
92 AUDIOHW_SETTING_ENT(MDB_CENTER, sound_set_mdb_center)
93 AUDIOHW_SETTING_ENT(MDB_SHAPE, sound_set_mdb_shape)
94 AUDIOHW_SETTING_ENT(MDB_ENABLE, sound_set_mdb_enable)
95 AUDIOHW_SETTING_ENT(SUPERBASS, sound_set_superbass)
96#endif /* (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
97#if defined(AUDIOHW_HAVE_LIN_GAIN) 87#if defined(AUDIOHW_HAVE_LIN_GAIN)
98 AUDIOHW_SETTING_ENT(LEFT_GAIN, NULL) 88 AUDIOHW_SETTING_ENT(LEFT_GAIN, NULL)
99 AUDIOHW_SETTING_ENT(RIGHT_GAIN, NULL) 89 AUDIOHW_SETTING_ENT(RIGHT_GAIN, NULL)
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 4f9cd02097..6ce9bede41 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -44,7 +44,6 @@
44#define STORAGE_HOSTFS (1 << STORAGE_HOSTFS_NUM) 44#define STORAGE_HOSTFS (1 << STORAGE_HOSTFS_NUM)
45 45
46/* CONFIG_TUNER (note these are combineable bit-flags) */ 46/* CONFIG_TUNER (note these are combineable bit-flags) */
47#define S1A0903X01 0x01 /* Samsung */
48#define TEA5767 0x02 /* Philips */ 47#define TEA5767 0x02 /* Philips */
49#define LV24020LP 0x04 /* Sanyo */ 48#define LV24020LP 0x04 /* Sanyo */
50#define SI4700 0x08 /* Silicon Labs */ 49#define SI4700 0x08 /* Silicon Labs */
@@ -55,13 +54,9 @@
55#define STFM1000 0x100 /* Sigmatel */ 54#define STFM1000 0x100 /* Sigmatel */
56 55
57/* CONFIG_CODEC */ 56/* CONFIG_CODEC */
58#define MAS3587F 3587
59#define MAS3507D 3507
60#define MAS3539F 3539
61#define SWCODEC 1 /* if codec is done by SW */ 57#define SWCODEC 1 /* if codec is done by SW */
62 58
63/* CONFIG_CPU */ 59/* CONFIG_CPU */
64#define SH7034 7034
65#define MCF5249 5249 60#define MCF5249 5249
66#define MCF5250 5250 61#define MCF5250 5250
67#define PP5002 5002 62#define PP5002 5002
@@ -103,9 +98,6 @@
103#define PLATFORM_PANDORA (1<<6) 98#define PLATFORM_PANDORA (1<<6)
104 99
105/* CONFIG_KEYPAD */ 100/* CONFIG_KEYPAD */
106#define PLAYER_PAD 1
107#define RECORDER_PAD 2
108#define ONDIO_PAD 3
109#define IRIVER_H100_PAD 4 101#define IRIVER_H100_PAD 4
110#define IRIVER_H300_PAD 5 102#define IRIVER_H300_PAD 5
111#define IAUDIO_X5M5_PAD 6 103#define IAUDIO_X5M5_PAD 6
@@ -222,8 +214,7 @@
222 if the estimation is better that ours 214 if the estimation is better that ours
223 (which it probably is) */ 215 (which it probably is) */
224/* CONFIG_LCD */ 216/* CONFIG_LCD */
225#define LCD_SSD1815 1 /* as used by Archos Recorders and Ondios */ 217#define LCD_SSD1815 1 /* as used by Sansa M200 and others */
226#define LCD_SSD1801 2 /* as used by Archos Player/Studio */
227#define LCD_S1D15E06 3 /* as used by iRiver H100 series */ 218#define LCD_S1D15E06 3 /* as used by iRiver H100 series */
228#define LCD_H300 4 /* as used by iRiver H300 series, exact model name is 219#define LCD_H300 4 /* as used by iRiver H300 series, exact model name is
229 unknown at the time of this writing */ 220 unknown at the time of this writing */
@@ -312,8 +303,6 @@
312/* CONFIG_I2C */ 303/* CONFIG_I2C */
313#define I2C_NONE 0 /* For targets that do not use I2C - as the 304#define I2C_NONE 0 /* For targets that do not use I2C - as the
314Lyre prototype 1 */ 305Lyre prototype 1 */
315#define I2C_PLAYREC 1 /* Archos Player/Recorder style */
316#define I2C_ONDIO 2 /* Ondio style */
317#define I2C_COLDFIRE 3 /* Coldfire style */ 306#define I2C_COLDFIRE 3 /* Coldfire style */
318#define I2C_PP5002 4 /* PP5002 style */ 307#define I2C_PP5002 4 /* PP5002 style */
319#define I2C_PP5020 5 /* PP5020 style */ 308#define I2C_PP5020 5 /* PP5020 style */
@@ -345,7 +334,6 @@ Lyre prototype 1 */
345#define NAND_IMX233 6 334#define NAND_IMX233 6
346 335
347/* CONFIG_RTC */ 336/* CONFIG_RTC */
348#define RTC_M41ST84W 1 /* Archos Recorder */
349#define RTC_PCF50605 2 /* iPod 3G, 4G & Mini */ 337#define RTC_PCF50605 2 /* iPod 3G, 4G & Mini */
350#define RTC_PCF50606 3 /* iriver H300 */ 338#define RTC_PCF50606 3 /* iriver H300 */
351#define RTC_S3C2440 4 339#define RTC_S3C2440 4
@@ -398,19 +386,7 @@ Lyre prototype 1 */
398#define IMX233_CREATIVE (1 << 1) /* Creative MBLK windowing */ 386#define IMX233_CREATIVE (1 << 1) /* Creative MBLK windowing */
399 387
400/* now go and pick yours */ 388/* now go and pick yours */
401#if defined(ARCHOS_PLAYER) 389#if defined(IRIVER_H100)
402#include "config/archosplayer.h"
403#elif defined(ARCHOS_RECORDER)
404#include "config/archosrecorder.h"
405#elif defined(ARCHOS_FMRECORDER)
406#include "config/archosfmrecorder.h"
407#elif defined(ARCHOS_RECORDERV2)
408#include "config/archosrecorderv2.h"
409#elif defined(ARCHOS_ONDIOSP)
410#include "config/archosondiosp.h"
411#elif defined(ARCHOS_ONDIOFM)
412#include "config/archosondiofm.h"
413#elif defined(IRIVER_H100)
414#include "config/iriverh100.h" 390#include "config/iriverh100.h"
415#elif defined(IRIVER_H120) 391#elif defined(IRIVER_H120)
416#include "config/iriverh120.h" 392#include "config/iriverh120.h"
@@ -659,11 +635,6 @@ Lyre prototype 1 */
659 635
660#ifndef __PCTOOL__ 636#ifndef __PCTOOL__
661 637
662/* define for all cpus from SH family */
663#if (ARCH == ARCH_SH) && (CONFIG_CPU == SH7034)
664#define CPU_SH
665#endif
666
667/* define for all cpus from coldfire family */ 638/* define for all cpus from coldfire family */
668#if (ARCH == ARCH_M68K) && ((CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)) 639#if (ARCH == ARCH_M68K) && ((CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250))
669#define CPU_COLDFIRE 640#define CPU_COLDFIRE
@@ -932,11 +903,6 @@ Lyre prototype 1 */
932#define HAVE_PICTUREFLOW_INTEGRATION 903#define HAVE_PICTUREFLOW_INTEGRATION
933#endif 904#endif
934 905
935/* Add one HAVE_ define for all mas35xx targets */
936#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3507D) || (CONFIG_CODEC == MAS3539F)
937#define HAVE_MAS35XX
938#endif
939
940#if (CONFIG_CODEC == SWCODEC) 906#if (CONFIG_CODEC == SWCODEC)
941#ifdef BOOTLOADER 907#ifdef BOOTLOADER
942 908
@@ -1012,7 +978,7 @@ Lyre prototype 1 */
1012#endif /* (CONFIG_CODEC == SWCODEC) */ 978#endif /* (CONFIG_CODEC == SWCODEC) */
1013 979
1014/* Determine if accesses should be strictly long aligned. */ 980/* Determine if accesses should be strictly long aligned. */
1015#if (CONFIG_CPU == SH7034) || defined(CPU_ARM) || defined(CPU_MIPS) 981#if defined(CPU_ARM) || defined(CPU_MIPS)
1016#define ROCKBOX_STRICT_ALIGN 1 982#define ROCKBOX_STRICT_ALIGN 1
1017#endif 983#endif
1018 984
@@ -1061,8 +1027,7 @@ Lyre prototype 1 */
1061 1027
1062/* IRAM usage */ 1028/* IRAM usage */
1063#if (CONFIG_PLATFORM & PLATFORM_NATIVE) && /* Not for hosted environments */ \ 1029#if (CONFIG_PLATFORM & PLATFORM_NATIVE) && /* Not for hosted environments */ \
1064 (((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \ 1030 (defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
1065 defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
1066 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ 1031 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \
1067 (CONFIG_CPU == AS3525 && MEMORYSIZE > 2 && !defined(BOOTLOADER)) || /* AS3525 +2MB: core, plugins, codecs */ \ 1032 (CONFIG_CPU == AS3525 && MEMORYSIZE > 2 && !defined(BOOTLOADER)) || /* AS3525 +2MB: core, plugins, codecs */ \
1068 (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525 2MB: core only */ \ 1033 (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525 2MB: core only */ \
@@ -1077,7 +1042,7 @@ Lyre prototype 1 */
1077#define IDATA_ATTR __attribute__ ((section(".idata"))) 1042#define IDATA_ATTR __attribute__ ((section(".idata")))
1078#define IBSS_ATTR __attribute__ ((section(".ibss"))) 1043#define IBSS_ATTR __attribute__ ((section(".ibss")))
1079#define USE_IRAM 1044#define USE_IRAM
1080#if CONFIG_CPU != SH7034 && (CONFIG_CPU != AS3525 || MEMORYSIZE > 2) \ 1045#if (CONFIG_CPU != AS3525 || MEMORYSIZE > 2) \
1081 && CONFIG_CPU != JZ4732 && CONFIG_CPU != JZ4760B && CONFIG_CPU != AS3525v2 && CONFIG_CPU != IMX233 1046 && CONFIG_CPU != JZ4732 && CONFIG_CPU != JZ4760B && CONFIG_CPU != AS3525v2 && CONFIG_CPU != IMX233
1082#define PLUGIN_USE_IRAM 1047#define PLUGIN_USE_IRAM
1083#endif 1048#endif
@@ -1283,8 +1248,7 @@ Lyre prototype 1 */
1283#define HAVE_PCM_FULL_DUPLEX 1248#define HAVE_PCM_FULL_DUPLEX
1284#endif 1249#endif
1285 1250
1286#if (CONFIG_CODEC == SWCODEC) || (CONFIG_CODEC == MAS3587F) || \ 1251#if (CONFIG_CODEC == SWCODEC)
1287 (CONFIG_CODEC == MAS3539F)
1288#define HAVE_PITCHCONTROL 1252#define HAVE_PITCHCONTROL
1289#endif 1253#endif
1290 1254
diff --git a/firmware/export/config/archosfmrecorder.h b/firmware/export/config/archosfmrecorder.h
deleted file mode 100644
index 0c64d70be4..0000000000
--- a/firmware/export/config/archosfmrecorder.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/* define this if you use an ATA controller */
2#define CONFIG_STORAGE STORAGE_ATA
3
4#define MODEL_NAME "Archos FM Recorder"
5
6/* define this if you have recording possibility */
7#define HAVE_RECORDING
8
9/* Define bitmask of input sources - recordable bitmask can be defined
10 explicitly if different */
11#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_SPDIF)
12
13/* define this if you have a bitmap LCD display */
14#define HAVE_LCD_BITMAP
15
16/* define this if you can flip your LCD */
17#define HAVE_LCD_FLIP
18
19/* define this if you can invert the colours on your LCD */
20#define HAVE_LCD_INVERT
21
22/* define this if you have access to the quickscreen */
23#define HAVE_QUICKSCREEN
24
25/* define this if you have the button bar */
26#define HAVE_BUTTONBAR
27
28/* define this if you would like tagcache to build on this target */
29#define HAVE_TAGCACHE
30
31/* LCD dimensions */
32#define LCD_WIDTH 112
33#define LCD_HEIGHT 64
34/* sqrt(112^2 + 64^2) / 1.5 = 85.4 */
35#define LCD_DPI 85
36#define LCD_DEPTH 1
37
38#define LCD_PIXEL_ASPECT_WIDTH 4
39#define LCD_PIXEL_ASPECT_HEIGHT 5
40
41#define LCD_PIXELFORMAT VERTICAL_PACKING
42
43/* Display colours, for screenshots and sim (0xRRGGBB) */
44#define LCD_DARKCOLOR 0x000000
45#define LCD_BRIGHTCOLOR 0x5a915a
46#define LCD_BL_DARKCOLOR 0x000000
47#define LCD_BL_BRIGHTCOLOR 0x7ee57e
48
49/* define this if you have a Recorder style 10-key keyboard */
50#define CONFIG_KEYPAD RECORDER_PAD
51
52/* Define this to enable morse code input */
53#define HAVE_MORSE_INPUT
54
55/* define this if you have a real-time clock */
56#define CONFIG_RTC RTC_M41ST84W
57
58/* FM recorders can wake up from RTC alarm */
59#define HAVE_RTC_ALARM
60
61/* define this if you have RTC RAM available for settings */
62#define HAVE_RTC_RAM
63
64/* Define this if you have a software controlled poweroff */
65#define HAVE_SW_POWEROFF
66
67/* The number of bytes reserved for loadable plugins */
68#define PLUGIN_BUFFER_SIZE 0x8000
69
70#ifndef BOOTLOADER
71/* Define this if you have an FM Radio */
72#define CONFIG_TUNER S1A0903X01
73#endif
74
75#define AB_REPEAT_ENABLE
76
77/* Define this if you have a MAS3587F */
78#define CONFIG_CODEC MAS3587F
79
80/* Define this for LCD backlight available */
81#define HAVE_BACKLIGHT
82
83/* define this if you have a disk storage, i.e. something
84 that needs spinups and can cause skips when shaked */
85#define HAVE_DISK_STORAGE
86
87#define CONFIG_I2C I2C_PLAYREC
88
89#define BATTERY_CAPACITY_DEFAULT 2200 /* default battery capacity */
90#define BATTERY_CAPACITY_MIN 2200 /* min. capacity selectable */
91#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
92#define BATTERY_CAPACITY_INC 50 /* capacity increment */
93#define BATTERY_TYPES_COUNT 1 /* only one type */
94
95#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
96
97#define CURRENT_NORMAL 145 /* usual current in mA */
98#define CURRENT_RECORD 35 /* additional recording current */
99#define CURRENT_USB 500 /* usual current in mA in USB mode */
100
101/* Hardware controlled charging with monitoring */
102#define CONFIG_CHARGING CHARGING_MONITOR
103
104/* define this if the unit can be powered or charged via USB */
105#define HAVE_USB_POWER
106
107/* Define this if you have a SH7034 */
108#define CONFIG_CPU SH7034
109
110/* Define this if you have a FM Recorder key system */
111#define HAVE_FMADC
112
113/* Define this if battery voltage can only be measured with ATA powered */
114#define NEED_ATA_POWER_BATT_MEASURE
115
116/* Define this to the CPU frequency */
117#define CPU_FREQ 11059200
118
119/* Offset ( in the firmware file's header ) to the file length */
120#define FIRMWARE_OFFSET_FILE_LENGTH 20
121
122/* Offset ( in the firmware file's header ) to the file CRC */
123#define FIRMWARE_OFFSET_FILE_CRC 6
124
125/* Offset ( in the firmware file's header ) to the real data */
126#define FIRMWARE_OFFSET_FILE_DATA 24
127
128/* The start address index for ROM builds */
129/* #define ROM_START 0x14010 for behind original Archos */
130#define ROM_START 0x7010 /* for behind BootBox */
131
132/* Software controlled LED */
133#define CONFIG_LED LED_REAL
134
135#define CONFIG_LCD LCD_SSD1815
136
137#define BOOTFILE_EXT "ajz"
138#define BOOTFILE "ajbrec." BOOTFILE_EXT
139#define BOOTDIR "/"
140
141#define HAVE_LCD_CONTRAST
142
143#define MIN_CONTRAST_SETTING 5
144#define MAX_CONTRAST_SETTING 63
145
146/* Define this if a programmable hotkey is mapped */
147#define HAVE_HOTKEY
diff --git a/firmware/export/config/archosondiofm.h b/firmware/export/config/archosondiofm.h
deleted file mode 100644
index 68ecc217c1..0000000000
--- a/firmware/export/config/archosondiofm.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/* define this if you have recording possibility */
2#define HAVE_RECORDING
3
4#define MODEL_NAME "Ondio FM"
5
6#define ONDIO_SERIES
7
8/* Define bitmask of input sources - recordable bitmask can be defined
9 explicitly if different */
10#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN)
11
12/* define this if you have a bitmap LCD display */
13#define HAVE_LCD_BITMAP
14
15/* define this if you can flip your LCD */
16#define HAVE_LCD_FLIP
17
18/* define this if you can invert the colours on your LCD */
19#define HAVE_LCD_INVERT
20
21/* define this if you would like tagcache to build on this target */
22#define HAVE_TAGCACHE
23
24/* LCD dimensions */
25#define LCD_WIDTH 112
26#define LCD_HEIGHT 64
27/* sqrt(112^2 + 64^2) / 1.5 = 83.8 */
28#define LCD_DPI 84
29#define LCD_DEPTH 1
30
31#define LCD_PIXEL_ASPECT_WIDTH 4
32#define LCD_PIXEL_ASPECT_HEIGHT 5
33
34#define LCD_PIXELFORMAT VERTICAL_PACKING
35
36/* Display colours, for screenshots and sim (0xRRGGBB) */
37#define LCD_DARKCOLOR 0x000000
38#define LCD_BRIGHTCOLOR 0x5a915a
39#define LCD_BL_DARKCOLOR 0x000000
40#define LCD_BL_BRIGHTCOLOR 0x82b4fa
41
42/* define this if you have an Ondio style 6-key keyboard */
43#define CONFIG_KEYPAD ONDIO_PAD
44
45/* Define this to enable morse code input */
46#define HAVE_MORSE_INPUT
47
48#define AB_REPEAT_ENABLE
49#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE
50
51/* Define this if you have a software controlled poweroff */
52#define HAVE_SW_POWEROFF
53
54/* The number of bytes reserved for loadable plugins */
55#define PLUGIN_BUFFER_SIZE 0x8000
56
57#ifndef BOOTLOADER
58/* Define this if you have an FM Radio */
59#define CONFIG_TUNER (S1A0903X01 | TEA5767) /* to be decided at runtime */
60#define CONFIG_TUNER_XTAL 13000000
61#endif
62
63/* Define this if you have a MAS3587F */
64#define CONFIG_CODEC MAS3587F
65
66/* define this if you have a flash memory storage */
67#define HAVE_FLASH_STORAGE
68
69#define BATTERY_CAPACITY_DEFAULT 1000 /* default battery capacity */
70#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */
71#define BATTERY_CAPACITY_MAX 1500 /* max. capacity selectable */
72#define BATTERY_CAPACITY_INC 50 /* capacity increment */
73#define BATTERY_TYPES_COUNT 2 /* Alkalines or NiMH */
74
75#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
76
77/* define this if the unit should not shut down on low battery. */
78#define NO_LOW_BATTERY_SHUTDOWN
79
80/* define this if the unit can be powered or charged via USB */
81#define HAVE_USB_POWER
82
83/* define current usage levels */
84#define CURRENT_NORMAL 95 /* average, nearly proportional to 1/U */
85#define CURRENT_USB 1 /* host powered in USB mode; avoid zero-div */
86#define CURRENT_BACKLIGHT 0 /* no backlight */
87
88/* Define this if you have a SH7034 */
89#define CONFIG_CPU SH7034
90
91/* Define this to the CPU frequency */
92#define CPU_FREQ 12000000
93
94/* Define this for different I2C pinout */
95#define CONFIG_I2C I2C_ONDIO
96
97/* Offset ( in the firmware file's header ) to the file length */
98#define FIRMWARE_OFFSET_FILE_LENGTH 20
99
100/* Offset ( in the firmware file's header ) to the file CRC */
101#define FIRMWARE_OFFSET_FILE_CRC 6
102
103/* Offset ( in the firmware file's header ) to the real data */
104#define FIRMWARE_OFFSET_FILE_DATA 24
105
106/* Define this if the tuner is switched on by software */
107#define HAVE_TUNER_PWR_CTRL
108
109/* The start address index for ROM builds */
110/* #define ROM_START 0x16010 for behind original Archos */
111#define ROM_START 0x7010 /* for behind BootBox */
112
113/* Define this if the display is mounted upside down */
114#define HAVE_DISPLAY_FLIPPED
115
116/* Define this for different ADC channel assignment */
117#define HAVE_ONDIO_ADC
118
119/* Define this for MMC support instead of ATA harddisk */
120#define CONFIG_STORAGE STORAGE_MMC
121
122/* Define this to support mounting FAT16 partitions */
123#define HAVE_FAT16SUPPORT
124
125/* Define this if the MAS SIBI line can be controlled via PB8 */
126#define HAVE_MAS_SIBI_CONTROL
127
128/* define this if more than one device/partition can be used */
129#define HAVE_MULTIDRIVE
130#define NUM_DRIVES 2
131
132/* define this if media can be exchanged on the fly */
133#define HAVE_HOTSWAP
134
135#define CONFIG_LCD LCD_SSD1815
136
137#define BOOTFILE_EXT "ajz"
138#define BOOTFILE "ajbrec." BOOTFILE_EXT
139#define BOOTDIR "/"
140
141#define HAVE_LCD_CONTRAST
142
143#define MIN_CONTRAST_SETTING 5
144#define MAX_CONTRAST_SETTING 63
145
146/* Define this if a programmable hotkey is mapped */
147//#define HAVE_HOTKEY
diff --git a/firmware/export/config/archosondiosp.h b/firmware/export/config/archosondiosp.h
deleted file mode 100644
index 3e9de1eda6..0000000000
--- a/firmware/export/config/archosondiosp.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/* define this if you have a bitmap LCD display */
2#define HAVE_LCD_BITMAP
3
4#define MODEL_NAME "Ondio SP"
5
6#define ONDIO_SERIES
7
8/* define this if you can flip your LCD */
9#define HAVE_LCD_FLIP
10
11/* define this if you can invert the colours on your LCD */
12#define HAVE_LCD_INVERT
13
14/* define this if you would like tagcache to build on this target */
15#define HAVE_TAGCACHE
16
17/* LCD dimensions */
18#define LCD_WIDTH 112
19#define LCD_HEIGHT 64
20/* sqrt(112^2 + 64^2) / 1.5 = 83.8 */
21#define LCD_DPI 84
22#define LCD_DEPTH 1
23
24#define LCD_PIXEL_ASPECT_WIDTH 4
25#define LCD_PIXEL_ASPECT_HEIGHT 5
26
27#define LCD_PIXELFORMAT VERTICAL_PACKING
28
29/* Display colours, for screenshots and sim (0xRRGGBB) */
30#define LCD_DARKCOLOR 0x000000
31#define LCD_BRIGHTCOLOR 0x5a915a
32#define LCD_BL_DARKCOLOR 0x000000
33#define LCD_BL_BRIGHTCOLOR 0x82b4fa
34
35/* define this if you have an Ondio style 6-key keyboard */
36#define CONFIG_KEYPAD ONDIO_PAD
37
38/* Define this to enable morse code input */
39#define HAVE_MORSE_INPUT
40
41#define AB_REPEAT_ENABLE
42#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE
43
44/* Define this if you have a software controlled poweroff */
45#define HAVE_SW_POWEROFF
46
47/* The number of bytes reserved for loadable plugins */
48#define PLUGIN_BUFFER_SIZE 0x8000
49
50/* Define this if you have a MAS3539F */
51#define CONFIG_CODEC MAS3539F
52
53/* define this if you have a flash memory storage */
54#define HAVE_FLASH_STORAGE
55
56#define BATTERY_CAPACITY_DEFAULT 1000 /* default battery capacity */
57#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */
58#define BATTERY_CAPACITY_MAX 1500 /* max. capacity selectable */
59#define BATTERY_CAPACITY_INC 50 /* capacity increment */
60#define BATTERY_TYPES_COUNT 2 /* Alkalines or NiMH */
61
62#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
63
64/* define this if the unit should not shut down on low battery. */
65#define NO_LOW_BATTERY_SHUTDOWN
66
67/* define this if the unit can be powered or charged via USB */
68#define HAVE_USB_POWER
69
70/* define current usage levels */
71#define CURRENT_NORMAL 95 /* average, nearly proportional to 1/U */
72#define CURRENT_USB 1 /* host powered in USB mode; avoid zero-div */
73#define CURRENT_BACKLIGHT 0 /* no backlight */
74
75/* Define this if you have a SH7034 */
76#define CONFIG_CPU SH7034
77
78/* Define this to the CPU frequency */
79#define CPU_FREQ 12000000
80
81/* Offset ( in the firmware file's header ) to the file length */
82#define FIRMWARE_OFFSET_FILE_LENGTH 20
83
84/* Offset ( in the firmware file's header ) to the file CRC */
85#define FIRMWARE_OFFSET_FILE_CRC 6
86
87/* Offset ( in the firmware file's header ) to the real data */
88#define FIRMWARE_OFFSET_FILE_DATA 24
89
90/* The start address index for ROM builds */
91/* #define ROM_START 0x12010 for behind original Archos */
92#define ROM_START 0x7010 /* for behind BootBox */
93
94/* Define this if the display is mounted upside down */
95#define HAVE_DISPLAY_FLIPPED
96
97/* Define this for different I2C pinout */
98#define CONFIG_I2C I2C_ONDIO
99
100/* Define this for different ADC channel assignment */
101#define HAVE_ONDIO_ADC
102
103/* Define this for MMC support instead of ATA harddisk */
104#define CONFIG_STORAGE STORAGE_MMC
105
106/* Define this to support mounting FAT16 partitions */
107#define HAVE_FAT16SUPPORT
108
109/* Define this if the MAS SIBI line can be controlled via PB8 */
110#define HAVE_MAS_SIBI_CONTROL
111
112/* define this if more than one device/partition can be used */
113#define HAVE_MULTIDRIVE
114#define NUM_DRIVES 2
115
116/* define this if media can be exchanged on the fly */
117#define HAVE_HOTSWAP
118
119#define CONFIG_LCD LCD_SSD1815
120
121#define BOOTFILE_EXT "ajz"
122#define BOOTFILE "ajbrec." BOOTFILE_EXT
123#define BOOTDIR "/"
124
125#define HAVE_LCD_CONTRAST
126
127#define MIN_CONTRAST_SETTING 5
128#define MAX_CONTRAST_SETTING 63
129
130/* Define this if a programmable hotkey is mapped */
131//#define HAVE_HOTKEY
diff --git a/firmware/export/config/archosplayer.h b/firmware/export/config/archosplayer.h
deleted file mode 100644
index 2e0219cff5..0000000000
--- a/firmware/export/config/archosplayer.h
+++ /dev/null
@@ -1,111 +0,0 @@
1/* define this if you use an ATA controller */
2#define CONFIG_STORAGE STORAGE_ATA
3
4#define MODEL_NAME "Archos Player/Studio"
5
6/* define this if you have a charcell LCD display */
7#define HAVE_LCD_CHARCELLS
8
9/* define this if you would like tagcache to build on this target */
10#define HAVE_TAGCACHE
11
12#define LCD_WIDTH 11
13#define LCD_HEIGHT 2
14/* sqrt(11^2 + 2^2) / 1.5 = 7.5 */
15#define LCD_DPI 7
16#define LCD_DEPTH 1
17#define SIM_LCD_WIDTH 132 /* pixels */
18#define SIM_LCD_HEIGHT 64 /* pixels */
19
20/* Display colours, for screenshots and sim (0xRRGGBB) */
21#define LCD_DARKCOLOR 0x000000
22#define LCD_BRIGHTCOLOR 0x5a915a
23#define LCD_BL_DARKCOLOR 0x000000
24#define LCD_BL_BRIGHTCOLOR 0x7ee57e
25
26/* define this if you have the Player's keyboard */
27#define CONFIG_KEYPAD PLAYER_PAD
28
29#define AB_REPEAT_ENABLE
30#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE
31
32/* The number of bytes reserved for loadable plugins */
33#define PLUGIN_BUFFER_SIZE 0x8000
34
35/* Define this if you have a MAS3507D */
36#define CONFIG_CODEC MAS3507D
37
38/* Define this if you have a DAC3550A */
39#define HAVE_DAC3550A
40
41/* define this if you have a disk storage, i.e. something
42 that needs spinups and can cause skips when shaked */
43#define HAVE_DISK_STORAGE
44
45/* Define this for LCD backlight available */
46#define HAVE_BACKLIGHT
47
48#define BATTERY_CAPACITY_DEFAULT 1500 /* default battery capacity */
49#define BATTERY_CAPACITY_MIN 1500 /* min. capacity selectable */
50#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
51#define BATTERY_CAPACITY_INC 50 /* capacity increment */
52#define BATTERY_TYPES_COUNT 1 /* only one type */
53
54#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
55
56#define CURRENT_NORMAL 145 /* usual current in mA */
57#define CURRENT_USB 500 /* usual current in mA in USB mode */
58
59/* define this if the unit should not shut down on low battery. */
60#define NO_LOW_BATTERY_SHUTDOWN
61
62/* Hardware controlled charging */
63#define CONFIG_CHARGING CHARGING_SIMPLE
64
65/* Define this if you have a SH7034 */
66#define CONFIG_CPU SH7034
67
68/* Define this if you control ata power player style
69 (with PB4, new player only) */
70#define ATA_POWER_PLAYERSTYLE
71
72/* Define this to the CPU frequency */
73#define CPU_FREQ 12000000 /* cycle time ~83.3ns */
74
75/* Define this if you must discharge the data line by driving it low
76 and then set it to input to see if it stays low or goes high */
77#define HAVE_I2C_LOW_FIRST
78
79#define CONFIG_I2C I2C_PLAYREC
80
81/* Offset ( in the firmware file's header ) to the file length */
82#define FIRMWARE_OFFSET_FILE_LENGTH 0
83
84/* Offset ( in the firmware file's header ) to the file CRC */
85#define FIRMWARE_OFFSET_FILE_CRC 4
86
87/* Offset ( in the firmware file's header ) to the real data */
88#define FIRMWARE_OFFSET_FILE_DATA 6
89
90/* The start address index for ROM builds */
91#define ROM_START 0x7010 /* for behind BootBox */
92
93/* Software controlled LED */
94#define CONFIG_LED LED_REAL
95
96#define CONFIG_LCD LCD_SSD1801
97
98#define BOOTFILE_EXT "mod"
99#define BOOTFILE "archos." BOOTFILE_EXT
100#define BOOTDIR "/"
101
102#define HAVE_LCD_CONTRAST
103
104#define MIN_CONTRAST_SETTING 5
105#define MAX_CONTRAST_SETTING 31
106#define DEFAULT_CONTRAST_SETTING 30
107
108#define HAVE_SERIAL
109
110/* Define this if a programmable hotkey is mapped */
111#define HAVE_HOTKEY
diff --git a/firmware/export/config/archosrecorder.h b/firmware/export/config/archosrecorder.h
deleted file mode 100644
index 016ea8b944..0000000000
--- a/firmware/export/config/archosrecorder.h
+++ /dev/null
@@ -1,141 +0,0 @@
1/* define this if you use an ATA controller */
2#define CONFIG_STORAGE STORAGE_ATA
3
4#define MODEL_NAME "Archos Recorder"
5
6/* define this if you have recording possibility */
7#define HAVE_RECORDING
8
9/* Define bitmask of input sources - recordable bitmask can be defined
10 explicitly if different */
11#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_SPDIF)
12
13/* define this if you have a bitmap LCD display */
14#define HAVE_LCD_BITMAP
15
16/* define this if you can flip your LCD */
17//#define HAVE_LCD_FLIP
18
19/* define this if you can invert the colours on your LCD */
20#define HAVE_LCD_INVERT
21
22/* define this if you have access to the quickscreen */
23#define HAVE_QUICKSCREEN
24
25/* define this if you have the button bar */
26#define HAVE_BUTTONBAR
27
28/* define this if you would like tagcache to build on this target */
29#define HAVE_TAGCACHE
30
31/* LCD dimensions */
32#define LCD_WIDTH 112
33#define LCD_HEIGHT 64
34/* sqrt(112^2 + 64^2) / 1.5 = 85.4 */
35#define LCD_DPI 85
36#define LCD_DEPTH 1
37
38#define LCD_PIXEL_ASPECT_WIDTH 4
39#define LCD_PIXEL_ASPECT_HEIGHT 5
40
41#define LCD_PIXELFORMAT VERTICAL_PACKING
42
43/* Display colours, for screenshots and sim (0xRRGGBB) */
44#define LCD_DARKCOLOR 0x000000
45#define LCD_BRIGHTCOLOR 0x5a915a
46#define LCD_BL_DARKCOLOR 0x000000
47#define LCD_BL_BRIGHTCOLOR 0x7ee57e
48
49/* define this if you have the Recorder's 10-key keyboard */
50#define CONFIG_KEYPAD RECORDER_PAD
51
52/* Define this to enable morse code input */
53//#define HAVE_MORSE_INPUT
54
55/* define this if you have a real-time clock */
56#define CONFIG_RTC RTC_M41ST84W
57
58/* define this if you have RTC RAM available for settings */
59#define HAVE_RTC_RAM
60
61/* The number of bytes reserved for loadable plugins */
62#define PLUGIN_BUFFER_SIZE 0x8000
63
64#define AB_REPEAT_ENABLE
65
66/* Define this if you have a MAS3587F */
67#define CONFIG_CODEC MAS3587F
68
69/* define this if you have a disk storage, i.e. something
70 that needs spinups and can cause skips when shaked */
71#define HAVE_DISK_STORAGE
72
73/* Define this for LCD backlight available */
74#define HAVE_BACKLIGHT
75
76#define CONFIG_I2C I2C_PLAYREC
77
78#define BATTERY_CAPACITY_DEFAULT 1500 /* default battery capacity */
79#define BATTERY_CAPACITY_MIN 1500 /* min. capacity selectable */
80#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
81#define BATTERY_CAPACITY_INC 50 /* capacity increment */
82#define BATTERY_TYPES_COUNT 1 /* only one type */
83
84#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
85
86#if MEMORYSIZE < 8
87 #define CURRENT_NORMAL 145 /* usual current in mA */
88#else
89 #define CURRENT_NORMAL 145 *100 / 122 /* assuming 192 kbps, the running time is 22% longer with 8MB */
90#endif
91#define CURRENT_RECORD 35 /* additional recording current */
92#define CURRENT_USB 500 /* usual current in mA in USB mode */
93
94/* define this if the unit should not shut down on low battery. */
95#define NO_LOW_BATTERY_SHUTDOWN
96
97/* Software controlled charging */
98#define CONFIG_CHARGING CHARGING_TARGET
99
100/* Define this if you have a SH7034 */
101#define CONFIG_CPU SH7034
102
103/* Define this if you have ATA power-off control */
104#define HAVE_ATA_POWER_OFF
105
106/* Define this to the CPU frequency */
107#define CPU_FREQ 11059200
108
109/* Offset ( in the firmware file's header ) to the file length */
110#define FIRMWARE_OFFSET_FILE_LENGTH 0
111
112/* Offset ( in the firmware file's header ) to the file CRC */
113#define FIRMWARE_OFFSET_FILE_CRC 4
114
115/* Offset ( in the firmware file's header ) to the real data */
116#define FIRMWARE_OFFSET_FILE_DATA 6
117
118/* The start address index for ROM builds */
119/* #define ROM_START 0x11010 for behind original Archos */
120#define ROM_START 0x7010 /* for behind BootBox */
121
122/* Software controlled LED */
123#define CONFIG_LED LED_REAL
124
125/* Define this for S/PDIF output available */
126#define HAVE_SPDIF_OUT
127
128#define CONFIG_LCD LCD_SSD1815
129
130#define BOOTFILE_EXT "ajz"
131#define BOOTFILE "ajbrec." BOOTFILE_EXT
132#define BOOTDIR "/"
133
134#define HAVE_LCD_CONTRAST
135
136#define MIN_CONTRAST_SETTING 5
137#define MAX_CONTRAST_SETTING 63
138
139#define HAVE_SERIAL
140/* Define this if a programmable hotkey is mapped */
141#define HAVE_HOTKEY
diff --git a/firmware/export/config/archosrecorderv2.h b/firmware/export/config/archosrecorderv2.h
deleted file mode 100644
index 4640eae247..0000000000
--- a/firmware/export/config/archosrecorderv2.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/* define this if you use an ATA controller */
2#define CONFIG_STORAGE STORAGE_ATA
3
4#define MODEL_NAME "Archos Recorder v2"
5
6/* define this if you have recording possibility */
7#define HAVE_RECORDING
8
9/* Define bitmask of input sources - recordable bitmask can be defined
10 explicitly if different */
11#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_SPDIF)
12
13/* define this if you have a bitmap LCD display */
14#define HAVE_LCD_BITMAP
15
16/* define this if you can flip your LCD */
17#define HAVE_LCD_FLIP
18
19/* define this if you can invert the colours on your LCD */
20#define HAVE_LCD_INVERT
21
22/* define this if you have access to the quickscreen */
23#define HAVE_QUICKSCREEN
24
25/* define this if you have the button bar */
26#define HAVE_BUTTONBAR
27
28/* define this if you would like tagcache to build on this target */
29#define HAVE_TAGCACHE
30
31/* LCD dimensions */
32#define LCD_WIDTH 112
33#define LCD_HEIGHT 64
34/* sqrt(112^2 + 64^2) / 1.5 = 85.4 */
35#define LCD_DPI 85
36#define LCD_DEPTH 1
37
38#define LCD_PIXEL_ASPECT_WIDTH 4
39#define LCD_PIXEL_ASPECT_HEIGHT 5
40
41#define LCD_PIXELFORMAT VERTICAL_PACKING
42
43/* Display colours, for screenshots and sim (0xRRGGBB) */
44#define LCD_DARKCOLOR 0x000000
45#define LCD_BRIGHTCOLOR 0x5a915a
46#define LCD_BL_DARKCOLOR 0x000000
47#define LCD_BL_BRIGHTCOLOR 0x7ee57e
48
49/* define this if you have a Recorder style 10-key keyboard */
50#define CONFIG_KEYPAD RECORDER_PAD
51
52/* Define this to enable morse code input */
53#define HAVE_MORSE_INPUT
54
55/* define this if you have a real-time clock */
56#define CONFIG_RTC RTC_M41ST84W
57
58/* FM recorders can wake up from RTC alarm */
59#define HAVE_RTC_ALARM
60
61/* define this if you have RTC RAM available for settings */
62#define HAVE_RTC_RAM
63
64/* Define this if you have a software controlled poweroff */
65#define HAVE_SW_POWEROFF
66
67/* The number of bytes reserved for loadable plugins */
68#define PLUGIN_BUFFER_SIZE 0x8000
69
70#define AB_REPEAT_ENABLE
71
72/* Define this if you have a MAS3587F */
73#define CONFIG_CODEC MAS3587F
74
75/* define this if you have a disk storage, i.e. something
76 that needs spinups and can cause skips when shaked */
77#define HAVE_DISK_STORAGE
78
79/* Define this for LCD backlight available */
80#define HAVE_BACKLIGHT
81
82#define CONFIG_I2C I2C_PLAYREC
83
84#define BATTERY_CAPACITY_DEFAULT 2200 /* default battery capacity */
85#define BATTERY_CAPACITY_MIN 2200 /* min. capacity selectable */
86#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
87#define BATTERY_CAPACITY_INC 50 /* capacity increment */
88#define BATTERY_TYPES_COUNT 1 /* only one type */
89
90#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
91
92#define CURRENT_NORMAL 145 /* usual current in mA */
93#define CURRENT_RECORD 35 /* additional recording current */
94#define CURRENT_USB 500 /* usual current in mA in USB mode */
95
96/* Hardware controlled charging with monitoring */
97#define CONFIG_CHARGING CHARGING_MONITOR
98
99/* define this if the unit can be powered or charged via USB */
100#define HAVE_USB_POWER
101
102/* Define this if you have a SH7034 */
103#define CONFIG_CPU SH7034
104
105/* Define this if you have a FM Recorder key system */
106#define HAVE_FMADC
107
108/* Define this if battery voltage can only be measured with ATA powered */
109#define NEED_ATA_POWER_BATT_MEASURE
110
111/* Define this to the CPU frequency */
112#define CPU_FREQ 11059200
113
114/* Offset ( in the firmware file's header ) to the file length */
115#define FIRMWARE_OFFSET_FILE_LENGTH 20
116
117/* Offset ( in the firmware file's header ) to the file CRC */
118#define FIRMWARE_OFFSET_FILE_CRC 6
119
120/* Offset ( in the firmware file's header ) to the real data */
121#define FIRMWARE_OFFSET_FILE_DATA 24
122
123#ifndef BOOTLOADER
124/* Define this if you have an FM Radio */
125#define CONFIG_TUNER S1A0903X01
126#endif
127
128/* The start address index for ROM builds */
129/* #define ROM_START 0x12010 for behind original Archos */
130#define ROM_START 0x7010 /* for behind BootBox */
131
132/* Software controlled LED */
133#define CONFIG_LED LED_REAL
134
135#define CONFIG_LCD LCD_SSD1815
136
137#define BOOTFILE_EXT "ajz"
138#define BOOTFILE "ajbrec." BOOTFILE_EXT
139#define BOOTDIR "/"
140
141#define HAVE_LCD_CONTRAST
142
143#define MIN_CONTRAST_SETTING 5
144#define MAX_CONTRAST_SETTING 63
145
146/* Define this if a programmable hotkey is mapped */
147#define HAVE_HOTKEY
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h
index 201ffba656..aade199dd2 100644
--- a/firmware/export/cpu.h
+++ b/firmware/export/cpu.h
@@ -20,9 +20,6 @@
20 ****************************************************************************/ 20 ****************************************************************************/
21#include "config.h" 21#include "config.h"
22 22
23#if CONFIG_CPU == SH7034
24#include "sh7034.h"
25#endif
26#if CONFIG_CPU == MCF5249 23#if CONFIG_CPU == MCF5249
27#include "mcf5249.h" 24#include "mcf5249.h"
28#endif 25#endif
diff --git a/firmware/export/hwcompat.h b/firmware/export/hwcompat.h
index c37add49f9..ea167a4adf 100644
--- a/firmware/export/hwcompat.h
+++ b/firmware/export/hwcompat.h
@@ -24,37 +24,6 @@
24#include <stdbool.h> 24#include <stdbool.h>
25#include "config.h" 25#include "config.h"
26 26
27#if (CONFIG_CPU == SH7034) && (CONFIG_PLATFORM & PLATFORM_NATIVE)
28
29#define ROM_VERSION (*(short *)0x020000fe)
30
31/* Bit mask values for HW compatibility */
32#define ATA_ADDRESS_200 0x0100
33#define USB_ACTIVE_HIGH 0x0100
34#define PR_ACTIVE_HIGH 0x0100
35#define LCD_CONTRAST_BIAS 0x0200
36#define MMC_CLOCK_POLARITY 0x0400
37#define TUNER_MODEL 0x0800
38
39#ifdef ARCHOS_PLAYER
40#define HW_MASK 0
41#else /* Recorders, Ondios */
42#define HW_MASK (*(short *)0x020000fc)
43#endif
44
45#ifdef CONFIG_TUNER_MULTI
46static inline int tuner_detect_type(void)
47{
48 return (HW_MASK & TUNER_MODEL) ? TEA5767 : S1A0903X01;
49}
50#endif
51
52#endif /* (CONFIG_CPU == SH7034) && (CONFIG_PLATFORM & PLATFORM_NATIVE) */
53
54#ifdef ARCHOS_PLAYER
55bool is_new_player(void);
56#endif
57
58#ifdef IPOD_ARCH 27#ifdef IPOD_ARCH
59#ifdef IPOD_VIDEO 28#ifdef IPOD_VIDEO
60#ifdef BOOTLOADER 29#ifdef BOOTLOADER
diff --git a/firmware/export/mas35xx.h b/firmware/export/mas35xx.h
deleted file mode 100644
index 02691f3de2..0000000000
--- a/firmware/export/mas35xx.h
+++ /dev/null
@@ -1,292 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Implementation of MAS35xx audiohw api driver.
11 *
12 * Copyright (C) 2007 by Christian Gmeiner
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23
24#ifndef _MAS35XX_H
25#define _MAS35XX_H
26
27#include "config.h"
28#include "mascodec.h"
29
30#define MAS_BANK_D0 0
31#define MAS_BANK_D1 1
32
33/* registers common to all MAS35xx */
34#define MAS_REG_DCCF 0x8e
35#define MAS_REG_MUTE 0xaa
36#define MAS_REG_PIODATA 0xc8
37#define MAS_REG_StartUpConfig 0xe6
38#define MAS_REG_KPRESCALE 0xe7
39
40#if CONFIG_CODEC == MAS3507D
41
42#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | PRESCALER_CAP)
43
44AUDIOHW_SETTING(VOLUME, "dB", 0, 1, -78, 18, -18)
45AUDIOHW_SETTING(BASS, "dB", 0, 1, -15, 15, 7)
46AUDIOHW_SETTING(TREBLE, "dB", 0, 1, -15, 15, 7)
47
48/* I2C defines */
49#define MAS_ADR 0x3a
50#define MAS_DEV_WRITE (MAS_ADR | 0x00)
51#define MAS_DEV_READ (MAS_ADR | 0x01)
52
53/* MAS3507D registers */
54#define MAS_DATA_WRITE 0x68
55#define MAS_DATA_READ 0x69
56#define MAS_CONTROL 0x6a
57
58#define MAS_REG_KBASS 0x6b
59#define MAS_REG_KTREBLE 0x6f
60
61/* MAS3507D commands */
62#define MAS_CMD_READ_ANCILLARY 0x30
63#define MAS_CMD_WRITE_REG 0x90
64#define MAS_CMD_WRITE_D0_MEM 0xa0
65#define MAS_CMD_WRITE_D1_MEM 0xb0
66#define MAS_CMD_READ_REG 0xd0
67#define MAS_CMD_READ_D0_MEM 0xe0
68#define MAS_CMD_READ_D1_MEM 0xf0
69
70/* MAS3507D D0 memmory cells */
71#define MAS_D0_MPEG_FRAME_COUNT 0x300
72#define MAS_D0_MPEG_STATUS_1 0x301
73#define MAS_D0_MPEG_STATUS_2 0x302
74#define MAS_D0_CRC_ERROR_COUNT 0x303
75#define MAS_D0_OUT_LL 0x7f8
76#define MAS_D0_OUT_LR 0x7f9
77#define MAS_D0_OUT_RL 0x7fa
78#define MAS_D0_OUT_RR 0x7fb
79
80static const unsigned int bass_table[] =
81{
82 0x9e400, /* -15dB */
83 0xa2800, /* -14dB */
84 0xa7400, /* -13dB */
85 0xac400, /* -12dB */
86 0xb1800, /* -11dB */
87 0xb7400, /* -10dB */
88 0xbd400, /* -9dB */
89 0xc3c00, /* -8dB */
90 0xca400, /* -7dB */
91 0xd1800, /* -6dB */
92 0xd8c00, /* -5dB */
93 0xe0400, /* -4dB */
94 0xe8000, /* -3dB */
95 0xefc00, /* -2dB */
96 0xf7c00, /* -1dB */
97 0,
98 0x800, /* 1dB */
99 0x10000, /* 2dB */
100 0x17c00, /* 3dB */
101 0x1f800, /* 4dB */
102 0x27000, /* 5dB */
103 0x2e400, /* 6dB */
104 0x35800, /* 7dB */
105 0x3c000, /* 8dB */
106 0x42800, /* 9dB */
107 0x48800, /* 10dB */
108 0x4e400, /* 11dB */
109 0x53800, /* 12dB */
110 0x58800, /* 13dB */
111 0x5d400, /* 14dB */
112 0x61800 /* 15dB */
113};
114
115static const unsigned int treble_table[] =
116{
117 0xb2c00, /* -15dB */
118 0xbb400, /* -14dB */
119 0xc1800, /* -13dB */
120 0xc6c00, /* -12dB */
121 0xcbc00, /* -11dB */
122 0xd0400, /* -10dB */
123 0xd5000, /* -9dB */
124 0xd9800, /* -8dB */
125 0xde000, /* -7dB */
126 0xe2800, /* -6dB */
127 0xe7e00, /* -5dB */
128 0xec000, /* -4dB */
129 0xf0c00, /* -3dB */
130 0xf5c00, /* -2dB */
131 0xfac00, /* -1dB */
132 0,
133 0x5400, /* 1dB */
134 0xac00, /* 2dB */
135 0x10400, /* 3dB */
136 0x16000, /* 4dB */
137 0x1c000, /* 5dB */
138 0x22400, /* 6dB */
139 0x28400, /* 7dB */
140 0x2ec00, /* 8dB */
141 0x35400, /* 9dB */
142 0x3c000, /* 10dB */
143 0x42c00, /* 11dB */
144 0x49c00, /* 12dB */
145 0x51800, /* 13dB */
146 0x58400, /* 14dB */
147 0x5f800 /* 15dB */
148};
149
150static const unsigned int prescale_table[] =
151{
152 0x80000, /* 0db */
153 0x8e000, /* 1dB */
154 0x9a400, /* 2dB */
155 0xa5800, /* 3dB */
156 0xaf400, /* 4dB */
157 0xb8000, /* 5dB */
158 0xbfc00, /* 6dB */
159 0xc6c00, /* 7dB */
160 0xcd000, /* 8dB */
161 0xd25c0, /* 9dB */
162 0xd7800, /* 10dB */
163 0xdc000, /* 11dB */
164 0xdfc00, /* 12dB */
165 0xe3400, /* 13dB */
166 0xe6800, /* 14dB */
167 0xe9400 /* 15dB */
168};
169
170#else /* CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F */
171
172AUDIOHW_SETTING(VOLUME, "dB", 0, 1,-100, 12, -25)
173AUDIOHW_SETTING(BASS, "dB", 0, 1, -12, 12, 6)
174AUDIOHW_SETTING(TREBLE, "dB", 0, 1, -12, 12, 6)
175AUDIOHW_SETTING(LOUDNESS, "dB", 0, 1, 0, 17, 0)
176AUDIOHW_SETTING(AVC, "", 0, 1, -1, 4, 0)
177AUDIOHW_SETTING(MDB_STRENGTH, "dB", 0, 1, 0, 127, 48)
178AUDIOHW_SETTING(MDB_HARMONICS, "%", 0, 1, 0, 100, 50)
179AUDIOHW_SETTING(MDB_CENTER, "Hz", 0, 10, 20, 300, 60)
180AUDIOHW_SETTING(MDB_SHAPE, "Hz", 0, 10, 50, 300, 90)
181AUDIOHW_SETTING(MDB_ENABLE, "", 0, 1, 0, 1, 0)
182AUDIOHW_SETTING(SUPERBASS, "", 0, 1, 0, 1, 0)
183
184#if CONFIG_CODEC == MAS3587F && defined(HAVE_RECORDING)
185/* MAS3587F and MAS3539F handle clipping prevention internally so we do not
186 * need the prescaler -> CLIPPING_CAP */
187#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | BALANCE_CAP | CLIPPING_CAP | \
188 MONO_VOL_CAP | LIN_GAIN_CAP | MIC_GAIN_CAP)
189AUDIOHW_SETTING(LEFT_GAIN, "dB", 1, 1, 0, 15, 8, (val - 2) * 15)
190AUDIOHW_SETTING(RIGHT_GAIN, "dB", 1, 1, 0, 15, 8, (val - 2) * 15)
191AUDIOHW_SETTING(MIC_GAIN, "dB", 1, 1, 0, 15, 2, val * 15 + 210)
192#else
193/* MAS3587F and MAS3539F handle clipping prevention internally so we do not
194 * need the prescaler -> CLIPPING_CAP */
195#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | BALANCE_CAP | CLIPPING_CAP | \
196 MONO_VOL_CAP)
197#endif /* MAS3587F && HAVE_RECORDING */
198
199/* I2C defines */
200#define MAS_ADR 0x3c
201#define MAS_DEV_WRITE (MAS_ADR | 0x00)
202#define MAS_DEV_READ (MAS_ADR | 0x01)
203
204/* MAS3587F/MAS3539F registers */
205#define MAS_DATA_WRITE 0x68
206#define MAS_DATA_READ 0x69
207#define MAS_CODEC_WRITE 0x6c
208#define MAS_CODEC_READ 0x6d
209#define MAS_CONTROL 0x6a
210#define MAS_DCCF 0x76
211#define MAS_DCFR 0x77
212
213#define MAS_REG_KMDB_SWITCH 0x21
214#define MAS_REG_KMDB_STR 0x22
215#define MAS_REG_KMDB_HAR 0x23
216#define MAS_REG_KMDB_FC 0x24
217#define MAS_REG_KLOUDNESS 0x1e
218#define MAS_REG_QPEAK_L 0x0a
219#define MAS_REG_QPEAK_R 0x0b
220#define MAS_REG_DQPEAK_L 0x0c
221#define MAS_REG_DQPEAK_R 0x0d
222#define MAS_REG_VOLUME_CONTROL 0x10
223#define MAS_REG_BALANCE 0x11
224#define MAS_REG_KAVC 0x12
225#define MAS_REG_KBASS 0x14
226#define MAS_REG_KTREBLE 0x15
227
228/* MAS3587F/MAS3539F commands */
229#define MAS_CMD_READ_ANCILLARY 0x50
230#define MAS_CMD_FAST_PRG_DL 0x60
231#define MAS_CMD_READ_IC_VER 0x70
232#define MAS_CMD_READ_REG 0xa0
233#define MAS_CMD_WRITE_REG 0xb0
234#define MAS_CMD_READ_D0_MEM 0xc0
235#define MAS_CMD_READ_D1_MEM 0xd0
236#define MAS_CMD_WRITE_D0_MEM 0xe0
237#define MAS_CMD_WRITE_D1_MEM 0xf0
238
239/* MAS3587F D0 memory cells */
240#if CONFIG_CODEC == MAS3587F
241#define MAS_D0_APP_SELECT 0x7f6
242#define MAS_D0_APP_RUNNING 0x7f7
243#define MAS_D0_ENCODER_CONTROL 0x7f0
244#define MAS_D0_IO_CONTROL_MAIN 0x7f1
245#define MAS_D0_INTERFACE_CONTROL 0x7f2
246#define MAS_D0_OFREQ_CONTROL 0x7f3
247#define MAS_D0_OUT_CLK_CONFIG 0x7f4
248#define MAS_D0_SPD_OUT_BITS 0x7f8
249#define MAS_D0_SOFT_MUTE 0x7f9
250#define MAS_D0_OUT_LL 0x7fc
251#define MAS_D0_OUT_LR 0x7fd
252#define MAS_D0_OUT_RL 0x7fe
253#define MAS_D0_OUT_RR 0x7ff
254#define MAS_D0_MPEG_FRAME_COUNT 0xfd0
255#define MAS_D0_MPEG_STATUS_1 0xfd1
256#define MAS_D0_MPEG_STATUS_2 0xfd2
257#define MAS_D0_CRC_ERROR_COUNT 0xfd3
258
259/* MAS3539F D0 memory cells */
260#elif CONFIG_CODEC == MAS3539F
261#define MAS_D0_APP_SELECT 0x34b
262#define MAS_D0_APP_RUNNING 0x34c
263/* no encoder :( */
264#define MAS_D0_IO_CONTROL_MAIN 0x346
265#define MAS_D0_INTERFACE_CONTROL 0x347
266#define MAS_D0_OFREQ_CONTROL 0x348
267#define MAS_D0_OUT_CLK_CONFIG 0x349
268#define MAS_D0_SPD_OUT_BITS 0x351
269#define MAS_D0_SOFT_MUTE 0x350
270#define MAS_D0_OUT_LL 0x354
271#define MAS_D0_OUT_LR 0x355
272#define MAS_D0_OUT_RL 0x356
273#define MAS_D0_OUT_RR 0x357
274#define MAS_D0_MPEG_FRAME_COUNT 0xfd0
275#define MAS_D0_MPEG_STATUS_1 0xfd1
276#define MAS_D0_MPEG_STATUS_2 0xfd2
277#define MAS_D0_CRC_ERROR_COUNT 0xfd3
278#endif
279
280/* Function prototypes */
281extern void audiohw_set_loudness(int value);
282extern void audiohw_set_avc(int value);
283extern void audiohw_set_mdb_strength(int value);
284extern void audiohw_set_mdb_harmonics(int value);
285extern void audiohw_set_mdb_center(int value);
286extern void audiohw_set_mdb_shape(int value);
287extern void audiohw_set_mdb_enable(int value);
288extern void audiohw_set_superbass(int value);
289
290#endif /* CONFIG_CODEC */
291
292#endif /* _MAS35XX_H */
diff --git a/firmware/export/mascodec.h b/firmware/export/mascodec.h
deleted file mode 100644
index 00690ae7dd..0000000000
--- a/firmware/export/mascodec.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _MASCODEC_H_
22#define _MASCODEC_H_
23
24/* unused: int mas_default_read(unsigned short *buf); */
25#if CONFIG_CODEC == MAS3507D
26int mas_run(unsigned short address);
27#endif
28int mas_readmem(int bank, int addr, unsigned long* dest, int len);
29int mas_writemem(int bank, int addr, const unsigned long* src, int len);
30int mas_readreg(int reg);
31int mas_writereg(int reg, unsigned int val);
32void mas_reset(void);
33/* unused: int mas_direct_config_read(unsigned char reg); */
34int mas_direct_config_write(unsigned char reg, unsigned int val);
35int mas_codec_writereg(int reg, unsigned int val);
36int mas_codec_readreg(int reg);
37unsigned long mas_readver(void);
38
39#endif
40
41#if CONFIG_TUNER & S1A0903X01
42void mas_store_pllfreq(int freq);
43int mas_get_pllfreq(void);
44#endif
45
diff --git a/firmware/export/mp3_playback.h b/firmware/export/mp3_playback.h
index 7434021611..51efb45651 100644
--- a/firmware/export/mp3_playback.h
+++ b/firmware/export/mp3_playback.h
@@ -39,15 +39,6 @@ void mp3_init(int volume, int bass, int treble, int balance, int loudness,
39 int mdb_center, int mdb_shape, bool mdb_enable, 39 int mdb_center, int mdb_shape, bool mdb_enable,
40 bool superbass); 40 bool superbass);
41 41
42/* exported just for mpeg.c, to keep the recording there */
43#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
44void demand_irq_enable(bool on);
45#endif
46
47/* new functions, exported to plugin API */
48#if CONFIG_CODEC == MAS3587F
49void mp3_play_init(void);
50#endif
51void mp3_play_data(const void* start, size_t size, 42void mp3_play_data(const void* start, size_t size,
52 mp3_play_callback_t get_more); 43 mp3_play_callback_t get_more);
53void mp3_play_pause(bool play); 44void mp3_play_pause(bool play);
diff --git a/firmware/export/rtc.h b/firmware/export/rtc.h
index 216de87dea..a668c9c729 100644
--- a/firmware/export/rtc.h
+++ b/firmware/export/rtc.h
@@ -38,16 +38,6 @@ void rtc_init(void);
38int rtc_read_datetime(struct tm *tm); 38int rtc_read_datetime(struct tm *tm);
39int rtc_write_datetime(const struct tm *tm); 39int rtc_write_datetime(const struct tm *tm);
40 40
41#if CONFIG_RTC == RTC_M41ST84W
42
43/* The RTC in the Archos devices is used for much more than just the clock
44 data */
45int rtc_read(unsigned char address);
46int rtc_read_multiple(unsigned char address, unsigned char *buf, int numbytes);
47int rtc_write(unsigned char address, unsigned char value);
48
49#endif /* RTC_M41ST84W */
50
51#ifdef HAVE_RTC_ALARM 41#ifdef HAVE_RTC_ALARM
52void rtc_set_alarm(int h, int m); 42void rtc_set_alarm(int h, int m);
53void rtc_get_alarm(int *h, int *m); 43void rtc_get_alarm(int *h, int *m);
diff --git a/firmware/export/s1a0903x01.h b/firmware/export/s1a0903x01.h
deleted file mode 100644
index d9f1a11baf..0000000000
--- a/firmware/export/s1a0903x01.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 * Tuner header for the Samsung S1A0903X01
10 *
11 * Copyright (C) 2007 Michael Sevakis
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#ifndef _S1A0903X01_H_
24#define _S1A0903X01_H_
25
26/* Define additional tuner messages here */
27#define HAVE_RADIO_MUTE_TIMEOUT
28
29#if 0
30#define S1A0903X01_IF_MEASUREMENT (RADIO_SET_CHIP_FIRST+0)
31#define S1A0903X01_SENSITIVITY (RADIO_SET_CHIP_FIRST+1)
32#endif
33
34int s1a0903x01_set(int setting, int value);
35int s1a0903x01_get(int setting);
36
37#ifndef CONFIG_TUNER_MULTI
38#define tuner_get s1a0903x01_get
39#define tuner_set s1a0903x01_set
40#endif
41
42#endif /* _S1A0903X01_H_ */
diff --git a/firmware/export/sh7034.h b/firmware/export/sh7034.h
deleted file mode 100644
index 2695acbc00..0000000000
--- a/firmware/export/sh7034.h
+++ /dev/null
@@ -1,376 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Alan Korr
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __SH7034_H__
23#define __SH7034_H__
24
25#define GBR 0x00000000
26
27/* register address macros: */
28
29#define SMR0_ADDR 0x05FFFEC0
30#define BRR0_ADDR 0x05FFFEC1
31#define SCR0_ADDR 0x05FFFEC2
32#define TDR0_ADDR 0x05FFFEC3
33#define SSR0_ADDR 0x05FFFEC4
34#define RDR0_ADDR 0x05FFFEC5
35#define SMR1_ADDR 0x05FFFEC8
36#define BRR1_ADDR 0x05FFFEC9
37#define SCR1_ADDR 0x05FFFECA
38#define TDR1_ADDR 0x05FFFECB
39#define SSR1_ADDR 0x05FFFECC
40#define RDR1_ADDR 0x05FFFECD
41
42#define ADDRAH_ADDR 0x05FFFEE0
43#define ADDRAL_ADDR 0x05FFFEE1
44#define ADDRBH_ADDR 0x05FFFEE2
45#define ADDRBL_ADDR 0x05FFFEE3
46#define ADDRCH_ADDR 0x05FFFEE4
47#define ADDRCL_ADDR 0x05FFFEE5
48#define ADDRDH_ADDR 0x05FFFEE6
49#define ADDRDL_ADDR 0x05FFFEE7
50#define ADCSR_ADDR 0x05FFFEE8
51#define ADCR_ADDR 0x05FFFEE9
52
53#define TSTR_ADDR 0x05FFFF00
54#define TSNC_ADDR 0x05FFFF01
55#define TMDR_ADDR 0x05FFFF02
56#define TFCR_ADDR 0x05FFFF03
57#define TCR0_ADDR 0x05FFFF04
58#define TIOR0_ADDR 0x05FFFF05
59#define TIER0_ADDR 0x05FFFF06
60#define TSR0_ADDR 0x05FFFF07
61#define TCNT0_ADDR 0x05FFFF08
62#define GRA0_ADDR 0x05FFFF0A
63#define GRB0_ADDR 0x05FFFF0C
64#define TCR1_ADDR 0x05FFFF0E
65#define TIOR1_ADDR 0x05FFFF0F
66#define TIER1_ADDR 0x05FFFF10
67#define TSR1_ADDR 0x05FFFF11
68#define TCNT1_ADDR 0x05FFFF12
69#define GRA1_ADDR 0x05FFFF14
70#define GRB1_ADDR 0x05FFFF16
71#define TCR2_ADDR 0x05FFFF18
72#define TIOR2_ADDR 0x05FFFF19
73#define TIER2_ADDR 0x05FFFF1A
74#define TSR2_ADDR 0x05FFFF1B
75#define TCNT2_ADDR 0x05FFFF1C
76#define GRA2_ADDR 0x05FFFF1E
77#define GRB2_ADDR 0x05FFFF20
78#define TCR3_ADDR 0x05FFFF22
79#define TIOR3_ADDR 0x05FFFF23
80#define TIER3_ADDR 0x05FFFF24
81#define TSR3_ADDR 0x05FFFF25
82#define TCNT3_ADDR 0x05FFFF26
83#define GRA3_ADDR 0x05FFFF28
84#define GRB3_ADDR 0x05FFFF2A
85#define BRA3_ADDR 0x05FFFF2C
86#define BRB3_ADDR 0x05FFFF2E
87#define TOCR_ADDR 0x05FFFF31
88#define TCR4_ADDR 0x05FFFF32
89#define TIOR4_ADDR 0x05FFFF33
90#define TIER4_ADDR 0x05FFFF34
91#define TSR4_ADDR 0x05FFFF35
92#define TCNT4_ADDR 0x05FFFF36
93#define GRA4_ADDR 0x05FFFF38
94#define GRB4_ADDR 0x05FFFF3A
95#define BRA4_ADDR 0x05FFFF3C
96#define BRB4_ADDR 0x05FFFF3E
97
98#define SAR0_ADDR 0x05FFFF40
99#define DAR0_ADDR 0x05FFFF44
100#define DMAOR_ADDR 0x05FFFF48
101#define DTCR0_ADDR 0x05FFFF4A
102#define CHCR0_ADDR 0x05FFFF4E
103#define SAR1_ADDR 0x05FFFF50
104#define DAR1_ADDR 0x05FFFF54
105#define DTCR1_ADDR 0x05FFFF5A
106#define CHCR1_ADDR 0x05FFFF5E
107#define SAR2_ADDR 0x05FFFF60
108#define DAR2_ADDR 0x05FFFF64
109#define DTCR2_ADDR 0x05FFFF6A
110#define CHCR2_ADDR 0x05FFFF6E
111#define SAR3_ADDR 0x05FFFF70
112#define DAR3_ADDR 0x05FFFF74
113#define DTCR3_ADDR 0x05FFFF7A
114#define CHCR3_ADDR 0x05FFFF7E
115
116#define IPRA_ADDR 0x05FFFF84
117#define IPRB_ADDR 0x05FFFF86
118#define IPRC_ADDR 0x05FFFF88
119#define IPRD_ADDR 0x05FFFF8A
120#define IPRE_ADDR 0x05FFFF8C
121#define ICR_ADDR 0x05FFFF8E
122
123#define BARH_ADDR 0x05FFFF90
124#define BARL_ADDR 0x05FFFF92
125#define BAMRH_ADDR 0x05FFFF94
126#define BAMRL_ADDR 0x05FFFF96
127#define BBR_ADDR 0x05FFFF98
128
129#define BCR_ADDR 0x05FFFFA0
130#define WCR1_ADDR 0x05FFFFA2
131#define WCR2_ADDR 0x05FFFFA4
132#define WCR3_ADDR 0x05FFFFA6
133#define DCR_ADDR 0x05FFFFA8
134#define PCR_ADDR 0x05FFFFAA
135#define RCR_ADDR 0x05FFFFAC
136#define RTCSR_ADDR 0x05FFFFAE
137#define RTCNT_ADDR 0x05FFFFB0
138#define RTCOR_ADDR 0x05FFFFB2
139
140#define TCSR_ADDR 0x05FFFFB8
141#define TCNT_ADDR 0x05FFFFB9
142#define RSTCSR_ADDR 0x05FFFFBB
143
144#define SBYCR_ADDR 0x05FFFFBC
145
146#define PADR_ADDR 0x05FFFFC0
147#define PBDR_ADDR 0x05FFFFC2
148#define PAIOR_ADDR 0x05FFFFC4
149#define PBIOR_ADDR 0x05FFFFC6
150#define PACR1_ADDR 0x05FFFFC8
151#define PACR2_ADDR 0x05FFFFCA
152#define PBCR1_ADDR 0x05FFFFCC
153#define PBCR2_ADDR 0x05FFFFCE
154#define PCDR_ADDR 0x05FFFFD0
155
156#define CASCR_ADDR 0x05FFFFEE
157
158/* byte halves of the ports */
159#define PADRH_ADDR 0x05FFFFC0
160#define PADRL_ADDR 0x05FFFFC1
161#define PBDRH_ADDR 0x05FFFFC2
162#define PBDRL_ADDR 0x05FFFFC3
163#define PAIORH_ADDR 0x05FFFFC4
164#define PAIORL_ADDR 0x05FFFFC5
165#define PBIORH_ADDR 0x05FFFFC6
166#define PBIORL_ADDR 0x05FFFFC7
167
168
169/* A/D control/status register bits */
170#define ADCSR_CH 0x07 /* Channel/group select */
171#define ADCSR_CKS 0x08 /* Clock select */
172#define ADCSR_SCAN 0x10 /* Scan mode */
173#define ADCSR_ADST 0x20 /* A/D start */
174#define ADCSR_ADIE 0x40 /* A/D interrupt enable */
175#define ADCSR_ADF 0x80 /* A/D end flag */
176
177/* A/D control register bits */
178#define ADCR_TRGE 0x80 /* Trigger enable */
179
180/* register macros for direct access: */
181
182#define SMR0 (*((volatile unsigned char*)SMR0_ADDR))
183#define BRR0 (*((volatile unsigned char*)BRR0_ADDR))
184#define SCR0 (*((volatile unsigned char*)SCR0_ADDR))
185#define TDR0 (*((volatile unsigned char*)TDR0_ADDR))
186#define SSR0 (*((volatile unsigned char*)SSR0_ADDR))
187#define RDR0 (*((volatile unsigned char*)RDR0_ADDR))
188#define SMR1 (*((volatile unsigned char*)SMR1_ADDR))
189#define BRR1 (*((volatile unsigned char*)BRR1_ADDR))
190#define SCR1 (*((volatile unsigned char*)SCR1_ADDR))
191#define TDR1 (*((volatile unsigned char*)TDR1_ADDR))
192#define SSR1 (*((volatile unsigned char*)SSR1_ADDR))
193#define RDR1 (*((volatile unsigned char*)RDR1_ADDR))
194
195#define ADDRA (*((volatile unsigned short*)ADDRAH_ADDR)) /* combined */
196#define ADDRAH (*((volatile unsigned char*)ADDRAH_ADDR))
197#define ADDRAL (*((volatile unsigned char*)ADDRAL_ADDR))
198#define ADDRB (*((volatile unsigned short*)ADDRBH_ADDR)) /* combined */
199#define ADDRBH (*((volatile unsigned char*)ADDRBH_ADDR))
200#define ADDRBL (*((volatile unsigned char*)ADDRBL_ADDR))
201#define ADDRC (*((volatile unsigned short*)ADDRCH_ADDR)) /* combined */
202#define ADDRCH (*((volatile unsigned char*)ADDRCH_ADDR))
203#define ADDRCL (*((volatile unsigned char*)ADDRCL_ADDR))
204#define ADDRD (*((volatile unsigned short*)ADDRDH_ADDR)) /* combined */
205#define ADDRDH (*((volatile unsigned char*)ADDRDH_ADDR))
206#define ADDRDL (*((volatile unsigned char*)ADDRDL_ADDR))
207#define ADCSR (*((volatile unsigned char*)ADCSR_ADDR))
208#define ADCR (*((volatile unsigned char*)ADCR_ADDR))
209
210#define TSTR (*((volatile unsigned char*)TSTR_ADDR))
211#define TSNC (*((volatile unsigned char*)TSNC_ADDR))
212#define TMDR (*((volatile unsigned char*)TMDR_ADDR))
213#define TFCR (*((volatile unsigned char*)TFCR_ADDR))
214#define TCR0 (*((volatile unsigned char*)TCR0_ADDR))
215#define TIOR0 (*((volatile unsigned char*)TIOR0_ADDR))
216#define TIER0 (*((volatile unsigned char*)TIER0_ADDR))
217#define TSR0 (*((volatile unsigned char*)TSR0_ADDR))
218#define TCNT0 (*((volatile unsigned short*)TCNT0_ADDR))
219#define GRA0 (*((volatile unsigned short*)GRA0_ADDR))
220#define GRB0 (*((volatile unsigned short*)GRB0_ADDR))
221#define TCR1 (*((volatile unsigned char*)TCR1_ADDR))
222#define TIOR1 (*((volatile unsigned char*)TIOR1_ADDR))
223#define TIER1 (*((volatile unsigned char*)TIER1_ADDR))
224#define TSR1 (*((volatile unsigned char*)TSR1_ADDR))
225#define TCNT1 (*((volatile unsigned short*)TCNT1_ADDR))
226#define GRA1 (*((volatile unsigned short*)GRA1_ADDR))
227#define GRB1 (*((volatile unsigned short*)GRB1_ADDR))
228#define TCR2 (*((volatile unsigned char*)TCR2_ADDR))
229#define TIOR2 (*((volatile unsigned char*)TIOR2_ADDR))
230#define TIER2 (*((volatile unsigned char*)TIER2_ADDR))
231#define TSR2 (*((volatile unsigned char*)TSR2_ADDR))
232#define TCNT2 (*((volatile unsigned short*)TCNT2_ADDR))
233#define GRA2 (*((volatile unsigned short*)GRA2_ADDR))
234#define GRB2 (*((volatile unsigned short*)GRB2_ADDR))
235#define TCR3 (*((volatile unsigned char*)TCR3_ADDR))
236#define TIOR3 (*((volatile unsigned char*)TIOR3_ADDR))
237#define TIER3 (*((volatile unsigned char*)TIER3_ADDR))
238#define TSR3 (*((volatile unsigned char*)TSR3_ADDR))
239#define TCNT3 (*((volatile unsigned short*)TCNT3_ADDR))
240#define GRA3 (*((volatile unsigned short*)GRA3_ADDR))
241#define GRB3 (*((volatile unsigned short*)GRB3_ADDR))
242#define BRA3 (*((volatile unsigned short*)BRA3_ADDR))
243#define BRB3 (*((volatile unsigned short*)BRB3_ADDR))
244#define TOCR (*((volatile unsigned char*)TOCR_ADDR))
245#define TCR4 (*((volatile unsigned char*)TCR4_ADDR))
246#define TIOR4 (*((volatile unsigned char*)TIOR4_ADDR))
247#define TIER4 (*((volatile unsigned char*)TIER4_ADDR))
248#define TSR4 (*((volatile unsigned char*)TSR4_ADDR))
249#define TCNT4 (*((volatile unsigned short*)TCNT4_ADDR))
250#define GRA4 (*((volatile unsigned short*)GRA4_ADDR))
251#define GRB4 (*((volatile unsigned short*)GRB4_ADDR))
252#define BRA4 (*((volatile unsigned short*)BRA4_ADDR))
253#define BRB4 (*((volatile unsigned short*)BRB4_ADDR))
254
255#define SAR0 (*((volatile unsigned long*)SAR0_ADDR))
256#define DAR0 (*((volatile unsigned long*)DAR0_ADDR))
257#define DMAOR (*((volatile unsigned short*)DMAOR_ADDR))
258#define DTCR0 (*((volatile unsigned short*)DTCR0_ADDR))
259#define CHCR0 (*((volatile unsigned short*)CHCR0_ADDR))
260#define SAR1 (*((volatile unsigned long*)SAR1_ADDR))
261#define DAR1 (*((volatile unsigned long*)DAR1_ADDR))
262#define DTCR1 (*((volatile unsigned short*)DTCR1_ADDR))
263#define CHCR1 (*((volatile unsigned short*)CHCR1_ADDR))
264#define SAR2 (*((volatile unsigned long*)SAR2_ADDR))
265#define DAR2 (*((volatile unsigned long*)DAR2_ADDR))
266#define DTCR2 (*((volatile unsigned short*)DTCR2_ADDR))
267#define CHCR2 (*((volatile unsigned short*)CHCR2_ADDR))
268#define SAR3 (*((volatile unsigned long*)SAR3_ADDR))
269#define DAR3 (*((volatile unsigned long*)DAR3_ADDR))
270#define DTCR3 (*((volatile unsigned short*)DTCR3_ADDR))
271#define CHCR3 (*((volatile unsigned short*)CHCR3_ADDR))
272
273#define IPRA (*((volatile unsigned short*)IPRA_ADDR))
274#define IPRB (*((volatile unsigned short*)IPRB_ADDR))
275#define IPRC (*((volatile unsigned short*)IPRC_ADDR))
276#define IPRD (*((volatile unsigned short*)IPRD_ADDR))
277#define IPRE (*((volatile unsigned short*)IPRE_ADDR))
278#define ICR (*((volatile unsigned short*)ICR_ADDR))
279
280#define BAR (*((volatile unsigned long*)BARH_ADDR)) /* combined */
281#define BARH (*((volatile unsigned short*)BARH_ADDR))
282#define BARL (*((volatile unsigned short*)BARL_ADDR))
283#define BAMR (*((volatile unsigned long*)BAMRH_ADDR)) /* combined */
284#define BAMRH (*((volatile unsigned short*)BAMRH_ADDR))
285#define BAMRL (*((volatile unsigned short*)BAMRL_ADDR))
286#define BBR (*((volatile unsigned short*)BBR_ADDR))
287
288#define BCR (*((volatile unsigned short*)BCR_ADDR))
289#define WCR1 (*((volatile unsigned short*)WCR1_ADDR))
290#define WCR2 (*((volatile unsigned short*)WCR2_ADDR))
291#define WCR3 (*((volatile unsigned short*)WCR3_ADDR))
292#define DCR (*((volatile unsigned short*)DCR_ADDR))
293#define PCR (*((volatile unsigned short*)PCR_ADDR))
294#define RCR (*((volatile unsigned short*)RCR_ADDR))
295#define RTCSR (*((volatile unsigned short*)RTCSR_ADDR))
296#define RTCNT (*((volatile unsigned short*)RTCNT_ADDR))
297#define RTCOR (*((volatile unsigned short*)RTCOR_ADDR))
298
299#define TCSR_R (*((volatile unsigned char*)TCSR_ADDR))
300#define TCSR_W (*((volatile unsigned short*)(TCSR_ADDR & ~1)))
301#define TCNT_R (*((volatile unsigned char*)TCNT_ADDR))
302#define TCNT_W (*((volatile unsigned short*)(TCNT_ADDR & ~1)))
303#define RSTCSR_R (*((volatile unsigned char*)RSTCSR_ADDR))
304#define RSTCSR_W (*((volatile unsigned short*)(RSTCSR_ADDR & ~1)))
305
306#define SBYCR (*((volatile unsigned char*)SBYCR_ADDR))
307
308#define PADR (*((volatile unsigned short*)PADR_ADDR))
309#define PBDR (*((volatile unsigned short*)PBDR_ADDR))
310#define PAIOR (*((volatile unsigned short*)PAIOR_ADDR))
311#define PBIOR (*((volatile unsigned short*)PBIOR_ADDR))
312#define PACR1 (*((volatile unsigned short*)PACR1_ADDR))
313#define PACR2 (*((volatile unsigned short*)PACR2_ADDR))
314#define PBCR1 (*((volatile unsigned short*)PBCR1_ADDR))
315#define PBCR2 (*((volatile unsigned short*)PBCR2_ADDR))
316#define PCDR (*((volatile unsigned short*)PCDR_ADDR))
317
318#define CASCR (*((volatile unsigned char*)CASCR_ADDR))
319
320/* byte halves of the ports */
321#define PADRH (*((volatile unsigned char*)PADRH_ADDR))
322#define PADRL (*((volatile unsigned char*)PADRL_ADDR))
323#define PBDRH (*((volatile unsigned char*)PBDRH_ADDR))
324#define PBDRL (*((volatile unsigned char*)PBDRL_ADDR))
325#define PAIORH (*((volatile unsigned char*)PAIORH_ADDR))
326#define PAIORL (*((volatile unsigned char*)PAIORL_ADDR))
327#define PBIORH (*((volatile unsigned char*)PBIORH_ADDR))
328#define PBIORL (*((volatile unsigned char*)PBIORL_ADDR))
329
330
331/***************************************************************************
332 * Register bit definitions
333 **************************************************************************/
334
335/*
336 * Serial mode register bits
337 */
338
339#define SYNC_MODE 0x80
340#define SEVEN_BIT_DATA 0x40
341#define PARITY_ON 0x20
342#define ODD_PARITY 0x10
343#define STOP_BITS_2 0x08
344#define ENABLE_MULTIP 0x04
345#define PHI_64 0x03
346#define PHI_16 0x02
347#define PHI_4 0x01
348
349/*
350 * Serial control register bits
351 */
352#define SCI_TIE 0x80 /* Transmit interrupt enable */
353#define SCI_RIE 0x40 /* Receive interrupt enable */
354#define SCI_TE 0x20 /* Transmit enable */
355#define SCI_RE 0x10 /* Receive enable */
356#define SCI_MPIE 0x08 /* Multiprocessor interrupt enable */
357#define SCI_TEIE 0x04 /* Transmit end interrupt enable */
358#define SCI_CKE1 0x02 /* Clock enable 1 */
359#define SCI_CKE0 0x01 /* Clock enable 0 */
360
361/*
362 * Serial status register bits
363 */
364#define SCI_TDRE 0x80 /* Transmit data register empty */
365#define SCI_RDRF 0x40 /* Receive data register full */
366#define SCI_ORER 0x20 /* Overrun error */
367#define SCI_FER 0x10 /* Framing error */
368#define SCI_PER 0x08 /* Parity error */
369#define SCI_TEND 0x04 /* Transmit end */
370#define SCI_MPB 0x02 /* Multiprocessor bit */
371#define SCI_MPBT 0x01 /* Multiprocessor bit transfer */
372
373/* Timer frequency */
374#define TIMER_FREQ CPU_FREQ
375
376#endif
diff --git a/firmware/export/sound.h b/firmware/export/sound.h
index 3a26e30b68..9bcb9a8513 100644
--- a/firmware/export/sound.h
+++ b/firmware/export/sound.h
@@ -109,17 +109,6 @@ void sound_set_hw_eq_band5_frequency(int value);
109#endif /* AUDIOHW_HAVE_EQ_BAND5 */ 109#endif /* AUDIOHW_HAVE_EQ_BAND5 */
110#endif /* AUDIOHW_HAVE_EQ */ 110#endif /* AUDIOHW_HAVE_EQ */
111 111
112#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
113void sound_set_loudness(int value);
114void sound_set_avc(int value);
115void sound_set_mdb_strength(int value);
116void sound_set_mdb_harmonics(int value);
117void sound_set_mdb_center(int value);
118void sound_set_mdb_shape(int value);
119void sound_set_mdb_enable(int value);
120void sound_set_superbass(int value);
121#endif /* (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
122
123void sound_set(int setting, int value); 112void sound_set(int setting, int value);
124int sound_val2phys(int setting, int value); 113int sound_val2phys(int setting, int value);
125 114
diff --git a/firmware/export/tuner.h b/firmware/export/tuner.h
index a166eacf33..a3cc985137 100644
--- a/firmware/export/tuner.h
+++ b/firmware/export/tuner.h
@@ -22,8 +22,9 @@
22#ifndef __TUNER_H__ 22#ifndef __TUNER_H__
23#define __TUNER_H__ 23#define __TUNER_H__
24 24
25#include <stdbool.h>
26
25#include "config.h" 27#include "config.h"
26#include "hwcompat.h"
27 28
28#ifdef HAVE_RDS_CAP 29#ifdef HAVE_RDS_CAP
29#include <sys/types.h> 30#include <sys/types.h>
@@ -114,12 +115,6 @@ extern int (*tuner_get)(int setting);
114#include "lv24020lp.h" 115#include "lv24020lp.h"
115#endif 116#endif
116 117
117/** Samsung S1A0903X01 **/
118#if (CONFIG_TUNER & S1A0903X01)
119/* Ondio FM, FM Recorder */
120#include "s1a0903x01.h"
121#endif
122
123/** Philips TEA5760 **/ 118/** Philips TEA5760 **/
124#if (CONFIG_TUNER & TEA5760) 119#if (CONFIG_TUNER & TEA5760)
125#include "tea5760.h" 120#include "tea5760.h"
diff --git a/firmware/export/usb.h b/firmware/export/usb.h
index 0c74efc9e2..d723f85b1a 100644
--- a/firmware/export/usb.h
+++ b/firmware/export/usb.h
@@ -134,14 +134,8 @@ enum
134}; 134};
135 135
136#ifdef HAVE_USB_POWER 136#ifdef HAVE_USB_POWER
137#if CONFIG_KEYPAD == RECORDER_PAD
138#define USBPOWER_BUTTON BUTTON_F1
139#define USBPOWER_BTN_IGNORE BUTTON_ON
140#elif CONFIG_KEYPAD == ONDIO_PAD
141#define USBPOWER_BUTTON BUTTON_MENU
142#define USBPOWER_BTN_IGNORE BUTTON_OFF
143/*allow people to define this in config-target.h if they need it*/ 137/*allow people to define this in config-target.h if they need it*/
144#elif !defined(USBPOWER_BTN_IGNORE) 138#if !defined(USBPOWER_BTN_IGNORE)
145#define USBPOWER_BTN_IGNORE 0 139#define USBPOWER_BTN_IGNORE 0
146#endif 140#endif
147#endif 141#endif
diff --git a/firmware/firmware.make b/firmware/firmware.make
index 6c01250bde..50b58af794 100644
--- a/firmware/firmware.make
+++ b/firmware/firmware.make
@@ -17,9 +17,7 @@ include $(FIRMDIR)/asm/asm.make
17 17
18FIRMLIB_SRC += $(call preprocess, $(FIRMDIR)/SOURCES) 18FIRMLIB_SRC += $(call preprocess, $(FIRMDIR)/SOURCES)
19FIRMLIB_OBJ := $(call c2obj, $(FIRMLIB_SRC)) 19FIRMLIB_OBJ := $(call c2obj, $(FIRMLIB_SRC))
20ifeq (,$(findstring -DARCHOS_PLAYER,$(TARGET))) 20FIRMLIB_OBJ += $(BUILDDIR)/sysfont.o
21 FIRMLIB_OBJ += $(BUILDDIR)/sysfont.o
22endif
23OTHER_SRC += $(FIRMLIB_SRC) 21OTHER_SRC += $(FIRMLIB_SRC)
24 22
25FIRMLIB = $(BUILDDIR)/firmware/libfirmware.a 23FIRMLIB = $(BUILDDIR)/firmware/libfirmware.a
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 1d164b4668..9a527e9074 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -123,10 +123,7 @@ static void rolo_error(const char *text)
123 lcd_scroll_stop(); 123 lcd_scroll_stop();
124} 124}
125 125
126#if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L || CONFIG_CPU == RK27XX 126#if CONFIG_CPU == IMX31L || CONFIG_CPU == RK27XX
127/* these are in assembler file "descramble.S" for SH7034 */
128extern unsigned short descramble(const unsigned char* source,
129 unsigned char* dest, int length);
130/* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */ 127/* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */
131/* this is in firmware/target/arm/rk27xx/rolo_restart.c for rk27xx */ 128/* this is in firmware/target/arm/rk27xx/rolo_restart.c for rk27xx */
132extern void rolo_restart(const unsigned char* source, unsigned char* dest, 129extern void rolo_restart(const unsigned char* source, unsigned char* dest,
@@ -299,113 +296,7 @@ int rolo_load(const char* filename)
299 /* never reached */ 296 /* never reached */
300 return 0; 297 return 0;
301} 298}
302#else /* defined(CPU_SH) */ 299#endif /* CPU_COLDFIRE | CPU_ARM | CPU_MIPS */
303int rolo_load(const char* filename)
304{
305 int fd;
306 long length;
307 long file_length;
308 unsigned short checksum,file_checksum;
309 unsigned char* ramstart = (void*)&loadaddress;
310 unsigned char* filebuf;
311 size_t filebuf_size;
312
313 lcd_clear_display();
314 lcd_puts(0, 0, "ROLO...");
315 lcd_puts(0, 1, "Loading");
316 lcd_update();
317#ifdef HAVE_REMOTE_LCD
318 lcd_remote_clear_display();
319 lcd_remote_puts(0, 0, "ROLO...");
320 lcd_remote_puts(0, 1, "Loading");
321 lcd_remote_update();
322#endif
323
324 audio_stop();
325
326 fd = open(filename, O_RDONLY);
327 if(-1 == fd) {
328 rolo_error("File not found");
329 return -1;
330 }
331
332 length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
333
334 /* get the system buffer. release only in case of error, otherwise
335 * we don't return anyway */
336 rolo_handle = core_alloc_maximum("rolo", &filebuf_size, NULL);
337 filebuf = core_get_data(rolo_handle);
338
339 /* Read file length from header and compare to real file length */
340 lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
341 if(read(fd, &file_length, 4) != 4) {
342 rolo_error("Error Reading File Length");
343 return -1;
344 }
345 if (length != file_length) {
346 rolo_error("File length mismatch");
347 return -1;
348 }
349
350 /* Read and save checksum */
351 lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
352 if (read(fd, &file_checksum, 2) != 2) {
353 rolo_error("Error Reading checksum");
354 return -1;
355 }
356 lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
357
358 /* verify that file can be read and descrambled */
359 if ((size_t)((2*length)+4) >= filebuf_size) {
360 rolo_error("Not enough room to load file");
361 return -1;
362 }
363
364 if (read(fd, &filebuf[length], length) != (int)length) {
365 rolo_error("Error Reading File");
366 return -1;
367 }
368
369 lcd_puts(0, 1, "Descramble");
370 lcd_update();
371
372 checksum = descramble(filebuf + length, filebuf, length);
373
374 /* Verify checksum against file header */
375 if (checksum != file_checksum) {
376 rolo_error("Checksum Error");
377 return -1;
378 }
379
380#ifdef HAVE_STORAGE_FLUSH
381 lcd_puts(0, 1, "Flushing ");
382 lcd_update();
383 storage_flush();
384#endif
385
386 lcd_puts(0, 1, "Executing ");
387 lcd_update();
388
389 set_irq_level(HIGHEST_IRQ_LEVEL);
390
391 /* Calling these 2 initialization routines was necessary to get the
392 the origional Archos version of the firmware to load and execute. */
393 system_init(); /* Initialize system for restart */
394 i2c_init(); /* Init i2c bus - it seems like a good idea */
395 ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
396 TSTR = 0xE0; /* disable all timers */
397 /* model-specific de-init, needed when flashed */
398 /* Especially the Archos software is picky about this */
399#if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
400 defined(ARCHOS_FMRECORDER)
401 PAIOR = 0x0FA0;
402#endif
403 rolo_restart(filebuf, ramstart, length);
404
405 return 0; /* this is never reached */
406 (void)checksum; (void)file_checksum;
407}
408#endif /* */
409#else /* !defined(IRIVER_IFP7XX_SERIES) */ 300#else /* !defined(IRIVER_IFP7XX_SERIES) */
410int rolo_load(const char* filename) 301int rolo_load(const char* filename)
411{ 302{
diff --git a/firmware/rom.lds b/firmware/rom.lds
index c959bf272d..f2ad1cec50 100644
--- a/firmware/rom.lds
+++ b/firmware/rom.lds
@@ -11,9 +11,6 @@ STARTUP(target/arm/pp/crt0-pp.o)
11#elif defined(CPU_ARM) 11#elif defined(CPU_ARM)
12OUTPUT_FORMAT(elf32-littlearm) 12OUTPUT_FORMAT(elf32-littlearm)
13STARTUP(target/arm/crt0.o) 13STARTUP(target/arm/crt0.o)
14#elif CONFIG_CPU == SH7034
15OUTPUT_FORMAT(elf32-sh)
16STARTUP(target/sh/crt0.o)
17#else 14#else
18OUTPUT_FORMAT(elf32-sh) 15OUTPUT_FORMAT(elf32-sh)
19STARTUP(crt0.o) 16STARTUP(crt0.o)
diff --git a/firmware/sound.c b/firmware/sound.c
index 5d9ca7265b..acf198da2e 100644
--- a/firmware/sound.c
+++ b/firmware/sound.c
@@ -128,16 +128,6 @@ int sound_current(int setting)
128 SOUND_CUR_SET(BALANCE, global_settings.balance) 128 SOUND_CUR_SET(BALANCE, global_settings.balance)
129 SOUND_CUR_SET(CHANNELS, global_settings.channel_config) 129 SOUND_CUR_SET(CHANNELS, global_settings.channel_config)
130 SOUND_CUR_SET(STEREO_WIDTH, global_settings.stereo_width) 130 SOUND_CUR_SET(STEREO_WIDTH, global_settings.stereo_width)
131#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
132 SOUND_CUR_SET(LOUDNESS, global_settings.loudness)
133 SOUND_CUR_SET(AVC, global_settings.avc)
134 SOUND_CUR_SET(MDB_STRENGTH, global_settings.mdb_strength)
135 SOUND_CUR_SET(MDB_HARMONICS, global_settings.mdb_harmonics)
136 SOUND_CUR_SET(MDB_CENTER, global_settings.mdb_center)
137 SOUND_CUR_SET(MDB_SHAPE, global_settings.mdb_shape)
138 SOUND_CUR_SET(MDB_ENABLE, global_settings.mdb_enable)
139 SOUND_CUR_SET(SUPERBASS, global_settings.superbass)
140#endif /* (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
141#if defined(AUDIOHW_HAVE_BASS_CUTOFF) 131#if defined(AUDIOHW_HAVE_BASS_CUTOFF)
142 SOUND_CUR_SET(BASS_CUTOFF, global_settings.bass_cutoff) 132 SOUND_CUR_SET(BASS_CUTOFF, global_settings.bass_cutoff)
143#endif 133#endif
@@ -626,72 +616,6 @@ void sound_set_hw_eq_band4_width(int value)
626#endif 616#endif
627#endif /* AUDIOHW_HAVE_EQ */ 617#endif /* AUDIOHW_HAVE_EQ */
628 618
629#if CONFIG_CODEC == MAS3587F || CONFIG_CODEC == MAS3539F
630void sound_set_loudness(int value)
631{
632 if (!audio_is_initialized)
633 return;
634
635 audiohw_set_loudness(value);
636}
637
638void sound_set_avc(int value)
639{
640 if (!audio_is_initialized)
641 return;
642
643 audiohw_set_avc(value);
644}
645
646void sound_set_mdb_strength(int value)
647{
648 if (!audio_is_initialized)
649 return;
650
651 audiohw_set_mdb_strength(value);
652}
653
654void sound_set_mdb_harmonics(int value)
655{
656 if (!audio_is_initialized)
657 return;
658
659 audiohw_set_mdb_harmonics(value);
660}
661
662void sound_set_mdb_center(int value)
663{
664 if (!audio_is_initialized)
665 return;
666
667 audiohw_set_mdb_center(value);
668}
669
670void sound_set_mdb_shape(int value)
671{
672 if (!audio_is_initialized)
673 return;
674
675 audiohw_set_mdb_shape(value);
676}
677
678void sound_set_mdb_enable(int value)
679{
680 if (!audio_is_initialized)
681 return;
682
683 audiohw_set_mdb_enable(value);
684}
685
686void sound_set_superbass(int value)
687{
688 if (!audio_is_initialized)
689 return;
690
691 audiohw_set_superbass(value);
692}
693#endif /* CONFIG_CODEC == MAS3587F || CONFIG_CODEC == MAS3539F */
694
695#if defined(HAVE_PITCHCONTROL) 619#if defined(HAVE_PITCHCONTROL)
696void sound_set_pitch(int32_t pitch) 620void sound_set_pitch(int32_t pitch)
697{ 621{
diff --git a/firmware/target/hosted/sdl/sim-ui-defines.h b/firmware/target/hosted/sdl/sim-ui-defines.h
index 23825f318b..808804c01f 100644
--- a/firmware/target/hosted/sdl/sim-ui-defines.h
+++ b/firmware/target/hosted/sdl/sim-ui-defines.h
@@ -28,35 +28,7 @@
28 28
29/* colour definitions are R, G, B */ 29/* colour definitions are R, G, B */
30 30
31#if defined(ARCHOS_RECORDER) 31#if defined(IRIVER_H120) || defined(IRIVER_H100)
32#define UI_TITLE "Jukebox Recorder"
33#define UI_WIDTH 270 /* width of GUI window */
34#define UI_HEIGHT 406 /* height of GUI window */
35#define UI_LCD_POSX 80 /* x position of lcd */
36#define UI_LCD_POSY 104 /* y position of lcd */
37
38#elif defined(ARCHOS_PLAYER)
39#define UI_TITLE "Jukebox Player"
40#define UI_WIDTH 284 /* width of GUI window */
41#define UI_HEIGHT 420 /* height of GUI window */
42#define UI_LCD_POSX 75 /* x position of lcd */
43#define UI_LCD_POSY 116 /* y position of lcd */
44
45#elif defined(ARCHOS_FMRECORDER) || defined(ARCHOS_RECORDERV2)
46#define UI_TITLE "Jukebox FM Recorder"
47#define UI_WIDTH 285 /* width of GUI window */
48#define UI_HEIGHT 414 /* height of GUI window */
49#define UI_LCD_POSX 87 /* x position of lcd */
50#define UI_LCD_POSY 77 /* y position of lcd */
51
52#elif defined(ARCHOS_ONDIOSP) || defined(ARCHOS_ONDIOFM)
53#define UI_TITLE "Ondio"
54#define UI_WIDTH 155 /* width of GUI window */
55#define UI_HEIGHT 334 /* height of GUI window */
56#define UI_LCD_POSX 21 /* x position of lcd */
57#define UI_LCD_POSY 82 /* y position of lcd */
58
59#elif defined(IRIVER_H120) || defined(IRIVER_H100)
60#define UI_TITLE "iriver H1x0" 32#define UI_TITLE "iriver H1x0"
61#define UI_WIDTH 379 /* width of GUI window */ 33#define UI_WIDTH 379 /* width of GUI window */
62#define UI_HEIGHT 508 /* height of GUI window */ 34#define UI_HEIGHT 508 /* height of GUI window */
@@ -238,14 +210,6 @@
238#define UI_LCD_POSX 115 /* x position of lcd */ 210#define UI_LCD_POSX 115 /* x position of lcd */
239#define UI_LCD_POSY 54 /* y position of lcd */ 211#define UI_LCD_POSY 54 /* y position of lcd */
240 212
241#elif defined(ARCHOS_AV300)
242#define UI_TITLE "Archos AV300"
243/* We are temporarily using a 2bpp LCD driver and dummy bitmap */
244#define UI_WIDTH 420 /* width of GUI window */
245#define UI_HEIGHT 340 /* height of GUI window */
246#define UI_LCD_POSX 50 /* x position of lcd */
247#define UI_LCD_POSY 50 /* y position of lcd */
248
249#elif defined(MROBE_100) 213#elif defined(MROBE_100)
250#define UI_TITLE "Olympus M:Robe 100" 214#define UI_TITLE "Olympus M:Robe 100"
251#define UI_WIDTH 247 /* width of GUI window */ 215#define UI_WIDTH 247 /* width of GUI window */
diff --git a/firmware/target/sh/adc-sh.c b/firmware/target/sh/adc-sh.c
deleted file mode 100644
index 2e6d6407b8..0000000000
--- a/firmware/target/sh/adc-sh.c
+++ /dev/null
@@ -1,110 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include "system.h"
24#include "kernel.h"
25#include "thread.h"
26#include "string.h"
27#include "adc.h"
28
29/**************************************************************************
30 ** The A/D conversion is done every tick, in three steps:
31 **
32 ** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
33 ** the A/D interrupt is enabled.
34 **
35 ** 2) After the conversion is done (approx. 256*4 cycles later), an interrupt
36 ** is generated at level 1, which is the same level as the tick interrupt
37 ** itself. This interrupt will be pending until the tick interrupt is
38 ** finished.
39 ** When the A/D interrupt is finally served, it will read the results
40 ** from the first conversion and start the conversion of channels 4-7.
41 **
42 ** 3) When the conversion of channels 4-7 is finished, the interrupt is
43 ** triggered again, and the results are read. This time, no new
44 ** conversion is started, it will be done in the next tick interrupt.
45 **
46 ** Thus, each channel will be updated HZ times per second.
47 **
48 *************************************************************************/
49
50static int current_channel;
51static unsigned short adcdata[NUM_ADC_CHANNELS];
52
53static void adc_tick(void)
54{
55 /* Start a conversion of channel group 0. This will trigger an interrupt,
56 and the interrupt handler will take care of group 1. */
57
58 current_channel = 0;
59 ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 3;
60}
61
62void ADITI(void) __attribute__((interrupt_handler));
63void ADITI(void)
64{
65 if(ADCSR & ADCSR_ADF)
66 {
67 ADCSR = 0;
68
69 if(current_channel == 0)
70 {
71 adcdata[0] = ADDRA >> 6;
72 adcdata[1] = ADDRB >> 6;
73 adcdata[2] = ADDRC >> 6;
74 adcdata[3] = ADDRD >> 6;
75 current_channel = 4;
76
77 /* Convert the next group */
78 ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 7;
79 }
80 else
81 {
82 adcdata[4] = ADDRA >> 6;
83 adcdata[5] = ADDRB >> 6;
84 adcdata[6] = ADDRC >> 6;
85 adcdata[7] = ADDRD >> 6;
86 }
87 }
88}
89
90unsigned short adc_read(int channel)
91{
92 return adcdata[channel];
93}
94
95void adc_init(void)
96{
97 ADCR = 0x7f; /* No external trigger; other bits should be 1 according
98 to the manual... */
99
100 ADCSR = 0;
101
102 current_channel = 0;
103
104 /* Enable the A/D IRQ on level 1 */
105 IPRE = (IPRE & 0xf0ff) | 0x0100;
106
107 tick_add_task(adc_tick);
108
109 sleep(2); /* Ensure valid readings when adc_init returns */
110}
diff --git a/firmware/target/sh/archos/app.lds b/firmware/target/sh/archos/app.lds
deleted file mode 100644
index 225f11f705..0000000000
--- a/firmware/target/sh/archos/app.lds
+++ /dev/null
@@ -1,145 +0,0 @@
1#include "config.h"
2
3ENTRY(start)
4
5OUTPUT_FORMAT(elf32-sh)
6STARTUP(target/sh/crt0.o)
7
8#define PLUGINSIZE PLUGIN_BUFFER_SIZE
9#define CODECSIZE CODEC_SIZE
10
11#ifdef DEBUG
12#define STUBOFFSET 0x10000
13#else
14#define STUBOFFSET 0
15#endif
16
17#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
18
19#define DRAMORIG 0x09000000 + STUBOFFSET
20#define IRAMORIG 0x0f000000
21#define IRAMSIZE 0x1000
22
23/* End of the audio buffer, where the codec buffer starts */
24#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
25
26/* Where the codec buffer ends, and the plugin buffer starts */
27#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
28
29MEMORY
30{
31 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
32 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
33}
34
35SECTIONS
36{
37 .vectors :
38 {
39 loadaddress = .;
40 _loadaddress = .;
41 KEEP(*(.resetvectors));
42 *(.resetvectors);
43 KEEP(*(.vectors));
44 *(.vectors);
45 } > DRAM
46
47 .text :
48 {
49 . = ALIGN(0x200);
50 *(.init.text)
51 *(.text*)
52 . = ALIGN(0x4);
53 } > DRAM
54
55 .rodata :
56 {
57 *(.rodata) /* problems without this, dunno why */
58 *(.rodata*)
59 *(.rodata.str1.1)
60 *(.rodata.str1.4)
61 . = ALIGN(0x4);
62
63 /* Pseudo-allocate the copies of the data sections */
64 _datacopy = .;
65 } > DRAM
66
67 /* TRICK ALERT! For RAM execution, we put the .data section at the
68 same load address as the copy. Thus, we don't waste extra RAM
69 when we don't actually need the copy. */
70 .data : AT ( _datacopy )
71 {
72 _datastart = .;
73 *(.data*)
74 . = ALIGN(0x4);
75 _dataend = .;
76 } > DRAM
77
78 /DISCARD/ :
79 {
80 *(.eh_frame)
81 }
82
83 .iram IRAMORIG :
84 {
85 _iramstart = .;
86 *(.icode)
87 *(.irodata)
88 *(.idata)
89 _iramend = .;
90 } > IRAM AT> DRAM
91
92 _iramcopy = LOADADDR(.iram);
93 _noloaddram = LOADADDR(.iram);
94
95 .ibss (NOLOAD) :
96 {
97 _iedata = .;
98 *(.ibss)
99 . = ALIGN(0x4);
100 _iend = .;
101 } > IRAM
102
103 .stack _noloaddram (NOLOAD) :
104 {
105 *(.stack)
106 _stackbegin = .;
107 . += 0x2000;
108 _stackend = .;
109 } > DRAM
110
111 .bss (NOLOAD) :
112 {
113 _edata = .;
114 *(.bss*)
115 *(COMMON)
116 . = ALIGN(0x4);
117 _end = .;
118 } > DRAM
119
120 .audiobuf (NOLOAD) :
121 {
122 . = ALIGN(4);
123 _audiobuffer = .;
124 audiobuffer = .;
125 } > DRAM
126
127 .audiobufend ENDAUDIOADDR (NOLOAD) :
128 {
129 audiobufend = .;
130 _audiobufend = .;
131 } > DRAM
132
133 .codec ENDAUDIOADDR (NOLOAD) :
134 {
135 codecbuf = .;
136 _codecbuf = .;
137 }
138
139 .plugin ENDADDR (NOLOAD) :
140 {
141 _pluginbuf = .;
142 pluginbuf = .;
143 }
144}
145
diff --git a/firmware/target/sh/archos/ata-archos.c b/firmware/target/sh/archos/ata-archos.c
deleted file mode 100644
index 2046d3b33f..0000000000
--- a/firmware/target/sh/archos/ata-archos.c
+++ /dev/null
@@ -1,71 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "cpu.h"
24#include <stdbool.h>
25#include "kernel.h"
26#include "system.h"
27#include "ata-driver.h"
28#include "hwcompat.h"
29
30#define ATA_CONTROL1 ((volatile unsigned char*)0x06200206)
31#define ATA_CONTROL2 ((volatile unsigned char*)0x06200306)
32
33volatile unsigned char* ata_control;
34
35void ata_reset(void)
36{
37 /* state HRR0 */
38 and_b(~0x02, &PADRH); /* assert _RESET */
39 sleep(1); /* > 25us */
40
41 /* state HRR1 */
42 or_b(0x02, &PADRH); /* negate _RESET */
43 sleep(1); /* > 2ms */
44}
45
46void ata_enable(bool on)
47{
48 if(on)
49 and_b(~0x80, &PADRL); /* enable ATA */
50 else
51 or_b(0x80, &PADRL); /* disable ATA */
52
53 or_b(0x80, &PAIORL);
54}
55
56void ata_device_init(void)
57{
58 or_b(0x02, &PAIORH); /* output for ATA reset */
59 or_b(0x02, &PADRH); /* release ATA reset */
60 PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
61
62 if (HW_MASK & ATA_ADDRESS_200)
63 ata_control = ATA_CONTROL1;
64 else
65 ata_control = ATA_CONTROL2;
66}
67
68bool ata_is_coldstart(void)
69{
70 return (PACR2 & 0x4000) != 0;
71}
diff --git a/firmware/target/sh/archos/ata-as-archos.S b/firmware/target/sh/archos/ata-as-archos.S
deleted file mode 100644
index c403c4c921..0000000000
--- a/firmware/target/sh/archos/ata-as-archos.S
+++ /dev/null
@@ -1,233 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004-2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22 .section .icode,"ax",@progbits
23
24 .align 2
25 .global _copy_read_sectors
26 .type _copy_read_sectors,@function
27
28/* Read a number of words from the ATA data port
29 *
30 * Assumes wordcount to be a multiple of 4
31 *
32 * Arguments:
33 * r4 - buffer address
34 * r5 - word count
35 *
36 * Register usage:
37 * r0 - scratch
38 * r1/r2 - read buffers
39 * r3 - mask (if unaligned)
40 * r4 - current address
41 * r5 - end address
42 * r6 - ata port
43 */
44
45_copy_read_sectors:
46 add r5, r5 /* words -> bytes */
47 add r4, r5 /* bytes -> end address */
48 add #-12, r5 /* adjust for offsets */
49 mov.l .ata_data, r6
50
51 mov r4, r0
52 tst #1, r0 /* 16-bit aligned ? */
53 bt .r_aligned /* yes, do word copy */
54
55 /* not 16-bit aligned */
56 mov #-1, r3 /* prepare a bit mask for high byte */
57 shll8 r3 /* r3 = 0xFFFFFF00 */
58
59 mov.w @r6, r2 /* read first word (1st round) */
60 mov.b r2, @r4 /* store low byte of first word */
61 bra .r_start_b /* jump into loop after next instr. */
62 add #-5, r4 /* adjust for dest. offsets; now even */
63
64 .align 2
65.r_loop_b: /* main loop: copy 4 words in a row */
66 mov.w @r6, r2 /* read first word (2+ round) */
67 and r3, r1 /* get high byte of fourth word (2+ round) */
68 extu.b r2, r0 /* get low byte of first word (2+ round) */
69 or r1, r0 /* combine with high byte of fourth word */
70 mov.w r0, @(4, r4) /* store at buf[4] */
71 nop /* maintain alignment */
72.r_start_b:
73 mov.w @r6, r1 /* read second word */
74 and r3, r2 /* get high byte of first word */
75 extu.b r1, r0 /* get low byte of second word */
76 or r2, r0 /* combine with high byte of first word */
77 mov.w r0, @(6, r4) /* store at buf[6] */
78 add #8, r4 /* buf += 8 */
79 mov.w @r6, r2 /* read third word */
80 and r3, r1 /* get high byte of second word */
81 extu.b r2, r0 /* get low byte of third word */
82 or r1, r0 /* combine with high byte of second word */
83 mov.w r0, @r4 /* store at buf[0] */
84 cmp/hi r4, r5 /* check for end */
85 mov.w @r6, r1 /* read fourth word */
86 and r3, r2 /* get high byte of third word */
87 extu.b r1, r0 /* get low byte of fourth word */
88 or r2, r0 /* combine with high byte of third word */
89 mov.w r0, @(2, r4) /* store at buf[2] */
90 bt .r_loop_b
91 /* 24 instructions for 4 copies, takes 30 clock cycles (4 wait) */
92 /* avg. 7.5 cycles per word */
93
94 swap.b r1, r0 /* get high byte of last word */
95 rts
96 mov.b r0, @(4, r4) /* and store it */
97
98 /* 16-bit aligned, loop(read and store word) */
99.r_aligned:
100 mov.w @r6, r2 /* read first word (1st round) */
101 bra .r_start_w /* jump into loop after next instr. */
102 add #-6, r4 /* adjust for destination offsets */
103
104 .align 2
105.r_loop_w: /* main loop: copy 4 words in a row */
106 mov.w @r6, r2 /* read first word (2+ round) */
107 swap.b r1, r0 /* swap fourth word (2+ round) */
108 mov.w r0, @(4, r4) /* store fourth word (2+ round) */
109 nop /* maintain alignment */
110.r_start_w:
111 mov.w @r6, r1 /* read second word */
112 swap.b r2, r0 /* swap first word */
113 mov.w r0, @(6, r4) /* store first word in buf[6] */
114 add #8, r4 /* buf += 8 */
115 mov.w @r6, r2 /* read third word */
116 swap.b r1, r0 /* swap second word */
117 mov.w r0, @r4 /* store second word in buf[0] */
118 cmp/hi r4, r5 /* check for end */
119 mov.w @r6, r1 /* read fourth word */
120 swap.b r2, r0 /* swap third word */
121 mov.w r0, @(2, r4) /* store third word */
122 bt .r_loop_w
123 /* 16 instructions for 4 copies, takes 22 clock cycles (4 wait) */
124 /* avg. 5.5 cycles per word */
125
126 swap.b r1, r0 /* swap fourth word (last round) */
127 rts
128 mov.w r0, @(4, r4) /* and store it */
129
130.r_end:
131 .size _copy_read_sectors,.r_end-_copy_read_sectors
132
133 .align 2
134 .global _copy_write_sectors
135 .type _copy_write_sectors,@function
136
137/* Write a number of words to the ATA data port
138 *
139 * Assumes wordcount to be a multiple of 2.
140 * Writing is not unrolled as much as reading, for several reasons:
141 *
142 * - a similar instruction sequence is faster for writing than for reading
143 * because the auto-incrementing load instructions can be used
144 * - writing profits from warp mode
145 *
146 * Both of these add up to have writing faster than the more unrolled reading.
147 *
148 * Arguments:
149 * r4 - buffer address
150 * r5 - word count
151 *
152 * Register usage:
153 * r0/r1 - scratch
154 * r2/r3 - write buffers
155 * r4 - current address
156 * r5 - end address
157 * r6 - mask (if unaligned)
158 * r7 - ata port
159 */
160
161_copy_write_sectors:
162 add r5, r5 /* words -> bytes */
163 add r4, r5 /* bytes -> end address */
164 add #-4, r5 /* adjust for offsets */
165 mov.l .ata_data, r7
166
167 mov r4, r0
168 tst #1, r0 /* 16-bit aligned ? */
169 bt .w_aligned /* yes, do word copy */
170
171 /* not 16-bit aligned */
172 mov #-1, r6 /* prepare a bit mask for high byte */
173 shll8 r6 /* r6 = 0xFFFFFF00 */
174
175 mov.b @r4+, r2 /* load (initial old second) first byte */
176 mov.w @r4+, r3 /* load (initial) first word */
177 bra .w_start_b
178 extu.b r2, r0 /* extend unsigned */
179
180 .align 2
181.w_loop_b: /* main loop: copy 2 words in a row */
182 mov.w @r4+, r3 /* load first word (2+ round) */
183 extu.b r2, r0 /* put away low byte of second word (2+ round) */
184 and r6, r2 /* get high byte of second word (2+ round) */
185 or r1, r2 /* combine with low byte of old first word */
186 mov.w r2, @r7 /* write that */
187.w_start_b:
188 cmp/hi r4, r5 /* check for end */
189 mov.w @r4+, r2 /* load second word */
190 extu.b r3, r1 /* put away low byte of first word */
191 and r6, r3 /* get high byte of first word */
192 or r0, r3 /* combine with high byte of old second word */
193 mov.w r3, @r7 /* write that */
194 bt .w_loop_b
195 /* 12 instructions for 2 copies, takes 14 clock cycles */
196 /* avg. 7 cycles per word */
197
198 /* the loop "overreads" 1 byte past the buffer end, however, the last */
199 /* byte is not written to disk */
200 and r6, r2 /* get high byte of last word */
201 or r1, r2 /* combine with low byte of old first word */
202 rts
203 mov.w r2, @r7 /* write last word */
204
205 /* 16-bit aligned, loop(load and write word) */
206.w_aligned:
207 bra .w_start_w /* jump into loop after next instr. */
208 mov.w @r4+, r2 /* load first word (1st round) */
209
210 .align 2
211.w_loop_w: /* main loop: copy 2 words in a row */
212 mov.w @r4+, r2 /* load first word (2+ round) */
213 swap.b r1, r0 /* swap second word (2+ round) */
214 mov.w r0, @r7 /* write second word (2+ round) */
215.w_start_w:
216 cmp/hi r4, r5 /* check for end */
217 mov.w @r4+, r1 /* load second word */
218 swap.b r2, r0 /* swap first word */
219 mov.w r0, @r7 /* write first word */
220 bt .w_loop_w
221 /* 8 instructions for 2 copies, takes 10 clock cycles */
222 /* avg. 5 cycles per word */
223
224 swap.b r1, r0 /* swap second word (last round) */
225 rts
226 mov.w r0, @r7 /* and write it */
227
228.w_end:
229 .size _copy_write_sectors,.w_end-_copy_write_sectors
230
231 .align 2
232.ata_data:
233 .long 0x06104100 /* ATA data port */
diff --git a/firmware/target/sh/archos/ata-target.h b/firmware/target/sh/archos/ata-target.h
deleted file mode 100644
index dc55cdd5d5..0000000000
--- a/firmware/target/sh/archos/ata-target.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef ATA_TARGET_H
22#define ATA_TARGET_H
23
24/* asm optimised read & write loops */
25#define ATA_OPTIMIZED_READING
26#define ATA_OPTIMIZED_WRITING
27
28#define ATA_SWAP_WORDS
29
30#define ATA_IOBASE 0x06100100
31#define ATA_DATA (*((volatile unsigned short*)0x06104100))
32#define ATA_CONTROL (*ata_control)
33
34#define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1))
35#define ATA_NSECTOR (*((volatile unsigned char*)ATA_IOBASE + 2))
36#define ATA_SECTOR (*((volatile unsigned char*)ATA_IOBASE + 3))
37#define ATA_LCYL (*((volatile unsigned char*)ATA_IOBASE + 4))
38#define ATA_HCYL (*((volatile unsigned char*)ATA_IOBASE + 5))
39#define ATA_SELECT (*((volatile unsigned char*)ATA_IOBASE + 6))
40#define ATA_COMMAND (*((volatile unsigned char*)ATA_IOBASE + 7))
41
42extern volatile unsigned char* ata_control;
43
44
45#endif
diff --git a/firmware/target/sh/archos/audio-archos.c b/firmware/target/sh/archos/audio-archos.c
deleted file mode 100644
index 2c2579bec5..0000000000
--- a/firmware/target/sh/archos/audio-archos.c
+++ /dev/null
@@ -1,543 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Code that has been in mpeg.c before, now creating an encapsulated play
11 * data module, to be used by other sources than file playback as well.
12 *
13 * Copyright (C) 2004 by Linus Nielsen Feltzing
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 *
20 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
21 * KIND, either express or implied.
22 *
23 ****************************************************************************/
24#include <stdbool.h>
25#include "config.h"
26#include "debug.h"
27#include "panic.h"
28#include <kernel.h>
29#include "mp3_playback.h"
30#include "sound.h"
31#include "i2c.h"
32#include "system.h"
33#include "audiohw.h"
34
35/* hacking into mpeg.c, recording is still there */
36#if CONFIG_CODEC == MAS3587F
37enum
38{
39 MPEG_DECODER,
40 MPEG_ENCODER
41} mpeg_mode;
42#endif /* #ifdef MAS3587F */
43
44#if ((CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)) && !defined(SIMULATOR)
45extern unsigned long shadow_io_control_main;
46extern unsigned shadow_codec_reg0;
47#endif
48
49/**** globals ****/
50
51/* own version, independent of mpeg.c */
52static bool paused; /* playback is paused */
53static bool playing; /* We are playing an MP3 stream */
54
55/* the registered callback function to ask for more mp3 data */
56static mp3_play_callback_t callback_for_more;
57
58/* list of tracks in memory */
59#define MAX_ID3_TAGS (1<<4) /* Must be power of 2 */
60#define MAX_ID3_TAGS_MASK (MAX_ID3_TAGS - 1)
61
62bool audio_is_initialized = false;
63
64/* FIX: this code pretty much assumes a MAS */
65
66/* dirty calls to mpeg.c */
67extern void playback_tick(void);
68extern void rec_tick(void);
69
70unsigned long mas_version_code;
71
72#if CONFIG_CODEC == MAS3507D
73static void mas_poll_start(void)
74{
75 unsigned int count;
76
77 count = 9 * FREQ / 10000 / 8; /* 0.9 ms */
78
79 /* We are using timer 1 */
80
81 TSTR &= ~0x02; /* Stop the timer */
82 TSNC &= ~0x02; /* No synchronization */
83 TMDR &= ~0x02; /* Operate normally */
84
85 TCNT1 = 0; /* Start counting at 0 */
86 GRA1 = count;
87 TCR1 = 0x23; /* Clear at GRA match, sysclock/8 */
88
89 /* Enable interrupt on level 5 */
90 IPRC = (IPRC & ~0x000f) | 0x0005;
91
92 TSR1 &= ~0x02;
93 TIER1 = 0xf9; /* Enable GRA match interrupt */
94
95 TSTR |= 0x02; /* Start timer 1 */
96}
97#elif CONFIG_CODEC != SWCODEC
98static void postpone_dma_tick(void)
99{
100 unsigned int count;
101
102 count = 8 * FREQ / 10000 / 8; /* 0.8 ms */
103
104 /* We are using timer 1 */
105
106 TSTR &= ~0x02; /* Stop the timer */
107 TSNC &= ~0x02; /* No synchronization */
108 TMDR &= ~0x02; /* Operate normally */
109
110 TCNT1 = 0; /* Start counting at 0 */
111 GRA1 = count;
112 TCR1 = 0x23; /* Clear at GRA match, sysclock/8 */
113
114 /* Enable interrupt on level 5 */
115 IPRC = (IPRC & ~0x000f) | 0x0005;
116
117 TSR1 &= ~0x02;
118 TIER1 = 0xf9; /* Enable GRA match interrupt */
119
120 TSTR |= 0x02; /* Start timer 1 */
121}
122#endif
123
124#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
125void demand_irq_enable(bool on)
126{
127 int oldlevel = disable_irq_save();
128
129 if(on)
130 {
131 IPRA = (IPRA & 0xfff0) | 0x000b;
132 ICR &= ~0x0010; /* IRQ3 level sensitive */
133 }
134 else
135 IPRA &= 0xfff0;
136
137 restore_irq(oldlevel);
138}
139#endif /* #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
140
141
142static void play_tick(void)
143{
144 if(playing && !paused)
145 {
146 /* Start DMA if it is disabled and the DEMAND pin is high */
147 if(!(SCR0 & 0x80) && (PBDR & 0x4000))
148 {
149 SCR0 |= 0x80;
150 }
151
152 playback_tick(); /* dirty call to mpeg.c */
153 }
154}
155
156void DEI3(void) __attribute__((interrupt_handler));
157void DEI3(void)
158{
159 const void* start;
160 size_t size = 0;
161
162 if (callback_for_more != NULL)
163 {
164 callback_for_more(&start, &size);
165 }
166
167 if (size > 0)
168 {
169 DTCR3 = size & 0xffff;
170 SAR3 = (unsigned int) start;
171 }
172 else
173 {
174 CHCR3 &= ~0x0001; /* Disable the DMA interrupt */
175 }
176
177 CHCR3 &= ~0x0002; /* Clear DMA interrupt */
178}
179
180void IMIA1(void) __attribute__((interrupt_handler));
181void IMIA1(void) /* Timer 1 interrupt */
182{
183 if(playing)
184 play_tick();
185 TSR1 &= ~0x01;
186#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
187 /* Disable interrupt */
188 IPRC &= ~0x000f;
189#endif
190}
191
192void IRQ6(void) __attribute__((interrupt_handler));
193void IRQ6(void) /* PB14: MAS stop demand IRQ */
194{
195 SCR0 &= ~0x80;
196}
197
198#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
199void IRQ3(void) __attribute__((interrupt_handler));
200void IRQ3(void) /* PA15: MAS demand IRQ */
201{
202 /* Begin with setting the IRQ to edge sensitive */
203 ICR |= 0x0010;
204
205#if CONFIG_CODEC == MAS3587F
206 if(mpeg_mode == MPEG_ENCODER)
207 rec_tick();
208 else
209#endif
210 postpone_dma_tick();
211
212 /* Workaround for sh-elf-gcc 3.3.x bug with -O2 or -Os and ISRs
213 * (invalid cross-jump optimisation) */
214 asm volatile ("");
215}
216#endif /* #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
217
218static void setup_sci0(void)
219{
220 /* PB15 is I/O, PB14 is IRQ6, PB12 is SCK0, PB9 is TxD0 */
221 PBCR1 = (PBCR1 & 0x0cff) | 0x1208;
222
223 /* Set PB12 to output */
224 or_b(0x10, &PBIORH);
225
226 /* Disable serial port */
227 SCR0 = 0x00;
228
229 /* Synchronous, no prescale */
230 SMR0 = 0x80;
231
232 /* Set baudrate 1Mbit/s */
233 BRR0 = 0x02;
234
235 /* use SCK as serial clock output */
236 SCR0 = 0x01;
237
238 /* Clear FER and PER */
239 SSR0 &= 0xe7;
240
241 /* Set interrupt ITU2 and SCI0 priority to 0 */
242 IPRD &= 0x0ff0;
243
244 /* set PB15 and PB14 to inputs */
245 and_b(~0x80, &PBIORH);
246 and_b(~0x40, &PBIORH);
247
248 /* Enable End of DMA interrupt at prio 8 */
249 IPRC = (IPRC & 0xf0ff) | 0x0800;
250
251 /* Enable Tx (only!) */
252 SCR0 |= 0x20;
253}
254
255#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
256static void init_playback(void)
257{
258 unsigned long val;
259 int rc;
260
261 mp3_play_pause(false);
262
263 mas_reset();
264
265 /* Enable the audio CODEC and the DSP core, max analog voltage range */
266 rc = mas_direct_config_write(MAS_CONTROL, 0x8c00);
267 if(rc < 0)
268 panicf("mas_ctrl_w: %d", rc);
269
270 /* Stop the current application */
271 val = 0;
272 mas_writemem(MAS_BANK_D0, MAS_D0_APP_SELECT, &val, 1);
273 do
274 {
275 mas_readmem(MAS_BANK_D0, MAS_D0_APP_RUNNING, &val, 1);
276 } while(val);
277
278 /* Enable the D/A Converter */
279 shadow_codec_reg0 = 0x0001;
280 mas_codec_writereg(0x0, shadow_codec_reg0);
281
282 /* ADC scale 0%, DSP scale 100% */
283 mas_codec_writereg(6, 0x0000);
284 mas_codec_writereg(7, 0x4000);
285
286#ifdef HAVE_SPDIF_OUT
287 val = 0x09; /* Disable SDO and SDI, low impedance S/PDIF outputs */
288#else
289 val = 0x2d; /* Disable SDO and SDI, disable S/PDIF output */
290#endif
291 mas_writemem(MAS_BANK_D0, MAS_D0_INTERFACE_CONTROL, &val, 1);
292
293 /* Set Demand mode and validate all settings */
294 shadow_io_control_main = 0x25;
295 mas_writemem(MAS_BANK_D0, MAS_D0_IO_CONTROL_MAIN, &shadow_io_control_main, 1);
296
297 /* Start the Layer2/3 decoder applications */
298 val = 0x0c;
299 mas_writemem(MAS_BANK_D0, MAS_D0_APP_SELECT, &val, 1);
300 do
301 {
302 mas_readmem(MAS_BANK_D0, MAS_D0_APP_RUNNING, &val, 1);
303 } while((val & 0x0c) != 0x0c);
304
305#if CONFIG_CODEC == MAS3587F
306 mpeg_mode = MPEG_DECODER;
307#endif
308
309 /* set IRQ6 to edge detect */
310 ICR |= 0x02;
311
312 /* set IRQ6 prio 8 */
313 IPRB = ( IPRB & 0xff0f ) | 0x0080;
314
315 DEBUGF("MAS Decoding application started\n");
316}
317#endif /* #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) */
318
319void mp3_init(int volume, int bass, int treble, int balance, int loudness,
320 int avc, int channel_config, int stereo_width,
321 int mdb_strength, int mdb_harmonics,
322 int mdb_center, int mdb_shape, bool mdb_enable,
323 bool superbass)
324{
325#if CONFIG_CODEC == MAS3507D
326 unsigned long val;
327 (void)loudness;
328 (void)avc;
329 (void)mdb_strength;
330 (void)mdb_harmonics;
331 (void)mdb_center;
332 (void)mdb_shape;
333 (void)mdb_enable;
334 (void)superbass;
335#endif
336
337 setup_sci0();
338
339#ifdef HAVE_MAS_SIBI_CONTROL
340 and_b(~0x01, &PBDRH); /* drive SIBI low */
341 or_b(0x01, &PBIORH); /* output for PB8 */
342#endif
343
344#if CONFIG_CODEC == MAS3507D
345 mas_reset();
346#elif CONFIG_CODEC == MAS3587F
347 or_b(0x08, &PAIORH); /* output for /PR */
348 init_playback();
349
350 mas_version_code = mas_readver();
351 DEBUGF("MAS3587 derivate %d, version %c%d\n",
352 (mas_version_code & 0xf000) >> 12,
353 'A' + ((mas_version_code & 0x0f00) >> 8), mas_version_code & 0xff);
354#elif CONFIG_CODEC == MAS3539F
355 or_b(0x08, &PAIORH); /* output for /PR */
356 init_playback();
357
358 mas_version_code = mas_readver();
359 DEBUGF("MAS3539 derivate %d, version %c%d\n",
360 (mas_version_code & 0xf000) >> 12,
361 'A' + ((mas_version_code & 0x0f00) >> 8), mas_version_code & 0xff);
362#endif
363
364#ifdef HAVE_DAC3550A
365 dac_init();
366#endif
367
368#if CONFIG_CODEC == MAS3507D
369 /* set IRQ6 to edge detect */
370 ICR |= 0x02;
371
372 /* set IRQ6 prio 8 */
373 IPRB = ( IPRB & 0xff0f ) | 0x0080;
374
375 mas_readmem(MAS_BANK_D1, 0xff7, &mas_version_code, 1);
376
377 mas_writereg(0x3b, 0x20); /* Don't ask why. The data sheet doesn't say */
378 mas_run(1);
379 sleep(HZ);
380
381 /* Clear the upper 12 bits of the 32-bit samples */
382 mas_writereg(0xc5, 0);
383 mas_writereg(0xc6, 0);
384
385 /* We need to set the PLL for a 14.31818MHz crystal */
386 if(mas_version_code == 0x0601) /* Version F10? */
387 {
388 val = 0x5d9d0;
389 mas_writemem(MAS_BANK_D0, 0x32d, &val, 1);
390 val = 0xfffceceb;
391 mas_writemem(MAS_BANK_D0, 0x32e, &val, 1);
392 val = 0x0;
393 mas_writemem(MAS_BANK_D0, 0x32f, &val, 1);
394 mas_run(0x475);
395 }
396 else
397 {
398 val = 0x5d9d0;
399 mas_writemem(MAS_BANK_D0, 0x36d, &val, 1);
400 val = 0xfffceceb;
401 mas_writemem(MAS_BANK_D0, 0x36e, &val, 1);
402 val = 0x0;
403 mas_writemem(MAS_BANK_D0, 0x36f, &val, 1);
404 mas_run(0xfcb);
405 }
406
407#endif
408
409#if CONFIG_CODEC == MAS3507D
410 mas_poll_start();
411
412 mas_writereg(MAS_REG_KPRESCALE, 0xe9400);
413 dac_enable(true);
414#endif
415
416#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
417 ICR &= ~0x0010; /* IRQ3 level sensitive */
418 PACR1 = (PACR1 & 0x3fff) | 0x4000; /* PA15 is IRQ3 */
419#endif
420
421 /* Must be done before calling sound_set() */
422 audio_is_initialized = true;
423
424 sound_set(SOUND_BASS, bass);
425 sound_set(SOUND_TREBLE, treble);
426 sound_set(SOUND_BALANCE, balance);
427 sound_set(SOUND_VOLUME, volume);
428 sound_set(SOUND_CHANNELS, channel_config);
429 sound_set(SOUND_STEREO_WIDTH, stereo_width);
430
431#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
432 sound_set(SOUND_LOUDNESS, loudness);
433 sound_set(SOUND_AVC, avc);
434 sound_set(SOUND_MDB_STRENGTH, mdb_strength);
435 sound_set(SOUND_MDB_HARMONICS, mdb_harmonics);
436 sound_set(SOUND_MDB_CENTER, mdb_center);
437 sound_set(SOUND_MDB_SHAPE, mdb_shape);
438 sound_set(SOUND_MDB_ENABLE, mdb_enable);
439 sound_set(SOUND_SUPERBASS, superbass);
440#endif
441
442 playing = false;
443 paused = true;
444}
445
446void mp3_shutdown(void)
447{
448#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
449 unsigned long val = 1;
450 mas_writemem(MAS_BANK_D0, MAS_D0_SOFT_MUTE, &val, 1); /* Mute */
451#endif
452
453#if CONFIG_CODEC == MAS3507D
454 dac_volume(0, 0, false);
455#endif
456}
457
458/* new functions, to be exported to plugin API */
459
460#if CONFIG_CODEC == MAS3587F
461void mp3_play_init(void)
462{
463#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
464 init_playback();
465#endif
466 playing = false;
467 paused = true;
468 callback_for_more = NULL;
469}
470#endif
471
472void mp3_play_data(const void* start, size_t size,
473 mp3_play_callback_t get_more)
474{
475 /* init DMA */
476 DAR3 = 0x5FFFEC3;
477 CHCR3 &= ~0x0002; /* Clear interrupt */
478 CHCR3 = 0x1504; /* Single address destination, TXI0, IE=1 */
479 DMAOR = 0x0001; /* Enable DMA */
480
481 callback_for_more = get_more;
482
483 SAR3 = (unsigned int)start;
484 DTCR3 = size & 0xffff;
485
486 playing = true;
487 paused = true;
488
489 CHCR3 |= 0x0001; /* Enable DMA IRQ */
490
491#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
492 demand_irq_enable(true);
493#endif
494}
495
496void mp3_play_pause(bool play)
497{
498 if (paused && play)
499 { /* resume playback */
500 SCR0 |= 0x80;
501 paused = false;
502 }
503 else if (!paused && !play)
504 { /* stop playback */
505 SCR0 &= 0x7f;
506 paused = true;
507 }
508}
509
510bool mp3_pause_done(void)
511{
512 unsigned long frame_count;
513
514 if (!paused)
515 return false;
516
517 mas_readmem(MAS_BANK_D0, MAS_D0_MPEG_FRAME_COUNT, &frame_count, 1);
518 /* This works because the frame counter never wraps,
519 * i.e. zero always means lost sync. */
520 return frame_count == 0;
521}
522
523void mp3_play_stop(void)
524{
525 playing = false;
526 mp3_play_pause(false);
527 CHCR3 &= ~0x0001; /* Disable the DMA interrupt */
528#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
529 demand_irq_enable(false);
530#endif
531}
532
533bool mp3_is_playing(void)
534{
535 return playing;
536}
537
538
539/* returns the next byte position which would be transferred */
540unsigned char* mp3_get_pos(void)
541{
542 return (unsigned char*)SAR3;
543}
diff --git a/firmware/target/sh/archos/boot.lds b/firmware/target/sh/archos/boot.lds
deleted file mode 100644
index b3c2c90a6c..0000000000
--- a/firmware/target/sh/archos/boot.lds
+++ /dev/null
@@ -1,81 +0,0 @@
1#include "config.h"
2
3ENTRY(start)
4OUTPUT_FORMAT(elf32-sh)
5STARTUP(target/sh/crt0.o)
6
7#define DRAMSIZE (MEMORYSIZE * 0x100000)
8
9#define DRAMORIG 0x09000000
10#define IRAMORIG 0x0f000000
11#define IRAMSIZE 0x1000
12#define FLASHORIG 0x02000000 + ROM_START
13#define FLASHSIZE 256K - ROM_START
14
15MEMORY
16{
17 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
18 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
19 FLASH : ORIGIN = FLASHORIG, LENGTH = FLASHSIZE
20}
21
22SECTIONS
23{
24 .vectors :
25 {
26 _datacopy = .;
27 } > FLASH
28
29 .data : AT ( _datacopy )
30 {
31 _datastart = .;
32 KEEP(*(.resetvectors));
33 *(.resetvectors);
34 KEEP(*(.vectors));
35 *(.vectors);
36 . = ALIGN(0x200);
37 *(.icode)
38 *(.irodata)
39 *(.idata)
40 *(.data*)
41 . = ALIGN(0x4);
42 _dataend = .;
43 . = ALIGN(0x10); /* Maintain proper alignment for .text section */
44 } > IRAM
45
46 /* TRICK ALERT! Newer versions of the linker don't allow output sections
47 to overlap even if one of them is empty, so advance the location pointer
48 "by hand" */
49 .text LOADADDR(.data) + SIZEOF(.data) :
50 {
51 *(.init.text)
52 *(.text*)
53 . = ALIGN(0x4);
54 } > FLASH
55
56 .rodata :
57 {
58 *(.rodata*)
59 . = ALIGN(0x4);
60 _iramcopy = .;
61 } > FLASH
62
63 .stack :
64 {
65 *(.stack)
66 _stackbegin = .;
67 stackbegin = .;
68 . += 0x2000;
69 _stackend = .;
70 stackend = .;
71 } > IRAM
72
73 .bss :
74 {
75 _edata = .;
76 *(.ibss)
77 *(.bss*)
78 *(COMMON)
79 _end = .;
80 } > IRAM
81}
diff --git a/firmware/target/sh/archos/descramble.S b/firmware/target/sh/archos/descramble.S
deleted file mode 100644
index 0ab5e93dce..0000000000
--- a/firmware/target/sh/archos/descramble.S
+++ /dev/null
@@ -1,121 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22 .section .icode,"ax",@progbits
23
24 .align 2 /* this aligns to 2^2=4 byte bounday */
25 .global _descramble
26 .type _descramble,@function
27
28/* Descramble a block of byte data, from source to dest, processing len
29 * bytes. Size only limited by the len argument. Note that len must
30 * be an even multiple of 4 (something rolo_load() already assumes.
31 * (Does the Archos firmware loader also require that?).
32 *
33 * Returns the 16-bit "sum" checksum of the descrambled data.
34 *
35 * Arguments:
36 * r4 - source (unsigned char*)
37 * r5 - dest (unsigned char*)
38 * r6 - len (unsigned int)
39 *
40 * Register usage:
41 * r0 - data
42 * r1 - temp
43 * r2 - checksum
44 * r3 - current src address
45 * r4 - source
46 * r5 - dest
47 * r6 - len -> source_end
48 * r7 - dest_end
49 * r8 - len / 4
50 */
51
52_descramble:
53 mov.l r8,@-r15
54 mov r6,r8
55 shlr2 r8 /* r8 = len / 4 */
56 mov r5,r7
57 add r6,r7 /* dest_end = dest + len */
58 add r4,r6 /* source_end = source + len */
59 mov r4,r3 /* addr = source */
60 mov #0,r2 /* checksum = 0 */
61
62.loop:
63 mov.b @r3,r0 /* data = *addr */
64 add r8,r3 /* addr += len / 4 */
65 extu.b r0,r0 /* zero extend data byte */
66 swap.b r0,r1 /* byte swap low word to temp */
67 or r1,r0 /* r0's two lower bytes now identical */
68 shlr r0 /* -> this equals "rotr.b r0" now */
69 not r0,r0 /* negate */
70 extu.b r0,r0 /* zero extend low byte (only needed for sum) */
71 mov.b r0,@r5 /* *dest = data */
72 add r0,r2 /* checksum += data */
73 add #1,r5 /* dest++ */
74 cmp/hi r3,r6 /* addr < source_end ? */
75 bt .loop
76
77 add #1,r4 /* source++ */
78 mov r4,r3 /* addr = source */
79 cmp/hi r5,r7 /* dest < dest_end */
80 bt .loop
81
82/* 15 clock cycles if no reset of source address, 19 if reset,
83 * avg. 16 cycles per byte. Magnus' Version needed 17-22 cycles per byte
84 */
85
86 mov.l @r15+,r8
87 rts
88 extu.w r2,r0
89
90
91/* Move len bytes from source to dest (which must be suitably aligned for
92 * long moves) and jump to dest + 0x200.
93 *
94 * Arguments:
95 * r4 - source
96 * r5 - dest
97 * r6 - len
98 */
99
100 .align 2
101 .global _rolo_restart
102 .type _rolo_restart,@function
103
104_rolo_restart:
105 mov r5,r0
106 sub r4,r0 /* r0 = dest - source */
107 add #-4,r0 /* adjust for early increment */
108 add r4,r6 /* r6 = source + len */
109
110.copy: /* loop takes 6 cycles per longword */
111 mov.l @r4+,r1
112 cmp/hi r4,r6
113 mov.l r1,@(r0,r4)
114 bt .copy
115
116 mov.l @r5+,r0 /* start address from image */
117 jmp @r0
118 mov.l @r5+,r15 /* stack pointer from image */
119
120.end:
121 .size _descramble,.end-_descramble
diff --git a/firmware/target/sh/archos/fm_v2/adc-target.h b/firmware/target/sh/archos/fm_v2/adc-target.h
deleted file mode 100644
index 0070828cf3..0000000000
--- a/firmware/target/sh/archos/fm_v2/adc-target.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_
23
24#define NUM_ADC_CHANNELS 8
25
26#define ADC_BATTERY 0 /* Battery voltage always reads 0x3FF due to
27 silly scaling */
28#define ADC_CHARGE_REGULATOR 0 /* Uh, we read the battery voltage? */
29#define ADC_USB_POWER 1 /* USB, reads 0x000 when USB is inserted */
30#define ADC_BUTTON_OFF 2 /* the off button, high value if pressed */
31#define ADC_BUTTON_ON 3 /* the on button, low value if pressed */
32#define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different
33 voltages for different keys */
34#define ADC_BUTTON_ROW2 5 /* Used for scanning the keys, different
35 voltages for different keys */
36#define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */
37#define ADC_EXT_POWER 7 /* The external power voltage, 0v or 2.7v */
38
39#define EXT_SCALE_FACTOR 14800
40
41#endif /* _ADC_TARGET_H_ */
diff --git a/firmware/target/sh/archos/fm_v2/backlight-target.h b/firmware/target/sh/archos/fm_v2/backlight-target.h
deleted file mode 100644
index c3dd395eca..0000000000
--- a/firmware/target/sh/archos/fm_v2/backlight-target.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24#include "config.h"
25#include "rtc.h"
26
27#define backlight_hw_init() true
28
29static inline void backlight_hw_on(void)
30{
31 rtc_write(0x13, 0x10); /* 32 kHz square wave */
32 rtc_write(0x0a, rtc_read(0x0a) | 0x40); /* Enable square wave */
33}
34
35static inline void backlight_hw_off(void)
36{
37 /* While on, backlight is flashing at 32 kHz. If the square wave output
38 is disabled while the backlight is lit, it will become constantly lit,
39 (brighter) and slowly fade. This resets the square wave counter and
40 results in the unlit state */
41 unsigned char rtc_0a = rtc_read(0x0a) & ~0x40;
42 rtc_write(0x0a, rtc_0a); /* Disable square wave */
43 rtc_write(0x13, 0xF0); /* 1 Hz square wave */
44 rtc_write(0x0a, rtc_0a | 0x40); /* Enable square wave */
45
46 /* When the square wave output is disabled in the unlit state,
47 the backlight stays off */
48 rtc_write(0x0a, rtc_0a);
49}
50
51#endif
diff --git a/firmware/target/sh/archos/fm_v2/button-fm_v2.c b/firmware/target/sh/archos/fm_v2/button-fm_v2.c
deleted file mode 100644
index 458917d2d5..0000000000
--- a/firmware/target/sh/archos/fm_v2/button-fm_v2.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "system.h"
24#include "button.h"
25#include "backlight.h"
26#include "adc.h"
27
28/*
29 Recorder FM/V2 hardware button hookup
30 =====================================
31
32 F1, F2, F3, UP: connected to AN4 through a resistor network
33 DOWN, PLAY, LEFT, RIGHT: likewise connected to AN5
34
35 The voltage on AN4/ AN5 depends on which keys (or key combo) is pressed
36 FM/V2 has PLAY and RIGHT switched compared to plain recorder
37
38 ON: AN3, low active
39 OFF: AN2, high active
40*/
41
42void button_init_device(void)
43{
44 /* Set PB4 and PB8 as input pins */
45 PBCR1 &= 0xfffc; /* PB8MD = 00 */
46 PBCR2 &= 0xfcff; /* PB4MD = 00 */
47 PBIOR &= ~0x0110; /* Inputs */
48}
49
50int button_read_device(void)
51{
52 int btn = BUTTON_NONE;
53 int data;
54
55 /* check F1..F3 and UP */
56 data = adc_read(ADC_BUTTON_ROW1);
57 if (data >= 150)
58 {
59 if (data >= 545)
60 if (data >= 700)
61 btn = BUTTON_F3;
62 else
63 btn = BUTTON_UP;
64 else
65 if (data >= 385)
66 btn = BUTTON_F2;
67 else
68 btn = BUTTON_F1;
69 }
70
71 /* Some units have mushy keypads, so pressing UP also activates
72 the Left/Right buttons. Let's combat that by skipping the AN5
73 checks when UP is pressed. */
74 if(!(btn & BUTTON_UP))
75 {
76 /* check DOWN, PLAY, LEFT, RIGHT */
77 data = adc_read(ADC_BUTTON_ROW2);
78 if (data >= 150)
79 {
80 if (data >= 545)
81 if (data >= 700)
82 btn |= BUTTON_DOWN;
83 else
84 btn |= BUTTON_RIGHT;
85 else
86 if (data >= 385)
87 btn |= BUTTON_LEFT;
88 else
89 btn |= BUTTON_PLAY;
90 }
91 }
92
93 if ( adc_read(ADC_BUTTON_ON) < 512 )
94 btn |= BUTTON_ON;
95 if ( adc_read(ADC_BUTTON_OFF) > 512 )
96 btn |= BUTTON_OFF;
97
98 return btn;
99}
diff --git a/firmware/target/sh/archos/fm_v2/button-target.h b/firmware/target/sh/archos/fm_v2/button-target.h
deleted file mode 100644
index 47eb48c32d..0000000000
--- a/firmware/target/sh/archos/fm_v2/button-target.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _BUTTON_TARGET_H_
23#define _BUTTON_TARGET_H_
24
25 /* Main unit's buttons */
26#define BUTTON_ON 0x00000001
27#define BUTTON_OFF 0x00000002
28
29#define BUTTON_LEFT 0x00000004
30#define BUTTON_RIGHT 0x00000008
31#define BUTTON_UP 0x00000010
32#define BUTTON_DOWN 0x00000020
33
34#define BUTTON_PLAY 0x00000040
35
36#define BUTTON_F1 0x00000080
37#define BUTTON_F2 0x00000100
38#define BUTTON_F3 0x00000200
39
40#define BUTTON_MAIN (BUTTON_ON|BUTTON_OFF|BUTTON_LEFT|BUTTON_RIGHT\
41 |BUTTON_UP|BUTTON_DOWN|BUTTON_PLAY\
42 |BUTTON_F1|BUTTON_F2|BUTTON_F3)
43
44#define POWEROFF_BUTTON BUTTON_OFF
45#define POWEROFF_COUNT 10
46
47#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/sh/archos/fm_v2/power-fm_v2.c b/firmware/target/sh/archos/fm_v2/power-fm_v2.c
deleted file mode 100644
index ce1ef19970..0000000000
--- a/firmware/target/sh/archos/fm_v2/power-fm_v2.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include <stdbool.h>
24#include "adc.h"
25#include "kernel.h"
26#include "system.h"
27#include "power.h"
28#include "usb.h"
29
30#if CONFIG_TUNER
31bool tuner_power(bool status)
32{
33 (void)status;
34 return true;
35}
36
37#endif /* #if CONFIG_TUNER */
38
39void power_init(void)
40{
41 PBCR2 &= ~0x0c00; /* GPIO for PB5 */
42 or_b(0x20, &PBIORL);
43 or_b(0x20, &PBDRL); /* hold power */
44}
45
46unsigned int power_input_status(void)
47{
48 unsigned int status = POWER_INPUT_NONE;
49
50 /* FM or V2 can also charge from the USB port */
51 if (adc_read(ADC_CHARGE_REGULATOR) < 0x1FF)
52 status = POWER_INPUT_MAIN_CHARGER;
53
54#ifdef HAVE_USB_POWER
55 if (usb_detect() == USB_INSERTED)
56 status |= POWER_INPUT_USB_CHARGER;
57#endif
58
59 return status;
60}
61
62/* Returns true if the unit is charging the batteries. */
63bool charging_state(void)
64{
65 /* We use the information from the ADC_EXT_POWER ADC channel, which
66 tells us the charging current from the LTC1734. When DC is
67 connected (either via the external adapter, or via USB), we try
68 to determine if it is actively charging or only maintaining the
69 charge. My tests show that ADC readings below about 0x80 means
70 that the LTC1734 is only maintaining the charge. */
71 return adc_read(ADC_EXT_POWER) >= 0x80;
72}
73
74void ide_power_enable(bool on)
75{
76 bool touched = false;
77
78 if(on)
79 {
80 or_b(0x20, &PADRL);
81 touched = true;
82 }
83#ifdef HAVE_ATA_POWER_OFF
84 if(!on)
85 {
86 and_b(~0x20, &PADRL);
87 touched = true;
88 }
89#endif /* HAVE_ATA_POWER_OFF */
90
91/* late port preparation, else problems with read/modify/write
92 of other bits on same port, while input and floating high */
93 if (touched)
94 {
95 or_b(0x20, &PAIORL); /* PA5 is an output */
96 PACR2 &= 0xFBFF; /* GPIO for PA5 */
97 }
98}
99
100
101bool ide_powered(void)
102{
103 if ((PACR2 & 0x0400) || !(PAIORL & 0x20)) /* not configured for output */
104 return true; /* would be floating high, disk on */
105 else
106 return (PADRL & 0x20) != 0;
107}
108
109void power_off(void)
110{
111 disable_irq();
112 and_b(~0x20, &PBDRL);
113 or_b(0x20, &PBIORL);
114 while(1);
115}
diff --git a/firmware/target/sh/archos/fm_v2/powermgmt-fm_v2.c b/firmware/target/sh/archos/fm_v2/powermgmt-fm_v2.c
deleted file mode 100644
index 5dd7f26d2f..0000000000
--- a/firmware/target/sh/archos/fm_v2/powermgmt-fm_v2.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Heikki Hannikainen, Uwe Freese
11 * Revisions copyright (C) 2005 by Gerald Van Baren
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "adc.h"
25#include "powermgmt.h"
26
27const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
28{
29 2800
30};
31
32const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
33{
34 2580
35};
36
37/* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */
38const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
39{
40 /* measured values */
41 { 2600, 2850, 2950, 3030, 3110, 3200, 3300, 3450, 3600, 3800, 4000 }
42};
43
44/* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */
45const unsigned short percent_to_volt_charge[11] =
46{
47 /* TODO: This is identical to the discharge curve.
48 * Calibrate charging curve using a battery_bench log. */
49 2600, 2850, 2950, 3030, 3110, 3200, 3300, 3450, 3600, 3800, 4000
50};
51
52/* Battery scale factor (guessed, seems to be 1,25 * value from recorder) */
53#define BATTERY_SCALE_FACTOR 8275
54/* full-scale ADC readout (2^10) in millivolt */
55
56/* Returns battery voltage from ADC [millivolts] */
57int _battery_voltage(void)
58{
59 return (adc_read(ADC_UNREG_POWER) * BATTERY_SCALE_FACTOR) >> 10;
60}
diff --git a/firmware/target/sh/archos/fm_v2/usb-fm_v2.c b/firmware/target/sh/archos/fm_v2/usb-fm_v2.c
deleted file mode 100644
index 5b11d778b6..0000000000
--- a/firmware/target/sh/archos/fm_v2/usb-fm_v2.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include <stdbool.h>
23#include "adc.h"
24#include "cpu.h"
25#include "hwcompat.h"
26#include "system.h"
27#include "usb.h"
28
29int usb_detect(void)
30{
31 return (adc_read(ADC_USB_POWER) <= 512) ? USB_INSERTED : USB_EXTRACTED;
32}
33
34void usb_enable(bool on)
35{
36 if(HW_MASK & USB_ACTIVE_HIGH)
37 on = !on;
38
39 if(on)
40 and_b(~0x04, &PADRH); /* enable USB */
41 else
42 or_b(0x04, &PADRH);
43}
44
45void usb_init_device(void)
46{
47 usb_enable(false);
48 or_b(0x04, &PAIORH);
49}
diff --git a/firmware/target/sh/archos/i2c-archos.c b/firmware/target/sh/archos/i2c-archos.c
deleted file mode 100644
index 5b415926f2..0000000000
--- a/firmware/target/sh/archos/i2c-archos.c
+++ /dev/null
@@ -1,254 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "lcd.h"
22#include "cpu.h"
23#include "kernel.h"
24#include "thread.h"
25#include "debug.h"
26#include "system.h"
27#include "i2c.h"
28
29/* cute little functions, atomic read-modify-write */
30
31/* SDA is PB7 */
32#define SDA_LO and_b(~0x80, &PBDRL)
33#define SDA_HI or_b(0x80, &PBDRL)
34#define SDA_INPUT and_b(~0x80, &PBIORL)
35#define SDA_OUTPUT or_b(0x80, &PBIORL)
36#define SDA (PBDRL & 0x80)
37
38#if CONFIG_I2C == I2C_ONDIO
39/* Ondio pinout, SCL moved to PB6 */
40#define SCL_INPUT and_b(~0x40, &PBIORL)
41#define SCL_OUTPUT or_b(0x40, &PBIORL)
42#define SCL_LO and_b(~0x40, &PBDRL)
43#define SCL_HI or_b(0x40, &PBDRL)
44#define SCL (PBDRL & 0x40)
45#else
46/* "classic" pinout, SCL is PB13 */
47#define SCL_INPUT and_b(~0x20, &PBIORH)
48#define SCL_OUTPUT or_b(0x20, &PBIORH)
49#define SCL_LO and_b(~0x20, &PBDRH)
50#define SCL_HI or_b(0x20, &PBDRH)
51#define SCL (PBDRH & 0x20)
52#endif
53
54/* arbitrary delay loop */
55#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
56
57static struct mutex i2c_mtx SHAREDBSS_ATTR;
58
59void i2c_begin(void)
60{
61 mutex_lock(&i2c_mtx);
62}
63
64void i2c_end(void)
65{
66 mutex_unlock(&i2c_mtx);
67}
68
69void i2c_start(void)
70{
71 SDA_OUTPUT;
72 SDA_HI;
73 SCL_HI;
74 SDA_LO;
75 DELAY;
76 SCL_LO;
77}
78
79void i2c_stop(void)
80{
81 SDA_LO;
82 SCL_HI;
83 DELAY;
84 SDA_HI;
85}
86
87void i2c_init(void)
88{
89 int i;
90
91 mutex_init(&i2c_mtx);
92
93#if CONFIG_I2C == I2C_ONDIO
94 /* make PB6 & PB7 general I/O */
95 PBCR2 &= ~0xf000;
96#else /* not Ondio */
97 /* make PB7 & PB13 general I/O */
98 PBCR1 &= ~0x0c00; /* PB13 */
99 PBCR2 &= ~0xc000; /* PB7 */
100#endif
101
102 SCL_OUTPUT;
103 SDA_OUTPUT;
104 SDA_HI;
105 SCL_LO;
106 for (i=0;i<3;i++)
107 i2c_stop();
108}
109
110void i2c_ack(int bit)
111{
112 /* Here's the deal. The MAS is slow, and sometimes needs to wait
113 before it can receive the acknowledge. Therefore it forces the clock
114 low until it is ready. We need to poll the clock line until it goes
115 high before we release the ack. */
116
117 SCL_LO; /* Set the clock low */
118 if ( bit )
119 {
120 SDA_HI;
121 }
122 else
123 {
124 SDA_LO;
125 }
126
127 SCL_INPUT; /* Set the clock to input */
128 while(!SCL) /* and wait for the MAS to release it */
129 sleep(0);
130
131 DELAY;
132 SCL_OUTPUT;
133 SCL_LO;
134}
135
136int i2c_getack(void)
137{
138 int ret = 1;
139
140 /* Here's the deal. The MAS is slow, and sometimes needs to wait
141 before it can send the acknowledge. Therefore it forces the clock
142 low until it is ready. We need to poll the clock line until it goes
143 high before we read the ack. */
144
145#ifdef HAVE_I2C_LOW_FIRST
146 SDA_LO; /* First, discharge the data line */
147#endif
148 SDA_INPUT; /* And set to input */
149 SCL_INPUT; /* Set the clock to input */
150 while(!SCL) /* and wait for the MAS to release it */
151 sleep(0);
152
153 if (SDA)
154 /* ack failed */
155 ret = 0;
156
157 SCL_OUTPUT;
158 SCL_LO;
159 SDA_HI;
160 SDA_OUTPUT;
161 return ret;
162}
163
164void i2c_outb(unsigned char byte)
165{
166 int i;
167
168 /* clock out each bit, MSB first */
169 for ( i=0x80; i; i>>=1 ) {
170 if ( i & byte )
171 {
172 SDA_HI;
173 }
174 else
175 {
176 SDA_LO;
177 }
178 SCL_HI;
179 SCL_LO;
180 }
181
182 SDA_HI;
183}
184
185unsigned char i2c_inb(int ack)
186{
187 int i;
188 unsigned char byte = 0;
189
190 /* clock in each bit, MSB first */
191 for ( i=0x80; i; i>>=1 ) {
192#ifdef HAVE_I2C_LOW_FIRST
193 /* Tricky business. Here we discharge the data line by driving it low
194 and then set it to input to see if it stays low or goes high */
195 SDA_LO; /* First, discharge the data line */
196#endif
197 SDA_INPUT; /* And set to input */
198 SCL_HI;
199 if ( SDA )
200 byte |= i;
201 SCL_LO;
202 SDA_OUTPUT;
203 }
204
205 i2c_ack(ack);
206
207 return byte;
208}
209
210int i2c_write(int address, const unsigned char* buf, int count )
211{
212 int i,x=0;
213
214 i2c_start();
215 i2c_outb(address & 0xfe);
216 if (i2c_getack())
217 {
218 for (i=0; i<count; i++)
219 {
220 i2c_outb(buf[i]);
221 if (!i2c_getack())
222 {
223 x=-2;
224 break;
225 }
226 }
227 }
228 else
229 {
230 debugf("i2c_write() - no ack\n");
231 x=-1;
232 }
233 i2c_stop();
234 return x;
235}
236
237#if 0 /* Currently unused, left for reference and future use */
238int i2c_read(int address, unsigned char* buf, int count )
239{
240 int i,x=0;
241
242 i2c_start();
243 i2c_outb(address | 1);
244 if (i2c_getack()) {
245 for (i=0; i<count; i++) {
246 buf[i] = i2c_inb(0);
247 }
248 }
249 else
250 x=-1;
251 i2c_stop();
252 return x;
253}
254#endif
diff --git a/firmware/target/sh/archos/lcd-archos-bitmap.c b/firmware/target/sh/archos/lcd-archos-bitmap.c
deleted file mode 100644
index f23289053d..0000000000
--- a/firmware/target/sh/archos/lcd-archos-bitmap.c
+++ /dev/null
@@ -1,224 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Alan Korr
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23#include "hwcompat.h"
24#include "kernel.h"
25#include "lcd.h"
26#include "system.h"
27
28/*** definitions ***/
29
30#define LCD_SET_LOWER_COLUMN_ADDRESS ((char)0x00)
31#define LCD_SET_HIGHER_COLUMN_ADDRESS ((char)0x10)
32#define LCD_SET_INTERNAL_REGULATOR_RESISTOR_RATIO ((char)0x20)
33#define LCD_SET_POWER_CONTROL_REGISTER ((char)0x28)
34#define LCD_SET_DISPLAY_START_LINE ((char)0x40)
35#define LCD_SET_CONTRAST_CONTROL_REGISTER ((char)0x81)
36#define LCD_SET_SEGMENT_REMAP ((char)0xA0)
37#define LCD_SET_LCD_BIAS ((char)0xA2)
38#define LCD_SET_ENTIRE_DISPLAY_OFF ((char)0xA4)
39#define LCD_SET_ENTIRE_DISPLAY_ON ((char)0xA5)
40#define LCD_SET_NORMAL_DISPLAY ((char)0xA6)
41#define LCD_SET_REVERSE_DISPLAY ((char)0xA7)
42#define LCD_SET_MULTIPLEX_RATIO ((char)0xA8)
43#define LCD_SET_BIAS_TC_OSC ((char)0xA9)
44#define LCD_SET_1OVER4_BIAS_RATIO ((char)0xAA)
45#define LCD_SET_INDICATOR_OFF ((char)0xAC)
46#define LCD_SET_INDICATOR_ON ((char)0xAD)
47#define LCD_SET_DISPLAY_OFF ((char)0xAE)
48#define LCD_SET_DISPLAY_ON ((char)0xAF)
49#define LCD_SET_PAGE_ADDRESS ((char)0xB0)
50#define LCD_SET_COM_OUTPUT_SCAN_DIRECTION ((char)0xC0)
51#define LCD_SET_TOTAL_FRAME_PHASES ((char)0xD2)
52#define LCD_SET_DISPLAY_OFFSET ((char)0xD3)
53#define LCD_SET_READ_MODIFY_WRITE_MODE ((char)0xE0)
54#define LCD_SOFTWARE_RESET ((char)0xE2)
55#define LCD_NOP ((char)0xE3)
56#define LCD_SET_END_OF_READ_MODIFY_WRITE_MODE ((char)0xEE)
57
58/* LCD command codes */
59#define LCD_CNTL_RESET 0xe2 /* Software reset */
60#define LCD_CNTL_POWER 0x2f /* Power control */
61#define LCD_CNTL_CONTRAST 0x81 /* Contrast */
62#define LCD_CNTL_OUTSCAN 0xc8 /* Output scan direction */
63#define LCD_CNTL_SEGREMAP 0xa1 /* Segment remap */
64#define LCD_CNTL_DISPON 0xaf /* Display on */
65
66#define LCD_CNTL_PAGE 0xb0 /* Page address */
67#define LCD_CNTL_HIGHCOL 0x10 /* Upper column address */
68#define LCD_CNTL_LOWCOL 0x00 /* Lower column address */
69
70/** globals **/
71
72static int xoffset; /* needed for flip */
73
74/*** hardware configuration ***/
75
76int lcd_default_contrast(void)
77{
78 return (HW_MASK & LCD_CONTRAST_BIAS) ? 31 : 49;
79}
80
81void lcd_set_contrast(int val)
82{
83 lcd_write_command(LCD_CNTL_CONTRAST);
84 lcd_write_command(val);
85}
86
87void lcd_set_invert_display(bool yesno)
88{
89 if (yesno)
90 lcd_write_command(LCD_SET_REVERSE_DISPLAY);
91 else
92 lcd_write_command(LCD_SET_NORMAL_DISPLAY);
93}
94
95/* turn the display upside down (call lcd_update() afterwards) */
96void lcd_set_flip(bool yesno)
97{
98#ifdef HAVE_DISPLAY_FLIPPED
99 if (!yesno)
100#else
101 if (yesno)
102#endif
103 {
104 lcd_write_command(LCD_SET_SEGMENT_REMAP);
105 lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION);
106 xoffset = 132 - LCD_WIDTH; /* 132 colums minus the 112 we have */
107 }
108 else
109 {
110 lcd_write_command(LCD_SET_SEGMENT_REMAP | 0x01);
111 lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08);
112 xoffset = 0;
113 }
114}
115
116void lcd_init_device(void)
117{
118 /* Initialize PB0-3 as output pins */
119 PBCR2 &= 0xff00; /* MD = 00 */
120 PBIOR |= 0x000f; /* IOR = 1 */
121
122 /* inits like the original firmware */
123 lcd_write_command(LCD_SOFTWARE_RESET);
124 lcd_write_command(LCD_SET_INTERNAL_REGULATOR_RESISTOR_RATIO + 4);
125 lcd_write_command(LCD_SET_1OVER4_BIAS_RATIO + 0); /* force 1/4 bias: 0 */
126 lcd_write_command(LCD_SET_POWER_CONTROL_REGISTER + 7);
127 /* power control register: op-amp=1, regulator=1, booster=1 */
128 lcd_write_command(LCD_SET_DISPLAY_ON);
129 lcd_write_command(LCD_SET_NORMAL_DISPLAY);
130 lcd_set_flip(false);
131 lcd_write_command(LCD_SET_DISPLAY_START_LINE + 0);
132 lcd_set_contrast(lcd_default_contrast());
133 lcd_write_command(LCD_SET_PAGE_ADDRESS);
134 lcd_write_command(LCD_SET_LOWER_COLUMN_ADDRESS + 0);
135 lcd_write_command(LCD_SET_HIGHER_COLUMN_ADDRESS + 0);
136
137 lcd_clear_display();
138 lcd_update();
139}
140
141/*** Update functions ***/
142
143/* Performance function that works with an external buffer
144 note that by and bheight are in 8-pixel units! */
145void lcd_blit_mono(const unsigned char *data, int x, int by, int width,
146 int bheight, int stride)
147{
148 /* Copy display bitmap to hardware */
149 while (bheight--)
150 {
151 lcd_write_command (LCD_CNTL_PAGE | (by++ & 0xf));
152 lcd_write_command (LCD_CNTL_HIGHCOL | (((x+xoffset)>>4) & 0xf));
153 lcd_write_command (LCD_CNTL_LOWCOL | ((x+xoffset) & 0xf));
154
155 lcd_write_data(data, width);
156 data += stride;
157 }
158}
159
160/* Helper function for lcd_grey_phase_blit(). */
161void lcd_grey_data(unsigned char *values, unsigned char *phases, int count);
162
163/* Performance function that works with an external buffer
164 note that by and bheight are in 8-pixel units! */
165void lcd_blit_grey_phase(unsigned char *values, unsigned char *phases,
166 int x, int by, int width, int bheight, int stride)
167{
168 stride <<= 3; /* 8 pixels per block */
169 while (bheight--)
170 {
171 lcd_write_command (LCD_CNTL_PAGE | (by++ & 0xf));
172 lcd_write_command (LCD_CNTL_HIGHCOL | (((x+xoffset)>>4) & 0xf));
173 lcd_write_command (LCD_CNTL_LOWCOL | ((x+xoffset) & 0xf));
174
175 lcd_grey_data(values, phases, width);
176 values += stride;
177 phases += stride;
178 }
179}
180
181
182/* Update the display.
183 This must be called after all other LCD functions that change the display. */
184void lcd_update(void)
185{
186 int y;
187
188 /* Copy display bitmap to hardware */
189 for (y = 0; y < LCD_FBHEIGHT; y++)
190 {
191 lcd_write_command (LCD_CNTL_PAGE | (y & 0xf));
192 lcd_write_command (LCD_CNTL_HIGHCOL | ((xoffset >> 4) & 0xf));
193 lcd_write_command (LCD_CNTL_LOWCOL | (xoffset & 0xf));
194
195 lcd_write_data (FBADDR(0, y), LCD_WIDTH);
196 }
197}
198
199/* Update a fraction of the display. */
200void lcd_update_rect(int x, int y, int width, int height)
201{
202 int ymax;
203
204 /* The Y coordinates have to work on even 8 pixel rows */
205 ymax = (y + height-1) >> 3;
206 y >>= 3;
207
208 if(x + width > LCD_WIDTH)
209 width = LCD_WIDTH - x;
210 if (width <= 0)
211 return; /* nothing left to do, 0 is harmful to lcd_write_data() */
212 if(ymax >= LCD_FBHEIGHT)
213 ymax = LCD_FBHEIGHT-1;
214
215 /* Copy specified rectange bitmap to hardware */
216 for (; y <= ymax; y++)
217 {
218 lcd_write_command (LCD_CNTL_PAGE | (y & 0xf));
219 lcd_write_command (LCD_CNTL_HIGHCOL | (((x+xoffset) >> 4) & 0xf));
220 lcd_write_command (LCD_CNTL_LOWCOL | ((x+xoffset) & 0xf));
221
222 lcd_write_data (FBADDR(x,y), width);
223 }
224}
diff --git a/firmware/target/sh/archos/lcd-as-archos-bitmap.S b/firmware/target/sh/archos/lcd-as-archos-bitmap.S
deleted file mode 100644
index 0396483737..0000000000
--- a/firmware/target/sh/archos/lcd-as-archos-bitmap.S
+++ /dev/null
@@ -1,354 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 * Based on the work of Alan Korr and Jörg Hohensohn
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "cpu.h"
25
26#define LCDR (PBDR_ADDR+1)
27
28#define LCD_SD 1 /* PB0 = 1 --- 0001 */
29#define LCD_SC 2 /* PB1 = 1 --- 0010 */
30#define LCD_DS 4 /* PB2 = 1 --- 0100 */
31#define LCD_CS 8 /* PB3 = 1 --- 1000 */
32
33/*
34 * About /CS,DS,SC,SD
35 * ------------------
36 *
37 * LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
38 *
39 * - /CS -> Chip Selection line :
40 * 0 : LCD chipset is activated.
41 * - DS -> Data Selection line, latched at the rising edge
42 * of the 8th serial clock (*) :
43 * 0 : instruction register,
44 * 1 : data register;
45 * - SC -> Serial Clock line (SDA).
46 * - SD -> Serial Data line (SCK), latched at the rising edge
47 * of each serial clock (*).
48 *
49 * _ _
50 * /CS \ /
51 * \______________________________________________________/
52 * _____ ____ ____ ____ ____ ____ ____ ____ ____ _____
53 * SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
54 * _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
55 *
56 * _____ _ _ _ _ _ _ _ ________
57 * SC \ * \ * \ * \ * \ * \ * \ * \ *
58 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
59 * _ _________________________________________________________
60 * DS \/
61 * _/\_________________________________________________________
62 *
63 */
64
65 .section .icode,"ax",@progbits
66
67 .align 2
68 .global _lcd_write_command
69 .type _lcd_write_command,@function
70
71/* Write a command byte to the lcd controller
72 *
73 * Arguments:
74 * r4 - data byte (int)
75 *
76 * Register usage:
77 * r0 - scratch
78 * r1 - data byte (copied)
79 * r2 - precalculated port value (CS, DS and SC low, SD high),
80 * negated (neg)!
81 * r3 - lcd port address
82 * r5 - 1 (byte count for reuse of the loop in _lcd_write_data)
83 */
84
85_lcd_write_command:
86 mov.l .lcdr, r3 /* put lcd data port address in r3 */
87 mov r4, r1 /* copy data byte to r1 */
88
89 /* This code will fail if an interrupt changes the contents of PBDRL.
90 * If so, we must disable the interrupt here. */
91
92 mov.b @r3, r0 /* r0 = PBDRL */
93 mov #0, r5 /* fake end address - stop after first iteration */
94 or #(LCD_SD), r0 /* r0 |= LCD_SD */
95 and #(~(LCD_CS|LCD_DS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
96
97 bra .single_transfer /* jump into the transfer loop */
98 neg r0, r2 /* r2 = 0 - r0 */
99
100
101 .align 2
102 .global _lcd_write_data
103 .type _lcd_write_data,@function
104
105/* A high performance function to write data to the display,
106 * one or multiple bytes.
107 *
108 * Arguments:
109 * r4 - data address
110 * r5 - byte count
111 *
112 * Register usage:
113 * r0 - scratch
114 * r1 - current data byte
115 * r2 - precalculated port value (CS and SC low, DS and SD high),
116 * negated (neg)!
117 * r3 - lcd port address
118 */
119
120_lcd_write_data:
121 mov.l .lcdr, r3 /* put lcd data port address in r3 */
122 add r4, r5 /* end address */
123
124 /* This code will fail if an interrupt changes the contents of PBDRL.
125 * If so, we must disable the interrupt here. If disabling interrupts
126 * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on
127 * recorders)is undesirable, the loop has to be rewritten to
128 * disable/precalculate/transfer/enable for each iteration. However,
129 * this would significantly decrease performance. */
130
131 mov.b @r3, r0 /* r0 = PBDRL */
132 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
133 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
134 neg r0, r2 /* r2 = 0 - r0 */
135
136 /* loop exploits that SD is on bit 0 for recorders and Ondios */
137
138 .align 2
139.multi_transfer:
140 mov.b @r4+, r1 /* load data byte from memory */
141 nop
142
143.single_transfer:
144 shll16 r1 /* shift data to most significant byte */
145 shll8 r1
146 not r1, r1 /* and invert for use with negc */
147
148 shll r1 /* shift the MSB into carry */
149 negc r2, r0 /* carry to SD, SC low */
150 shll r1 /* next shift here for alignment */
151 mov.b r0, @r3 /* set data to port */
152 or #(LCD_SC), r0 /* rise SC (independent of SD level) */
153 mov.b r0, @r3 /* set to port */
154
155 negc r2, r0
156 mov.b r0, @r3
157 or #(LCD_SC), r0
158 mov.b r0, @r3
159
160 shll r1
161 negc r2, r0
162 shll r1
163 mov.b r0, @r3
164 or #(LCD_SC), r0
165 mov.b r0, @r3
166
167 negc r2, r0
168 mov.b r0, @r3
169 or #(LCD_SC), r0
170 mov.b r0, @r3
171
172 shll r1
173 negc r2, r0
174 shll r1
175 mov.b r0, @r3
176 or #(LCD_SC), r0
177 mov.b r0, @r3
178
179 negc r2, r0
180 mov.b r0, @r3
181 or #(LCD_SC), r0
182 mov.b r0, @r3
183
184 shll r1
185 negc r2, r0
186 shll r1
187 mov.b r0, @r3
188 or #(LCD_SC), r0
189 mov.b r0, @r3
190
191 negc r2, r0
192 mov.b r0, @r3
193 or #(LCD_SC), r0
194 mov.b r0, @r3
195
196 cmp/hi r4, r5 /* some blocks left? */
197 bt .multi_transfer
198
199 or #(LCD_CS|LCD_DS|LCD_SD|LCD_SC), r0 /* restore port */
200 rts
201 mov.b r0, @r3
202
203 /* This is the place to reenable the interrupts, if we have disabled
204 * them. See above. */
205
206#ifndef BOOTLOADER
207 .align 2
208 .global _lcd_grey_data
209 .type _lcd_grey_data,@function
210
211/* A high performance function to write grey phase data to the display,
212 * one or multiple pixels.
213 *
214 * Arguments:
215 * r4 - pixel value data address
216 * r5 - pixel phase data address
217 * r6 - pixel block count
218 *
219 * Register usage:
220 * r0 - scratch / phase signs mask
221 * r1 - scratch
222 * r2 - precalculated port value (CS and SC low, DS and SD high),
223 * negated (neg)!
224 * r3 - lcd port address
225 * r4 - current value address
226 * r5 - current phase address
227 * r6 - end address
228 * r7/r8 - current/next block of phases (alternating)
229 * r9/r10 - current blocks of values
230 * r11 - 0x00000080 \
231 * r12 - 0x00008000 > for phase sign check
232 * r13 - 0x00800000 /
233 */
234
235_lcd_grey_data:
236 mov.l r8, @-r15 /* save r8 */
237 mov.l r9, @-r15 /* save r9 */
238 mov.l r10, @-r15 /* save r10 */
239 shll2 r6 /* v */
240 mov.l r11, @-r15 /* save r11 */
241 shll r6 /* r6 *= 8; (8 pixels per block) */
242 mov.l .lcdr, r3 /* put lcd data port address in r3 */
243 add r4, r6 /* end address */
244
245 /* This code will fail if an interrupt changes the contents of PBDRL.
246 * If so, we must disable the interrupt here. If disabling interrupts
247 * for a long time is undesirable, the loop has to be rewritten to
248 * disable/precalculate/transfer/enable for each iteration. However,
249 * this would significantly decrease performance. */
250
251 mov.b @r3, r0 /* r0 = PBDRL */
252 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
253 mov.l r12, @-r15 /* save r12 */
254 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
255 mov.l r13, @-r15 /* save r13 */
256 neg r0, r2 /* r2 = 0 - r0 */
257
258 /* loop exploits that SD is on bit 0 for recorders and Ondios */
259
260 mov.w .ptest, r11
261 swap.b r11, r12
262 mov.l @r5, r7
263 swap.w r11, r13
264 mov.l .pmask, r0
265
266.greyloop:
267 cmp/pz r7
268 mov.l @r4+, r9
269 negc r2, r1
270 mov.b r1, @r3
271 add #(LCD_SC), r1
272 mov.b r1, @r3
273
274 tst r13, r7
275 mov.l @r4+, r10
276 negc r2, r1
277 mov.b r1, @r3
278 add #(LCD_SC), r1
279 mov.b r1, @r3
280
281 tst r12, r7
282 mov.l @(4,r5), r8
283 negc r2, r1
284 mov.b r1, @r3
285 add #(LCD_SC), r1
286 mov.b r1, @r3
287
288 tst r11, r7
289 or r0, r7
290 negc r2, r1
291 mov.b r1, @r3
292 add #(LCD_SC), r1
293 mov.b r1, @r3
294
295 cmp/pz r8
296 sub r9, r7
297 negc r2, r1
298 mov.b r1, @r3
299 add #(LCD_SC), r1
300 mov.b r1, @r3
301
302 tst r13, r8
303 mov.l r7, @r5
304 negc r2, r1
305 mov.b r1, @r3
306 add #(LCD_SC), r1
307 mov.b r1, @r3
308
309 tst r12, r8
310 mov.l @(8,r5), r7
311 negc r2, r1
312 mov.b r1, @r3
313 add #(LCD_SC), r1
314 mov.b r1, @r3
315
316 tst r11, r8
317 or r0, r8
318 negc r2, r1
319 mov.b r1, @r3
320 add #(LCD_SC), r1
321 mov.b r1, @r3
322
323 sub r10, r8
324 mov.l r8, @(4,r5)
325
326 add #8, r5
327 cmp/hi r4, r6
328 bt .greyloop
329
330 mov.l @r15+, r13 /* restore r13 */
331 mov #(LCD_CS|LCD_DS|LCD_SD|LCD_SC), r0
332 mov.l @r15+, r12 /* restore r12 */
333 or r0, r1 /* restore port */
334 mov.l @r15+, r11 /* restore r11 */
335 mov.l @r15+, r10 /* restore r10 */
336 mov.l @r15+, r9 /* restore r9 */
337 mov.l @r15+, r8 /* restore r8 */
338 rts
339 mov.b r1, @r3
340
341 /* This is the place to reenable the interrupts, if we have disabled
342 * them. See above. */
343
344.ptest:
345 .short 0x0080
346
347 .align 2
348.pmask:
349 .long 0x80808080
350#endif
351
352 .align 2
353.lcdr:
354 .long LCDR
diff --git a/firmware/target/sh/archos/mascodec-archos.c b/firmware/target/sh/archos/mascodec-archos.c
deleted file mode 100644
index faa5c7ef2b..0000000000
--- a/firmware/target/sh/archos/mascodec-archos.c
+++ /dev/null
@@ -1,491 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "stdbool.h"
22#include "config.h"
23#include "sh7034.h"
24#include "i2c.h"
25#include "debug.h"
26#include "mas35xx.h"
27#include "kernel.h"
28#include "system.h"
29#include "hwcompat.h"
30
31static int mas_devread(unsigned long *dest, int len);
32
33#if 0 /* Currently unused, left for reference and future use */
34int mas_default_read(unsigned short *buf)
35{
36 unsigned char *dest = (unsigned char *)buf;
37 int ret = 0;
38
39 i2c_begin();
40
41 i2c_start();
42 i2c_outb(MAS_DEV_WRITE);
43 if (i2c_getack()) {
44 i2c_outb(MAS_DATA_READ);
45 if (i2c_getack()) {
46 i2c_start();
47 i2c_outb(MAS_DEV_READ);
48 if (i2c_getack()) {
49 dest[0] = i2c_inb(0);
50 dest[1] = i2c_inb(1);
51 }
52 else
53 ret = -3;
54 }
55 else
56 ret = -2;
57 }
58 else
59 ret = -1;
60
61 i2c_stop();
62
63 i2c_end();
64 return ret;
65}
66#endif
67
68#if CONFIG_CODEC == MAS3507D
69int mas_run(unsigned short address)
70{
71 int ret = 0;
72 unsigned char buf[3];
73
74 i2c_begin();
75
76 buf[0] = MAS_DATA_WRITE;
77 buf[1] = address >> 8;
78 buf[2] = address & 0xff;
79
80 /* send run command */
81 if (i2c_write(MAS_DEV_WRITE,buf,3))
82 {
83 ret = -1;
84 }
85
86 i2c_end();
87 return ret;
88}
89#endif
90
91/* note: 'len' is number of 32-bit words, not number of bytes! */
92int mas_readmem(int bank, int addr, unsigned long* dest, int len)
93{
94 int ret = 0;
95 unsigned char buf[7];
96
97 i2c_begin();
98
99 buf[0] = MAS_DATA_WRITE;
100 buf[1] = bank?MAS_CMD_READ_D1_MEM:MAS_CMD_READ_D0_MEM;
101 buf[2] = 0x00;
102 buf[3] = (len & 0xff00) >> 8;
103 buf[4] = len & 0xff;
104 buf[5] = (addr & 0xff00) >> 8;
105 buf[6] = addr & 0xff;
106
107 /* send read command */
108 if (i2c_write(MAS_DEV_WRITE,buf,7))
109 {
110 ret = -1;
111 }
112
113 ret = mas_devread(dest, len);
114
115 i2c_end();
116 return ret;
117}
118
119/* note: 'len' is number of 32-bit words, not number of bytes! */
120int mas_writemem(int bank, int addr, const unsigned long* src, int len)
121{
122 int ret = 0;
123 int i, j;
124 unsigned char buf[60];
125 const unsigned char* ptr = (const unsigned char*)src;
126
127 i2c_begin();
128
129 i=0;
130 buf[i++] = MAS_DATA_WRITE;
131 buf[i++] = bank?MAS_CMD_WRITE_D1_MEM:MAS_CMD_WRITE_D0_MEM;
132 buf[i++] = 0x00;
133 buf[i++] = (len & 0xff00) >> 8;
134 buf[i++] = len & 0xff;
135 buf[i++] = (addr & 0xff00) >> 8;
136 buf[i++] = addr & 0xff;
137
138 j = 0;
139 while(len--) {
140#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
141 buf[i++] = 0;
142 buf[i++] = ptr[j+1];
143 buf[i++] = ptr[j+2];
144 buf[i++] = ptr[j+3];
145#else
146 buf[i++] = ptr[j+2];
147 buf[i++] = ptr[j+3];
148 buf[i++] = 0;
149 buf[i++] = ptr[j+1];
150#endif
151 j += 4;
152 }
153
154 /* send write command */
155 if (i2c_write(MAS_DEV_WRITE,buf,i))
156 {
157 ret = -1;
158 }
159
160 i2c_end();
161 return ret;
162}
163
164int mas_readreg(int reg)
165{
166 int ret = 0;
167 unsigned char buf[16];
168 unsigned long value;
169
170 i2c_begin();
171
172 buf[0] = MAS_DATA_WRITE;
173 buf[1] = MAS_CMD_READ_REG | (reg >> 4);
174 buf[2] = (reg & 0x0f) << 4;
175
176 /* send read command */
177 if (i2c_write(MAS_DEV_WRITE,buf,3))
178 {
179 ret = -1;
180 }
181 else
182 {
183 if(mas_devread(&value, 1))
184 {
185 ret = -2;
186 }
187 else
188 {
189 ret = value;
190 }
191 }
192
193 i2c_end();
194 return ret;
195}
196
197int mas_writereg(int reg, unsigned int val)
198{
199 int ret = 0;
200 unsigned char buf[5];
201
202 i2c_begin();
203
204 buf[0] = MAS_DATA_WRITE;
205 buf[1] = MAS_CMD_WRITE_REG | (reg >> 4);
206#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
207 buf[2] = ((reg & 0x0f) << 4) | (val >> 16 & 0x0f);
208 buf[3] = (val >> 8) & 0xff;
209 buf[4] = val & 0xff;
210#else
211 buf[2] = ((reg & 0x0f) << 4) | (val & 0x0f);
212 buf[3] = (val >> 12) & 0xff;
213 buf[4] = (val >> 4) & 0xff;
214#endif
215
216 /* send write command */
217 if (i2c_write(MAS_DEV_WRITE,buf,5))
218 {
219 ret = -1;
220 }
221
222 i2c_end();
223 return ret;
224}
225
226/* note: 'len' is number of 32-bit words, not number of bytes! */
227static int mas_devread(unsigned long *dest, int len)
228{
229 int ret = 0;
230 unsigned char* ptr = (unsigned char*)dest;
231 int i;
232
233 /* handle read-back */
234 /* Remember, the MAS values are only 20 bits, so we set
235 the upper 12 bits to 0 */
236 i2c_start();
237 i2c_outb(MAS_DEV_WRITE);
238 if (i2c_getack()) {
239 i2c_outb(MAS_DATA_READ);
240 if (i2c_getack()) {
241 i2c_start();
242 i2c_outb(MAS_DEV_READ);
243 if (i2c_getack()) {
244 for (i=0;len;i++) {
245 len--;
246#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
247 i2c_inb(0); /* Dummy read */
248 ptr[i*4+0] = 0;
249 ptr[i*4+1] = i2c_inb(0) & 0x0f;
250 ptr[i*4+2] = i2c_inb(0);
251 if(len)
252 ptr[i*4+3] = i2c_inb(0);
253 else
254 ptr[i*4+3] = i2c_inb(1); /* NAK the last byte */
255#else
256 ptr[i*4+2] = i2c_inb(0);
257 ptr[i*4+3] = i2c_inb(0);
258 ptr[i*4+0] = i2c_inb(0);
259 if(len)
260 ptr[i*4+1] = i2c_inb(0);
261 else
262 ptr[i*4+1] = i2c_inb(1); /* NAK the last byte */
263#endif
264 }
265 }
266 else
267 ret = -3;
268 }
269 else
270 ret = -2;
271 }
272 else
273 ret = -1;
274
275 i2c_stop();
276
277 return ret;
278}
279
280void mas_reset(void)
281{
282 or_b(0x01, &PAIORH);
283
284#if CONFIG_CODEC == MAS3507D
285 /* PB5 is "MAS enable". make it GPIO output and high */
286 PBCR2 &= ~0x0c00;
287 or_b(0x20, &PBIORL);
288 or_b(0x20, &PBDRL);
289
290 and_b(~0x01, &PADRH);
291 sleep(HZ/100);
292 or_b(0x01, &PADRH);
293 sleep(HZ/5);
294#elif (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
295 if (HW_MASK & ATA_ADDRESS_200)
296 {
297 and_b(~0x01, &PADRH);
298 sleep(HZ/100);
299 or_b(0x01, &PADRH);
300 sleep(HZ/5);
301 }
302 else
303 {
304 /* Older recorder models don't invert the POR signal */
305 or_b(0x01, &PADRH);
306 sleep(HZ/100);
307 and_b(~0x01, &PADRH);
308 sleep(HZ/5);
309 }
310#endif
311}
312
313#if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F)
314#if 0 /* Currently unused, left for reference and future use */
315int mas_direct_config_read(unsigned char reg)
316{
317 int ret = 0;
318 unsigned char tmp[2];
319
320 i2c_begin();
321
322 i2c_start();
323 i2c_outb(MAS_DEV_WRITE);
324 if (i2c_getack()) {
325 i2c_outb(reg);
326 if (i2c_getack()) {
327 i2c_start();
328 i2c_outb(MAS_DEV_READ);
329 if (i2c_getack()) {
330 tmp[0] = i2c_inb(0);
331 tmp[1] = i2c_inb(1); /* NAK the last byte */
332 ret = (tmp[0] << 8) | tmp[1];
333 }
334 else
335 ret = -3;
336 }
337 else
338 ret = -2;
339 }
340 else
341 ret = -1;
342
343 i2c_stop();
344
345 i2c_end();
346 return ret;
347}
348#endif
349
350int mas_direct_config_write(unsigned char reg, unsigned int val)
351{
352 int ret = 0;
353 unsigned char buf[3];
354
355 i2c_begin();
356
357 buf[0] = reg;
358 buf[1] = (val >> 8) & 0xff;
359 buf[2] = val & 0xff;
360
361 /* send write command */
362 if (i2c_write(MAS_DEV_WRITE,buf,3))
363 {
364 ret = -1;
365 }
366
367 i2c_end();
368 return ret;
369}
370
371int mas_codec_writereg(int reg, unsigned int val)
372{
373 int ret = 0;
374 unsigned char buf[5];
375
376 i2c_begin();
377
378 buf[0] = MAS_CODEC_WRITE;
379 buf[1] = (reg >> 8) & 0xff;
380 buf[2] = reg & 0xff;
381 buf[3] = (val >> 8) & 0xff;
382 buf[4] = val & 0xff;
383
384 /* send write command */
385 if (i2c_write(MAS_DEV_WRITE,buf,5))
386 {
387 ret = -1;
388 }
389
390 i2c_end();
391 return ret;
392}
393
394int mas_codec_readreg(int reg)
395{
396 int ret = 0;
397 unsigned char buf[16];
398 unsigned char tmp[2];
399
400 i2c_begin();
401
402 buf[0] = MAS_CODEC_WRITE;
403 buf[1] = (reg >> 8) & 0xff;
404 buf[2] = reg & 0xff;
405
406 /* send read command */
407 if (i2c_write(MAS_DEV_WRITE,buf,3))
408 {
409 ret = -1;
410 }
411 else
412 {
413 i2c_start();
414 i2c_outb(MAS_DEV_WRITE);
415 if (i2c_getack()) {
416 i2c_outb(MAS_CODEC_READ);
417 if (i2c_getack()) {
418 i2c_start();
419 i2c_outb(MAS_DEV_READ);
420 if (i2c_getack()) {
421 tmp[0] = i2c_inb(0);
422 tmp[1] = i2c_inb(1); /* NAK the last byte */
423 ret = (tmp[0] << 8) | tmp[1];
424 }
425 else
426 ret = -4;
427 }
428 else
429 ret = -3;
430 }
431 else
432 ret = -2;
433
434 i2c_stop();
435 }
436
437 i2c_end();
438 return ret;
439}
440
441unsigned long mas_readver(void)
442{
443 int ret = 0;
444 unsigned char buf[16];
445 unsigned long value;
446
447 i2c_begin();
448
449 buf[0] = MAS_DATA_WRITE;
450 buf[1] = MAS_CMD_READ_IC_VER;
451 buf[2] = 0;
452
453 /* send read command */
454 if (i2c_write(MAS_DEV_WRITE,buf,3))
455 {
456 ret = -1;
457 }
458 else
459 {
460 if(mas_devread(&value, 1))
461 {
462 ret = -2;
463 }
464 else
465 {
466 ret = value;
467 }
468 }
469
470 i2c_end();
471 return ret;
472}
473
474#endif
475
476#if CONFIG_TUNER & S1A0903X01
477static int pllfreq;
478
479void mas_store_pllfreq(int freq)
480{
481 pllfreq = freq;
482}
483
484int mas_get_pllfreq(void)
485{
486 return pllfreq;
487}
488#endif
489
490
491
diff --git a/firmware/target/sh/archos/ondio/adc-target.h b/firmware/target/sh/archos/ondio/adc-target.h
deleted file mode 100644
index a39ee110f3..0000000000
--- a/firmware/target/sh/archos/ondio/adc-target.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_
23
24#define NUM_ADC_CHANNELS 8
25
26#define ADC_MMC_SWITCH 0 /* low values if MMC inserted */
27#define ADC_USB_POWER 1 /* USB, reads 0x000 when USB is inserted */
28#define ADC_BUTTON_OPTION 2 /* the option button, low value if pressed */
29#define ADC_BUTTON_ONOFF 3 /* the on/off button, high value if pressed */
30#define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different
31 voltages for different keys */
32#define ADC_USB_ACTIVE 5 /* USB bridge activity */
33#define ADC_UNREG_POWER 7 /* Battery voltage */
34
35#define EXT_SCALE_FACTOR 14800
36
37#endif /* _ADC_TARGET_H_ */
diff --git a/firmware/target/sh/archos/ondio/ata_mmc.c b/firmware/target/sh/archos/ondio/ata_mmc.c
deleted file mode 100644
index f252e1c4ce..0000000000
--- a/firmware/target/sh/archos/ondio/ata_mmc.c
+++ /dev/null
@@ -1,978 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "ata_mmc.h"
23#include "sdmmc.h"
24#include "kernel.h"
25#include "led.h"
26#include "sh7034.h"
27#include "system.h"
28#include "debug.h"
29#include "panic.h"
30#include "power.h"
31#include "string.h"
32#include "hwcompat.h"
33#include "adc.h"
34#include "bitswap.h"
35#include "storage.h"
36
37
38#ifdef HAVE_MULTIDRIVE
39#define MMC_NUM_DRIVES 2
40#else
41#define MMC_NUM_DRIVES 1
42#endif
43
44#define BLOCK_SIZE 512 /* fixed */
45
46/* Command definitions */
47#define CMD_GO_IDLE_STATE 0x40 /* R1 */
48#define CMD_SEND_OP_COND 0x41 /* R1 */
49#define CMD_SEND_CSD 0x49 /* R1 */
50#define CMD_SEND_CID 0x4a /* R1 */
51#define CMD_STOP_TRANSMISSION 0x4c /* R1 */
52#define CMD_SEND_STATUS 0x4d /* R2 */
53#define CMD_SET_BLOCKLEN 0x50 /* R1 */
54#define CMD_READ_SINGLE_BLOCK 0x51 /* R1 */
55#define CMD_READ_MULTIPLE_BLOCK 0x52 /* R1 */
56#define CMD_WRITE_BLOCK 0x58 /* R1b */
57#define CMD_WRITE_MULTIPLE_BLOCK 0x59 /* R1b */
58#define CMD_READ_OCR 0x7a /* R3 */
59
60/* Response formats:
61 R1 = single byte, msb=0, various error flags
62 R1b = R1 + busy token(s)
63 R2 = 2 bytes (1st byte identical to R1), additional flags
64 R3 = 5 bytes (R1 + OCR register)
65*/
66
67#define R1_PARAMETER_ERR 0x40
68#define R1_ADDRESS_ERR 0x20
69#define R1_ERASE_SEQ_ERR 0x10
70#define R1_COM_CRC_ERR 0x08
71#define R1_ILLEGAL_CMD 0x04
72#define R1_ERASE_RESET 0x02
73#define R1_IN_IDLE_STATE 0x01
74
75#define R2_OUT_OF_RANGE 0x80
76#define R2_ERASE_PARAM 0x40
77#define R2_WP_VIOLATION 0x20
78#define R2_CARD_ECC_FAIL 0x10
79#define R2_CC_ERROR 0x08
80#define R2_ERROR 0x04
81#define R2_ERASE_SKIP 0x02
82#define R2_CARD_LOCKED 0x01
83
84/* Data start tokens */
85
86#define DT_START_BLOCK 0xfe
87#define DT_START_WRITE_MULTIPLE 0xfc
88#define DT_STOP_TRAN 0xfd
89
90/* for compatibility */
91static long last_disk_activity = -1;
92
93/* private variables */
94
95#ifdef CONFIG_STORAGE_MULTI
96static int mmc_first_drive = 0;
97#else
98#define mmc_first_drive 0
99#endif
100
101static struct mutex mmc_mutex SHAREDBSS_ATTR;
102
103static bool initialized = false;
104static bool new_mmc_circuit;
105
106static enum {
107 MMC_UNKNOWN,
108 MMC_UNTOUCHED,
109 MMC_TOUCHED
110} mmc_status = MMC_UNKNOWN;
111
112static enum {
113 SER_POLL_WRITE,
114 SER_POLL_READ,
115 SER_DISABLED
116} serial_mode;
117
118static const unsigned char dummy[] = {
119 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
120};
121
122/* 2 buffers used alternatively for writing, including start token,
123 * dummy CRC and an extra byte to keep word alignment. */
124static unsigned char write_buffer[2][BLOCK_SIZE+4];
125static int current_buffer = 0;
126static const unsigned char *send_block_addr = NULL;
127
128static tCardInfo card_info[2];
129#ifndef HAVE_MULTIDRIVE
130static int current_card = 0;
131#endif
132static bool last_mmc_status = false;
133static int countdown = -1; /* for mmc switch debouncing. -1 because the
134 countdown should not happen if the card
135 is inserted at boot */
136static bool usb_activity; /* monitoring the USB bridge */
137static long last_usb_activity;
138
139/* private function declarations */
140
141static int select_card(int card_no);
142static void deselect_card(void);
143static void setup_sci1(int bitrate_register);
144static void set_sci1_poll_read(void);
145static void write_transfer(const unsigned char *buf, int len)
146 __attribute__ ((section(".icode")));
147static void read_transfer(unsigned char *buf, int len)
148 __attribute__ ((section(".icode")));
149static unsigned char poll_byte(long timeout);
150static unsigned char poll_busy(long timeout);
151static unsigned char send_cmd(int cmd, unsigned long parameter, void *data);
152static int receive_cxd(unsigned char *buf);
153static int initialize_card(int card_no);
154static int receive_block(unsigned char *inbuf, long timeout);
155static void send_block_prepare(void);
156static int send_block_send(unsigned char start_token, long timeout,
157 bool prepare_next);
158static void mmc_tick(void);
159
160/* implementation */
161
162static void enable_controller(bool on)
163{
164 PBCR1 &= ~0x0CF0; /* PB13, PB11 and PB10 become GPIO,
165 * if not modified below */
166 if (on)
167 PBCR1 |= 0x08A0; /* as SCK1, TxD1, RxD1 */
168
169 and_b(~0x80, &PADRL); /* assert flash reset */
170 sleep(HZ/100);
171 or_b(0x80, &PADRL); /* de-assert flash reset */
172 sleep(HZ/100);
173 card_info[0].initialized = false;
174 card_info[1].initialized = false;
175}
176
177void mmc_enable_int_flash_clock(bool on)
178{
179 /* Internal flash clock is enabled by setting PA12 high with the new
180 * clock circuit, and by setting it low with the old clock circuit */
181 if (on ^ new_mmc_circuit)
182 and_b(~0x10, &PADRH); /* clear clock gate PA12 */
183 else
184 or_b(0x10, &PADRH); /* set clock gate PA12 */
185}
186
187static int select_card(int card_no)
188{
189 mutex_lock(&mmc_mutex);
190 led(true);
191 last_disk_activity = current_tick;
192
193 mmc_enable_int_flash_clock(card_no == 0);
194
195 if (!card_info[card_no].initialized)
196 {
197 setup_sci1(7); /* Initial rate: 375 kbps (need <= 400 per mmc specs) */
198 write_transfer(dummy, 10); /* allow the card to synchronize */
199 while (!(SSR1 & SCI_TEND));
200 }
201
202 if (card_no == 0) /* internal */
203 and_b(~0x04, &PADRH); /* assert CS */
204 else /* external */
205 and_b(~0x02, &PADRH); /* assert CS */
206
207 if (card_info[card_no].initialized)
208 {
209 setup_sci1(card_info[card_no].bitrate_register);
210 return 0;
211 }
212 else
213 {
214 return initialize_card(card_no);
215 }
216}
217
218static void deselect_card(void)
219{
220 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
221 or_b(0x06, &PADRH); /* deassert CS (both cards) */
222
223 led(false);
224 mutex_unlock(&mmc_mutex);
225 last_disk_activity = current_tick;
226}
227
228static void setup_sci1(int bitrate_register)
229{
230 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
231
232 SCR1 = 0; /* disable serial port */
233 SMR1 = SYNC_MODE; /* no prescale */
234 BRR1 = bitrate_register;
235 SSR1 = 0;
236
237 SCR1 = SCI_TE; /* enable transmitter */
238 serial_mode = SER_POLL_WRITE;
239}
240
241static void set_sci1_poll_read(void)
242{
243 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
244 SCR1 = 0; /* disable transmitter (& receiver) */
245 SCR1 = (SCI_TE|SCI_RE); /* re-enable transmitter & receiver */
246 while (!(SSR1 & SCI_TEND)); /* wait for SCI init completion (!) */
247 serial_mode = SER_POLL_READ;
248 TDR1 = 0xFF; /* send do-nothing while reading */
249}
250
251static void write_transfer(const unsigned char *buf, int len)
252{
253 const unsigned char *buf_end = buf + len;
254 register unsigned char data;
255
256 if (serial_mode != SER_POLL_WRITE)
257 {
258 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
259 SCR1 = 0; /* disable transmitter & receiver */
260 SSR1 = 0; /* clear all flags */
261 SCR1 = SCI_TE; /* enable transmitter only */
262 serial_mode = SER_POLL_WRITE;
263 }
264
265 while (buf < buf_end)
266 {
267 data = fliptable[(signed char)(*buf++)]; /* bitswap */
268 while (!(SSR1 & SCI_TDRE)); /* wait for end of transfer */
269 TDR1 = data; /* write byte */
270 SSR1 = 0; /* start transmitting */
271 }
272}
273
274/* don't call this with len == 0 */
275static void read_transfer(unsigned char *buf, int len)
276{
277 unsigned char *buf_end = buf + len - 1;
278 register signed char data;
279
280 if (serial_mode != SER_POLL_READ)
281 set_sci1_poll_read();
282
283 SSR1 = 0; /* start receiving first byte */
284 while (buf < buf_end)
285 {
286 while (!(SSR1 & SCI_RDRF)); /* wait for data */
287 data = RDR1; /* read byte */
288 SSR1 = 0; /* start receiving */
289 *buf++ = fliptable[data]; /* bitswap */
290 }
291 while (!(SSR1 & SCI_RDRF)); /* wait for last byte */
292 *buf = fliptable[(signed char)(RDR1)]; /* read & bitswap */
293}
294
295/* returns 0xFF on timeout, timeout is in bytes */
296static unsigned char poll_byte(long timeout)
297{
298 long i;
299 unsigned char data = 0; /* stop the compiler complaining */
300
301 if (serial_mode != SER_POLL_READ)
302 set_sci1_poll_read();
303
304 i = 0;
305 do {
306 SSR1 = 0; /* start receiving */
307 while (!(SSR1 & SCI_RDRF)); /* wait for data */
308 data = RDR1; /* read byte */
309 } while ((data == 0xFF) && (++i < timeout));
310
311 return fliptable[(signed char)data];
312}
313
314/* returns 0 on timeout, timeout is in bytes */
315static unsigned char poll_busy(long timeout)
316{
317 long i;
318 unsigned char data, dummy;
319
320 if (serial_mode != SER_POLL_READ)
321 set_sci1_poll_read();
322
323 /* get data response */
324 SSR1 = 0; /* start receiving */
325 while (!(SSR1 & SCI_RDRF)); /* wait for data */
326 data = fliptable[(signed char)(RDR1)]; /* read byte */
327
328 /* wait until the card is ready again */
329 i = 0;
330 do {
331 SSR1 = 0; /* start receiving */
332 while (!(SSR1 & SCI_RDRF)); /* wait for data */
333 dummy = RDR1; /* read byte */
334 } while ((dummy != 0xFF) && (++i < timeout));
335
336 return (dummy == 0xFF) ? data : 0;
337}
338
339/* Send MMC command and get response. Returns R1 byte directly.
340 * Returns further R2 or R3 bytes in *data (can be NULL for other commands) */
341static unsigned char send_cmd(int cmd, unsigned long parameter, void *data)
342{
343 static struct {
344 unsigned char cmd;
345 unsigned long parameter;
346 const unsigned char crc7; /* fixed, valid for CMD0 only */
347 const unsigned char trailer;
348 } __attribute__((packed)) command = {0x40, 0, 0x95, 0xFF};
349
350 unsigned char ret;
351
352 command.cmd = cmd;
353 command.parameter = htobe32(parameter);
354
355 write_transfer((unsigned char *)&command, sizeof(command));
356
357 ret = poll_byte(20);
358
359 switch (cmd)
360 {
361 case CMD_SEND_CSD: /* R1 response, leave open */
362 case CMD_SEND_CID:
363 case CMD_READ_SINGLE_BLOCK:
364 case CMD_READ_MULTIPLE_BLOCK:
365 return ret;
366
367 case CMD_SEND_STATUS: /* R2 response, close with dummy */
368 read_transfer(data, 1);
369 break;
370
371 case CMD_READ_OCR: /* R3 response, close with dummy */
372 read_transfer(data, 4);
373 break;
374
375 default: /* R1 response, close with dummy */
376 break; /* also catches block writes */
377 }
378 write_transfer(dummy, 1);
379 return ret;
380}
381
382/* Receive CID/ CSD data (16 bytes) */
383static int receive_cxd(unsigned char *buf)
384{
385 if (poll_byte(20) != DT_START_BLOCK)
386 {
387 write_transfer(dummy, 1);
388 return -1; /* not start of data */
389 }
390
391 read_transfer(buf, 16);
392 write_transfer(dummy, 3); /* 2 bytes dontcare crc + 1 byte trailer */
393 return 0;
394}
395
396
397static int initialize_card(int card_no)
398{
399 int rc, i;
400 int blk_exp, ts_exp, taac_exp;
401 tCardInfo *card = &card_info[card_no];
402
403 static const char mantissa[] = { /* *10 */
404 0, 10, 12, 13, 15, 20, 25, 30,
405 35, 40, 45, 50, 55, 60, 70, 80
406 };
407 static const int exponent[] = { /* use varies */
408 1, 10, 100, 1000, 10000, 100000, 1000000,
409 10000000, 100000000, 1000000000
410 };
411
412 if (card_no == 1)
413 mmc_status = MMC_TOUCHED;
414
415 /* switch to SPI mode */
416 if (send_cmd(CMD_GO_IDLE_STATE, 0, NULL) != 0x01)
417 return -1; /* error or no response */
418
419 /* initialize card */
420 for (i = HZ;;) /* try for 1 second*/
421 {
422 sleep(1);
423 if (send_cmd(CMD_SEND_OP_COND, 0, NULL) == 0)
424 break;
425 if (--i <= 0)
426 return -2; /* timeout */
427 }
428
429 /* get OCR register */
430 if (send_cmd(CMD_READ_OCR, 0, &card->ocr))
431 return -3;
432 card->ocr = betoh32(card->ocr); /* no-op on big endian */
433
434 /* check voltage */
435 if (!(card->ocr & 0x00100000)) /* 3.2 .. 3.3 V */
436 return -4;
437
438 /* get CSD register */
439 if (send_cmd(CMD_SEND_CSD, 0, NULL))
440 return -5;
441 rc = receive_cxd((unsigned char*)card->csd);
442 if (rc)
443 return rc * 10 - 5;
444
445 blk_exp = card_extract_bits(card->csd, 83, 4);
446 if (blk_exp < 9) /* block size < 512 bytes not supported */
447 return -6;
448
449 card->numblocks = (card_extract_bits(card->csd, 73, 12) + 1)
450 << (card_extract_bits(card->csd, 49, 3) + 2 + blk_exp - 9);
451 card->blocksize = BLOCK_SIZE;
452
453 /* max transmission speed, clock divider */
454 ts_exp = card_extract_bits(card->csd, 98, 3);
455 ts_exp = (ts_exp > 3) ? 3 : ts_exp;
456 card->speed = mantissa[card_extract_bits(card->csd, 102, 4)]
457 * exponent[ts_exp + 4];
458 card->bitrate_register = (FREQ/4-1) / card->speed;
459
460 /* NSAC, TAAC, read timeout */
461 card->nsac = 100 * card_extract_bits(card->csd, 111, 8);
462 card->taac = mantissa[card_extract_bits(card->csd, 118, 4)];
463 taac_exp = card_extract_bits(card->csd, 114, 3);
464 card->read_timeout = ((FREQ/4) / (card->bitrate_register + 1)
465 * card->taac / exponent[9 - taac_exp]
466 + (10 * card->nsac));
467 card->read_timeout /= 8; /* clocks -> bytes */
468 card->taac = card->taac * exponent[taac_exp] / 10;
469
470 /* r2w_factor, write timeout */
471 card->r2w_factor = BIT_N(card_extract_bits(card->csd, 28, 3));
472 card->write_timeout = card->read_timeout * card->r2w_factor;
473
474 if (card->r2w_factor > 32) /* Such cards often need extra read delay */
475 card->read_timeout *= 4;
476
477 /* switch to full speed */
478 setup_sci1(card->bitrate_register);
479
480 /* always use 512 byte blocks */
481 if (send_cmd(CMD_SET_BLOCKLEN, BLOCK_SIZE, NULL))
482 return -7;
483
484 /* get CID register */
485 if (send_cmd(CMD_SEND_CID, 0, NULL))
486 return -8;
487 rc = receive_cxd((unsigned char*)card->cid);
488 if (rc)
489 return rc * 10 - 8;
490
491 card->initialized = true;
492 return 0;
493}
494
495tCardInfo *mmc_card_info(int card_no)
496{
497 tCardInfo *card = &card_info[card_no];
498
499 if (!card->initialized && ((card_no == 0) || mmc_detect()))
500 {
501 select_card(card_no);
502 deselect_card();
503 }
504 return card;
505}
506
507/* Receive one block with DMA and bitswap it (chasing bitswap). */
508static int receive_block(unsigned char *inbuf, long timeout)
509{
510 unsigned long buf_end;
511
512 if (poll_byte(timeout) != DT_START_BLOCK)
513 {
514 write_transfer(dummy, 1);
515 return -1; /* not start of data */
516 }
517
518 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
519
520 SCR1 = 0; /* disable serial */
521 SSR1 = 0; /* clear all flags */
522
523 /* setup DMA channel 0 */
524 CHCR0 = 0; /* disable */
525 SAR0 = RDR1_ADDR;
526 DAR0 = (unsigned long) inbuf;
527 DTCR0 = BLOCK_SIZE;
528 CHCR0 = 0x4601; /* fixed source address, RXI1, enable */
529 DMAOR = 0x0001;
530 SCR1 = (SCI_RE|SCI_RIE); /* kick off DMA */
531
532 /* DMA receives 2 bytes more than DTCR2, but the last 2 bytes are not
533 * stored. The first extra byte is available from RDR1 after the DMA ends,
534 * the second one is lost because of the SCI overrun. However, this
535 * behaviour conveniently discards the crc. */
536
537 yield(); /* be nice */
538
539 /* Bitswap received data, chasing the DMA pointer */
540 buf_end = (unsigned long)inbuf + BLOCK_SIZE;
541 do
542 {
543 /* Call bitswap whenever (a multiple of) 8 bytes are
544 * available (value optimised by experimentation). */
545 int swap_now = (DAR0 - (unsigned long)inbuf) & ~0x00000007;
546 if (swap_now)
547 {
548 bitswap(inbuf, swap_now);
549 inbuf += swap_now;
550 }
551 }
552 while ((unsigned long)inbuf < buf_end);
553
554 while (!(CHCR0 & 0x0002)); /* wait for end of DMA */
555 while (!(SSR1 & SCI_ORER)); /* wait for the trailing bytes */
556 SCR1 = 0;
557 serial_mode = SER_DISABLED;
558
559 write_transfer(dummy, 1); /* send trailer */
560 last_disk_activity = current_tick;
561 return 0;
562}
563
564/* Prepare a block for sending by copying it to the next write buffer
565 * and bitswapping it. */
566static void send_block_prepare(void)
567{
568 unsigned char *dest;
569
570 current_buffer ^= 1; /* toggle buffer */
571 dest = write_buffer[current_buffer] + 2;
572
573 memcpy(dest, send_block_addr, BLOCK_SIZE);
574 bitswap(dest, BLOCK_SIZE);
575
576 send_block_addr += BLOCK_SIZE;
577}
578
579/* Send one block with DMA from the current write buffer, possibly preparing
580 * the next block within the next write buffer in the background. */
581static int send_block_send(unsigned char start_token, long timeout,
582 bool prepare_next)
583{
584 int rc = 0;
585 unsigned char *curbuf = write_buffer[current_buffer];
586
587 curbuf[1] = fliptable[(signed char)start_token];
588 *(unsigned short *)(curbuf + BLOCK_SIZE + 2) = 0xFFFF;
589
590 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
591
592 SCR1 = 0; /* disable serial */
593 SSR1 = 0; /* clear all flags */
594
595 /* setup DMA channel 0 */
596 CHCR0 = 0; /* disable */
597 SAR0 = (unsigned long)(curbuf + 1);
598 DAR0 = TDR1_ADDR;
599 DTCR0 = BLOCK_SIZE + 3; /* start token + block + dummy crc */
600 CHCR0 = 0x1701; /* fixed dest. address, TXI1, enable */
601 DMAOR = 0x0001;
602 SCR1 = (SCI_TE|SCI_TIE); /* kick off DMA */
603
604 if (prepare_next)
605 send_block_prepare();
606 yield(); /* be nice */
607
608 while (!(CHCR0 & 0x0002)); /* wait for end of DMA */
609 while (!(SSR1 & SCI_TEND)); /* wait for end of transfer */
610 SCR1 = 0;
611 serial_mode = SER_DISABLED;
612
613 if ((poll_busy(timeout) & 0x1F) != 0x05) /* something went wrong */
614 rc = -1;
615
616 write_transfer(dummy, 1);
617 last_disk_activity = current_tick;
618
619 return rc;
620}
621
622int mmc_read_sectors(IF_MD(int drive,)
623 unsigned long start,
624 int incount,
625 void* inbuf)
626{
627 int rc = 0;
628 int lastblock = 0;
629 unsigned long end_block;
630 tCardInfo *card;
631#ifndef HAVE_MULTIDRIVE
632 int drive = current_card;
633#endif
634
635 card = &card_info[drive];
636 rc = select_card(drive);
637 if (rc)
638 {
639 rc = rc * 10 - 1;
640 goto error;
641 }
642
643 end_block = start + incount;
644 if (end_block > card->numblocks)
645 {
646 rc = -2;
647 goto error;
648 }
649
650 /* Some cards don't like reading the very last block with
651 * CMD_READ_MULTIPLE_BLOCK, so make sure this block is always
652 * read with CMD_READ_SINGLE_BLOCK. */
653 if (end_block == card->numblocks)
654 lastblock = 1;
655
656 if (incount > 1)
657 {
658 /* MMC4.2: make multiplication conditional */
659 if (send_cmd(CMD_READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, NULL))
660 {
661 rc = -3;
662 goto error;
663 }
664 while (--incount >= lastblock)
665 {
666 rc = receive_block(inbuf, card->read_timeout);
667 if (rc)
668 {
669 /* If an error occurs during multiple block reading, the
670 * host still needs to send CMD_STOP_TRANSMISSION */
671 send_cmd(CMD_STOP_TRANSMISSION, 0, NULL);
672 rc = rc * 10 - 4;
673 goto error;
674 }
675 inbuf += BLOCK_SIZE;
676 start++;
677 /* ^^ necessary for the abovementioned last block special case */
678 }
679 if (send_cmd(CMD_STOP_TRANSMISSION, 0, NULL))
680 {
681 rc = -5;
682 goto error;
683 }
684 }
685 if (incount > 0)
686 {
687 /* MMC4.2: make multiplication conditional */
688 if (send_cmd(CMD_READ_SINGLE_BLOCK, start * BLOCK_SIZE, NULL))
689 {
690 rc = -6;
691 goto error;
692 }
693 rc = receive_block(inbuf, card->read_timeout);
694 if (rc)
695 {
696 rc = rc * 10 - 7;
697 goto error;
698 }
699 }
700
701 error:
702
703 deselect_card();
704
705 return rc;
706}
707
708int mmc_write_sectors(IF_MD(int drive,)
709 unsigned long start,
710 int count,
711 const void* buf)
712{
713 int rc = 0;
714 int write_cmd;
715 unsigned char start_token;
716 tCardInfo *card;
717#ifndef HAVE_MULTIDRIVE
718 int drive = current_card;
719#endif
720
721 card = &card_info[drive];
722 rc = select_card(drive);
723 if (rc)
724 {
725 rc = rc * 10 - 1;
726 goto error;
727 }
728
729 if (start + count > card->numblocks)
730 panicf("Writing past end of card");
731
732 send_block_addr = buf;
733 send_block_prepare();
734
735 if (count > 1)
736 {
737 write_cmd = CMD_WRITE_MULTIPLE_BLOCK;
738 start_token = DT_START_WRITE_MULTIPLE;
739 }
740 else
741 {
742 write_cmd = CMD_WRITE_BLOCK;
743 start_token = DT_START_BLOCK;
744 }
745 /* MMC4.2: make multiplication conditional */
746 if (send_cmd(write_cmd, start * BLOCK_SIZE, NULL))
747 {
748 rc = -2;
749 goto error;
750 }
751 while (--count >= 0)
752 {
753 rc = send_block_send(start_token, card->write_timeout, count > 0);
754 if (rc)
755 {
756 rc = rc * 10 - 3;
757 break;
758 /* If an error occurs during multiple block writing,
759 * the STOP_TRAN token still needs to be sent. */
760 }
761 }
762 if (write_cmd == CMD_WRITE_MULTIPLE_BLOCK)
763 {
764 static const unsigned char stop_tran = DT_STOP_TRAN;
765 write_transfer(&stop_tran, 1);
766 poll_busy(card->write_timeout);
767 }
768
769 error:
770
771 deselect_card();
772
773 return rc;
774}
775
776bool mmc_disk_is_active(void)
777{
778 /* this is correct unless early return from write gets implemented */
779 return mutex_test(&mmc_mutex);
780}
781
782bool mmc_detect(void)
783{
784 return (adc_read(ADC_MMC_SWITCH) < 0x200);
785}
786
787bool mmc_touched(void)
788{
789 if (mmc_status == MMC_UNKNOWN) /* try to detect */
790 {
791 mutex_lock(&mmc_mutex);
792 setup_sci1(7); /* safe value */
793 and_b(~0x02, &PADRH); /* assert CS */
794 if (send_cmd(CMD_SEND_OP_COND, 0, NULL) == 0xFF)
795 mmc_status = MMC_UNTOUCHED;
796 else
797 mmc_status = MMC_TOUCHED;
798
799 deselect_card();
800 }
801 return mmc_status == MMC_TOUCHED;
802}
803
804bool mmc_usb_active(int delayticks)
805{
806 /* reading "inactive" is delayed by user-supplied monoflop value */
807 return (usb_activity ||
808 TIME_BEFORE(current_tick, last_usb_activity + delayticks));
809}
810
811static void mmc_tick(void)
812{
813 bool current_status;
814
815 if (new_mmc_circuit)
816 /* USB bridge activity is 0 on idle, ~527 on active */
817 current_status = adc_read(ADC_USB_ACTIVE) > 0x100;
818 else
819 current_status = adc_read(ADC_USB_ACTIVE) < 0x190;
820
821 if (!current_status && usb_activity)
822 last_usb_activity = current_tick;
823 usb_activity = current_status;
824
825 current_status = mmc_detect();
826 /* Only report when the status has changed */
827 if (current_status != last_mmc_status)
828 {
829 last_mmc_status = current_status;
830 countdown = HZ/3;
831 }
832 else
833 {
834 /* Count down until it gets negative */
835 if (countdown >= 0)
836 countdown--;
837
838 if (countdown == 0)
839 {
840 if (current_status)
841 {
842 queue_broadcast(SYS_HOTSWAP_INSERTED, mmc_first_drive + 1);
843 }
844 else
845 {
846 queue_broadcast(SYS_HOTSWAP_EXTRACTED, mmc_first_drive + 1);
847 mmc_status = MMC_UNTOUCHED;
848 card_info[1].initialized = false;
849 }
850 }
851 }
852}
853
854void mmc_enable(bool on)
855{
856 mutex_lock(&mmc_mutex);
857 enable_controller(on);
858 mutex_unlock(&mmc_mutex);
859}
860
861int mmc_init(void)
862{
863 int rc = 0;
864
865 if (!initialized)
866 mutex_init(&mmc_mutex);
867
868 mutex_lock(&mmc_mutex);
869 led(false);
870
871 last_mmc_status = mmc_detect();
872#ifndef HAVE_MULTIDRIVE
873 /* Use MMC if inserted, internal flash otherwise */
874 current_card = last_mmc_status ? 1 : 0;
875#endif
876
877 if (!initialized)
878 {
879 if (!last_mmc_status)
880 mmc_status = MMC_UNTOUCHED;
881
882 /* Port setup */
883 PACR1 &= ~0x0F3C; /* GPIO function for PA13 (flash busy), PA12
884 * (clk gate), PA10 (flash CS), PA9 (MMC CS) */
885 PACR2 &= ~0x4000; /* GPIO for PA7 (flash reset) */
886 PADR |= 0x0680; /* set all the selects + reset high (=inactive) */
887 PAIOR |= 0x1680; /* make outputs for them and the PA12 clock gate */
888
889 PBCR1 &= ~0x0CF0; /* GPIO function for PB13, PB11 and PB10 */
890 PBDR |= 0x2C00; /* SCK1, TxD1 and RxD1 high in GPIO */
891 PBIOR |= 0x2000; /* SCK1 output */
892 PBIOR &= ~0x0C00; /* TxD1, RxD1 input */
893
894 IPRE &= 0x0FFF; /* disable SCI1 interrupts for the CPU */
895
896 new_mmc_circuit = ((HW_MASK & MMC_CLOCK_POLARITY) != 0);
897 tick_add_task(mmc_tick);
898 initialized = true;
899 }
900 enable_controller(true);
901
902 mutex_unlock(&mmc_mutex);
903 return rc;
904}
905
906long mmc_last_disk_activity(void)
907{
908 return last_disk_activity;
909}
910
911#ifdef STORAGE_GET_INFO
912void mmc_get_info(IF_MD(int drive,) struct storage_info *info)
913{
914#ifndef HAVE_MULTIDRIVE
915 const int drive=0;
916#endif
917 info->sector_size=card_info[drive].blocksize;
918 info->num_sectors=card_info[drive].numblocks;
919 info->vendor="Rockbox";
920 if(drive==0)
921 {
922 info->product="Internal Storage";
923 }
924 else
925 {
926 info->product="MMC Card Slot";
927 }
928 info->revision="0.00";
929}
930#endif
931
932#ifdef HAVE_HOTSWAP
933bool mmc_removable(IF_MD_NONVOID(int drive))
934{
935#ifndef HAVE_MULTIDRIVE
936 const int drive=0;
937#endif
938 return (drive==1);
939}
940
941bool mmc_present(IF_MD_NONVOID(int drive))
942{
943#ifndef HAVE_MULTIDRIVE
944 const int drive=0;
945#endif
946 if(drive==0)
947 {
948 return true;
949 }
950 else
951 {
952 return mmc_detect();
953 }
954}
955#endif
956
957void mmc_spin(void)
958{
959}
960
961void mmc_spindown(int seconds)
962{
963 (void)seconds;
964}
965
966#ifdef CONFIG_STORAGE_MULTI
967int mmc_num_drives(int first_drive)
968{
969 mmc_first_drive = first_drive;
970 return MMC_NUM_DRIVES;
971}
972#endif /* CONFIG_STORAGE_MULTI */
973
974int mmc_event(long id, intptr_t data)
975{
976 return storage_event_default_handler(id, data, last_disk_activity,
977 STORAGE_MMC);
978}
diff --git a/firmware/target/sh/archos/ondio/backlight-target.h b/firmware/target/sh/archos/ondio/backlight-target.h
deleted file mode 100644
index 438c8c926a..0000000000
--- a/firmware/target/sh/archos/ondio/backlight-target.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24#include "config.h"
25#include "cpu.h"
26
27#ifdef HAVE_BACKLIGHT
28/* A stock Ondio has no backlight, it needs a hardware mod. */
29
30static inline bool backlight_hw_init(void)
31{
32 PACR1 &= ~0x3000; /* Set PA14 (backlight control) to GPIO */
33 or_b(0x40, &PADRH); /* drive it high */
34 or_b(0x40, &PAIORH); /* ..and output */
35 return true;
36}
37
38static inline void backlight_hw_on(void)
39{
40 or_b(0x40, &PADRH); /* drive it high */
41}
42
43static inline void backlight_hw_off(void)
44{
45 and_b(~0x40, &PADRH); /* drive it low */
46}
47#endif /* HAVE_BACKLIGHT */
48
49#endif
diff --git a/firmware/target/sh/archos/ondio/button-ondio.c b/firmware/target/sh/archos/ondio/button-ondio.c
deleted file mode 100644
index e3b370bc1f..0000000000
--- a/firmware/target/sh/archos/ondio/button-ondio.c
+++ /dev/null
@@ -1,71 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "system.h"
24#include "button.h"
25#include "backlight.h"
26#include "adc.h"
27
28/*
29 Ondio hardware button hookup
30 ============================
31
32 LEFT, RIGHT, UP, DOWN: connected to AN4 through a resistor network
33
34 The voltage on AN4 depends on which keys (or key combo) is pressed
35
36 OPTION: AN2, high active (assigned as MENU)
37 ON/OFF: AN3, low active (assigned as OFF)
38*/
39
40void button_init_device(void)
41{
42}
43
44int button_read_device(void)
45{
46 int btn = BUTTON_NONE;
47 int data;
48
49 /* Check the 4 direction keys */
50 data = adc_read(ADC_BUTTON_ROW1);
51 if (data >= 165)
52 {
53 if (data >= 585)
54 if (data >= 755)
55 btn = BUTTON_LEFT;
56 else
57 btn = BUTTON_RIGHT;
58 else
59 if (data >= 415)
60 btn = BUTTON_UP;
61 else
62 btn = BUTTON_DOWN;
63 }
64
65 if(adc_read(ADC_BUTTON_OPTION) > 0x200) /* active high */
66 btn |= BUTTON_MENU;
67 if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */
68 btn |= BUTTON_OFF;
69
70 return btn;
71}
diff --git a/firmware/target/sh/archos/ondio/button-target.h b/firmware/target/sh/archos/ondio/button-target.h
deleted file mode 100644
index a84be2851a..0000000000
--- a/firmware/target/sh/archos/ondio/button-target.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _BUTTON_TARGET_H_
23#define _BUTTON_TARGET_H_
24
25#define BUTTON_OFF 0x00000001
26#define BUTTON_MENU 0x00000002
27
28#define BUTTON_LEFT 0x00000004
29#define BUTTON_RIGHT 0x00000008
30#define BUTTON_UP 0x00000010
31#define BUTTON_DOWN 0x00000020
32
33#define BUTTON_MAIN (BUTTON_OFF|BUTTON_MENU|BUTTON_LEFT|BUTTON_RIGHT\
34 |BUTTON_UP|BUTTON_DOWN)
35
36#define POWEROFF_BUTTON BUTTON_OFF
37#define POWEROFF_COUNT 10
38
39#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/sh/archos/ondio/fmradio_i2c-ondio.c b/firmware/target/sh/archos/ondio/fmradio_i2c-ondio.c
deleted file mode 100644
index b901bd0019..0000000000
--- a/firmware/target/sh/archos/ondio/fmradio_i2c-ondio.c
+++ /dev/null
@@ -1,202 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 * Physical interface of the Philips TEA5767 in Archos Ondio
10 *
11 * Copyright (C) 2002 by Linus Nielsen Feltzing
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "cpu.h"
25#include "kernel.h"
26#include "logf.h"
27#include "system.h"
28#include "fmradio_i2c.h"
29
30#if (CONFIG_TUNER & TEA5767)
31
32/* cute little functions, atomic read-modify-write */
33/* SDA is PB4 */
34#define SDA_LO and_b(~0x10, &PBDRL)
35#define SDA_HI or_b(0x10, &PBDRL)
36#define SDA_INPUT and_b(~0x10, &PBIORL)
37#define SDA_OUTPUT or_b(0x10, &PBIORL)
38#define SDA (PBDR & 0x0010)
39
40/* SCL is PB1 */
41#define SCL_INPUT and_b(~0x02, &PBIORL)
42#define SCL_OUTPUT or_b(0x02, &PBIORL)
43#define SCL_LO and_b(~0x02, &PBDRL)
44#define SCL_HI or_b(0x02, &PBDRL)
45#define SCL (PBDR & 0x0002)
46
47/* arbitrary delay loop */
48#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
49
50static void fmradio_i2c_start(void)
51{
52 SDA_OUTPUT;
53 SDA_HI;
54 SCL_HI;
55 SDA_LO;
56 DELAY;
57 SCL_LO;
58}
59
60static void fmradio_i2c_stop(void)
61{
62 SDA_LO;
63 SCL_HI;
64 DELAY;
65 SDA_HI;
66}
67
68
69static void fmradio_i2c_ack(bool nack)
70{
71 /* Here's the deal. The slave is slow, and sometimes needs to wait
72 before it can receive the acknowledge. Therefore it forces the clock
73 low until it is ready. We need to poll the clock line until it goes
74 high before we release the ack. */
75
76 SCL_LO; /* Set the clock low */
77
78 if (nack)
79 SDA_HI;
80 else
81 SDA_LO;
82
83 SCL_INPUT; /* Set the clock to input */
84 while(!SCL) /* and wait for the slave to release it */
85 sleep(0);
86
87 DELAY;
88 SCL_OUTPUT;
89 SCL_LO;
90}
91
92static int fmradio_i2c_getack(void)
93{
94 int ret = 1;
95
96 /* Here's the deal. The slave is slow, and sometimes needs to wait
97 before it can send the acknowledge. Therefore it forces the clock
98 low until it is ready. We need to poll the clock line until it goes
99 high before we read the ack. */
100
101 SDA_INPUT; /* And set to input */
102 SCL_INPUT; /* Set the clock to input */
103 while(!SCL) /* and wait for the slave to release it */
104 sleep(0);
105
106 if (SDA)
107 /* ack failed */
108 ret = 0;
109
110 SCL_OUTPUT;
111 SCL_LO;
112 SDA_HI;
113 SDA_OUTPUT;
114 return ret;
115}
116
117static void fmradio_i2c_outb(unsigned char byte)
118{
119 int i;
120
121 /* clock out each bit, MSB first */
122 for ( i=0x80; i; i>>=1 ) {
123 if ( i & byte )
124 {
125 SDA_HI;
126 }
127 else
128 {
129 SDA_LO;
130 }
131 SCL_HI;
132 SCL_LO;
133 }
134
135 SDA_HI;
136}
137
138static unsigned char fmradio_i2c_inb(void)
139{
140 int i;
141 unsigned char byte = 0;
142
143 /* clock in each bit, MSB first */
144 for ( i=0x80; i; i>>=1 ) {
145 SDA_INPUT; /* And set to input */
146 SCL_HI;
147 if ( SDA )
148 byte |= i;
149 SCL_LO;
150 SDA_OUTPUT;
151 }
152
153 return byte;
154}
155
156int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count)
157{
158 int i,x=0;
159
160 fmradio_i2c_start();
161 fmradio_i2c_outb(address & 0xfe);
162 if (fmradio_i2c_getack())
163 {
164 for (i=0; i<count; i++)
165 {
166 fmradio_i2c_outb(buf[i]);
167 if (!fmradio_i2c_getack())
168 {
169 x=-2;
170 break;
171 }
172 }
173 }
174 else
175 {
176 logf("fmradio_i2c_write() - no ack\n");
177 x=-1;
178 }
179 fmradio_i2c_stop();
180 return x;
181}
182
183int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count)
184{
185 int i,x=0;
186
187 fmradio_i2c_start();
188 fmradio_i2c_outb(address | 1);
189 if (fmradio_i2c_getack()) {
190 for (i=count; i>0; i--)
191 {
192 *buf++ = fmradio_i2c_inb();
193 fmradio_i2c_ack(i == 1);
194 }
195 }
196 else
197 x=-1;
198 fmradio_i2c_stop();
199 return x;
200}
201
202#endif
diff --git a/firmware/target/sh/archos/ondio/power-ondio.c b/firmware/target/sh/archos/ondio/power-ondio.c
deleted file mode 100644
index d7bbc08f4f..0000000000
--- a/firmware/target/sh/archos/ondio/power-ondio.c
+++ /dev/null
@@ -1,78 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include <stdbool.h>
24#include "kernel.h"
25#include "system.h"
26#include "power.h"
27#include "usb.h"
28#include "backlight-target.h"
29
30#if CONFIG_TUNER
31
32static bool powered = false;
33
34bool tuner_power(bool status)
35{
36 bool old_status = powered;
37
38 powered = status;
39 if (status)
40 {
41 and_b(~0x04, &PADRL); /* drive PA2 low for tuner enable */
42 sleep(1); /* let the voltage settle */
43 }
44 else
45 or_b(0x04, &PADRL); /* drive PA2 high for tuner disable */
46 return old_status;
47}
48
49#endif /* #if CONFIG_TUNER */
50
51void power_init(void)
52{
53 PBCR2 &= ~0x0c00; /* GPIO for PB5 */
54 or_b(0x20, &PBIORL);
55 or_b(0x20, &PBDRL); /* hold power */
56#ifndef HAVE_BACKLIGHT
57 /* Disable backlight on backlight-modded Ondios when running
58 * a standard build (always on otherwise). */
59 PACR1 &= ~0x3000; /* Set PA14 (backlight control) to GPIO */
60 and_b(~0x40, &PADRH); /* drive it low */
61 or_b(0x40, &PAIORH); /* ..and output */
62#endif
63 PACR2 &= ~0x0030; /* GPIO for PA2 */
64 or_b(0x04, &PADRL); /* drive PA2 high for tuner disable */
65 or_b(0x04, &PAIORL); /* output for PA2 */
66}
67
68void power_off(void)
69{
70 disable_irq();
71#ifdef HAVE_BACKLIGHT
72 /* Switch off the light on backlight-modded Ondios */
73 backlight_hw_off();
74#endif
75 and_b(~0x20, &PBDRL);
76 or_b(0x20, &PBIORL);
77 while(1);
78}
diff --git a/firmware/target/sh/archos/ondio/powermgmt-ondio.c b/firmware/target/sh/archos/ondio/powermgmt-ondio.c
deleted file mode 100644
index dc3cab031f..0000000000
--- a/firmware/target/sh/archos/ondio/powermgmt-ondio.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Heikki Hannikainen, Uwe Freese
11 * Revisions copyright (C) 2005 by Gerald Van Baren
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "adc.h"
25#include "powermgmt.h"
26
27const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
28{
29 3100, 3450
30};
31
32const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
33{
34 2700, 2800
35};
36
37/* voltages (millivolt) of 0%, 10%, ... 100% */
38const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
39{
40 /* measured values */
41 { 2800, 3250, 3410, 3530, 3640, 3740, 3850, 3950, 4090, 4270, 4750 }, /* Alkaline */
42 { 3100, 3550, 3630, 3690, 3720, 3740, 3760, 3780, 3800, 3860, 4050 } /* NiMH */
43};
44
45#define BATTERY_SCALE_FACTOR 4849 /* average from 3 Ondios */
46/* full-scale ADC readout (2^10) in millivolt */
47
48/* Returns battery voltage from ADC [millivolts] */
49int _battery_voltage(void)
50{
51 return (adc_read(ADC_UNREG_POWER) * BATTERY_SCALE_FACTOR) >> 10;
52}
53
diff --git a/firmware/target/sh/archos/ondio/usb-ondio.c b/firmware/target/sh/archos/ondio/usb-ondio.c
deleted file mode 100644
index 093ebd3ad8..0000000000
--- a/firmware/target/sh/archos/ondio/usb-ondio.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include <stdbool.h>
23#include "adc.h"
24#include "ata_mmc.h"
25#include "cpu.h"
26#include "hwcompat.h"
27#include "system.h"
28#include "usb.h"
29
30int usb_detect(void)
31{
32 return (adc_read(ADC_USB_POWER) <= 512) ? USB_INSERTED : USB_EXTRACTED;
33}
34
35void usb_enable(bool on)
36{
37 if (on)
38 {
39 mmc_enable_int_flash_clock(!mmc_detect());
40
41 if (!(HW_MASK & MMC_CLOCK_POLARITY))
42 and_b(~0x20, &PBDRH); /* old circuit needs SCK1 = low while on USB */
43 or_b(0x20, &PADRL); /* enable USB */
44 and_b(~0x08, &PADRL); /* assert card detect */
45 }
46 else
47 {
48 if (!(HW_MASK & MMC_CLOCK_POLARITY))
49 or_b(0x20, &PBDRH); /* reset SCK1 = high for old circuit */
50 and_b(~0x20, &PADRL); /* disable USB */
51 or_b(0x08, &PADRL); /* deassert card detect */
52 }
53}
54
55void usb_init_device(void)
56{
57 PACR2 &= ~0x04C0; /* use PA3 (card detect) and PA5 (USB enabled) as GPIO */
58 and_b(~0x20, &PADRL); /* disable USB */
59 or_b(0x08, &PADRL); /* deassert card detect */
60 or_b(0x28, &PAIORL); /* output for USB enable and card detect */
61}
diff --git a/firmware/target/sh/archos/player/adc-target.h b/firmware/target/sh/archos/player/adc-target.h
deleted file mode 100644
index a26f79de28..0000000000
--- a/firmware/target/sh/archos/player/adc-target.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_
23
24#define NUM_ADC_CHANNELS 8
25
26#define ADC_BUTTON_LEFT 0
27#define ADC_BUTTON_MENU 1
28#define ADC_BUTTON_RIGHT 2
29#define ADC_BUTTON_PLAY 3
30#define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */
31#define ADC_EXT_POWER 7 /* The external power voltage, 0v or 2.7v */
32
33#define EXT_SCALE_FACTOR 14800
34
35#endif /* _ADC_TARGET_H_ */
diff --git a/firmware/target/sh/archos/player/backlight-target.h b/firmware/target/sh/archos/player/backlight-target.h
deleted file mode 100644
index b97d21a40f..0000000000
--- a/firmware/target/sh/archos/player/backlight-target.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24#include "config.h"
25#include "cpu.h"
26
27static inline bool backlight_hw_init(void)
28{
29 PACR1 &= ~0x3000; /* Set PA14 (backlight control) to GPIO */
30 and_b(~0x40, &PADRH); /* drive and set low */
31 or_b(0x40, &PAIORH); /* ..and output */
32 return true;
33}
34
35static inline void backlight_hw_on(void)
36{
37 and_b(~0x40, &PADRH); /* drive and set low */
38 or_b(0x40, &PAIORH);
39}
40
41static inline void backlight_hw_off(void)
42{
43 and_b(~0x40, &PAIORH); /* let it float (up) */
44}
45
46#endif
diff --git a/firmware/target/sh/archos/player/button-player.c b/firmware/target/sh/archos/player/button-player.c
deleted file mode 100644
index 3cf634853e..0000000000
--- a/firmware/target/sh/archos/player/button-player.c
+++ /dev/null
@@ -1,76 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "system.h"
24#include "button.h"
25#include "backlight.h"
26#include "adc.h"
27
28/*
29 Player hardware button hookup
30 =============================
31
32 Player
33 ------
34 LEFT: AN0
35 MENU: AN1
36 RIGHT: AN2
37 PLAY: AN3
38
39 STOP: PA11
40 ON: PA5
41
42 All buttons are low active
43*/
44
45void button_init_device(void)
46{
47 /* set PA5 and PA11 as input pins */
48 PACR1 &= 0xff3f; /* PA11MD = 00 */
49 PACR2 &= 0xfbff; /* PA5MD = 0 */
50 PAIOR &= ~0x0820; /* Inputs */
51}
52
53int button_read_device(void)
54{
55 int btn = BUTTON_NONE;
56 int data;
57
58 /* buttons are active low */
59 if (adc_read(ADC_BUTTON_LEFT) < 0x180)
60 btn = BUTTON_LEFT;
61 if (adc_read(ADC_BUTTON_MENU) < 0x180)
62 btn |= BUTTON_MENU;
63 if (adc_read(ADC_BUTTON_RIGHT) < 0x180)
64 btn |= BUTTON_RIGHT;
65 if (adc_read(ADC_BUTTON_PLAY) < 0x180)
66 btn |= BUTTON_PLAY;
67
68 /* check port A pins for ON and STOP */
69 data = PADR;
70 if ( !(data & 0x0020) )
71 btn |= BUTTON_ON;
72 if ( !(data & 0x0800) )
73 btn |= BUTTON_STOP;
74
75 return btn;
76}
diff --git a/firmware/target/sh/archos/player/button-target.h b/firmware/target/sh/archos/player/button-target.h
deleted file mode 100644
index dd85d731be..0000000000
--- a/firmware/target/sh/archos/player/button-target.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _BUTTON_TARGET_H_
23#define _BUTTON_TARGET_H_
24
25#define HAS_SERIAL_REMOTE
26
27 /* Main unit's buttons */
28#define BUTTON_ON 0x00000001
29#define BUTTON_STOP 0x00000002
30
31#define BUTTON_LEFT 0x00000004
32#define BUTTON_RIGHT 0x00000008
33#define BUTTON_PLAY 0x00000010
34#define BUTTON_MENU 0x00000020
35
36#define BUTTON_MAIN (BUTTON_ON|BUTTON_STOP|BUTTON_LEFT|BUTTON_RIGHT\
37 |BUTTON_PLAY|BUTTON_MENU)
38
39 /* Remote control's buttons */
40#define BUTTON_RC_PLAY 0x00100000
41#define BUTTON_RC_STOP 0x00080000
42
43#define BUTTON_RC_LEFT 0x00040000
44#define BUTTON_RC_RIGHT 0x00020000
45#define BUTTON_RC_VOL_UP 0x00010000
46#define BUTTON_RC_VOL_DOWN 0x00008000
47
48#define BUTTON_REMOTE (BUTTON_RC_PLAY|BUTTON_RC_STOP\
49 |BUTTON_RC_LEFT|BUTTON_RC_RIGHT\
50 |BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN)
51
52#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/sh/archos/player/hwcompat-player.c b/firmware/target/sh/archos/player/hwcompat-player.c
deleted file mode 100644
index 49a333d708..0000000000
--- a/firmware/target/sh/archos/player/hwcompat-player.c
+++ /dev/null
@@ -1,28 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include <stdbool.h>
23#include "hwcompat.h"
24
25bool is_new_player(void)
26{
27 return (ROM_VERSION > 449) || (ROM_VERSION == 116);
28}
diff --git a/firmware/target/sh/archos/player/lcd-as-player.S b/firmware/target/sh/archos/player/lcd-as-player.S
deleted file mode 100644
index 19f812c1c7..0000000000
--- a/firmware/target/sh/archos/player/lcd-as-player.S
+++ /dev/null
@@ -1,274 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 * Based on the work of Alan Korr and Jörg Hohensohn
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "cpu.h"
25
26#define LCDR (PBDR_ADDR+1)
27
28#define LCD_DS 1 /* PB0 = 1 --- 0001 --- LCD-DS */
29#define LCD_CS 2 /* PB1 = 1 --- 0010 --- /LCD-CS */
30#define LCD_SD 4 /* PB2 = 1 --- 0100 --- LCD-SD */
31#define LCD_SC 8 /* PB3 = 1 --- 1000 --- LCD-SC */
32
33/*
34 * About /CS,DS,SC,SD
35 * ------------------
36 *
37 * LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
38 *
39 * - /CS -> Chip Selection line :
40 * 0 : LCD chipset is activated.
41 * - DS -> Data Selection line, latched at the rising edge
42 * of the 8th serial clock (*) :
43 * 0 : instruction register,
44 * 1 : data register;
45 * - SC -> Serial Clock line (SDA).
46 * - SD -> Serial Data line (SCK), latched at the rising edge
47 * of each serial clock (*).
48 *
49 * _ _
50 * /CS \ /
51 * \______________________________________________________/
52 * _____ ____ ____ ____ ____ ____ ____ ____ ____ _____
53 * SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
54 * _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
55 *
56 * _____ _ _ _ _ _ _ _ ________
57 * SC \ * \ * \ * \ * \ * \ * \ * \ *
58 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
59 * _ _________________________________________________________
60 * DS \/
61 * _/\_________________________________________________________
62 *
63 */
64
65 .section .icode,"ax",@progbits
66
67 .align 2
68 .global _lcd_write_command
69 .type _lcd_write_command,@function
70
71/* Write a command byte to the lcd controller
72 *
73 * Arguments:
74 * r4 - command byte (int)
75 *
76 * Register usage:
77 * r0 - scratch
78 * r1 - command byte (copied)
79 * r2 - precalculated port value (CS, DS and SC low, SD high)
80 * r3 - lcd port address
81 * r5 - 1 (byte count for reuse of the loop in _lcd_write_data)
82 */
83
84_lcd_write_command:
85 mov.l .lcdr, r3 /* put lcd data port address in r3 */
86 mov r4, r1 /* copy data byte to r1 */
87 mov #0, r5 /* fake end address - stop after first iteration */
88
89 /* This code will fail if an interrupt changes the contents of PBDRL.
90 * If so, we must disable the interrupt here. */
91
92 mov.b @r3, r0 /* r0 = PBDRL */
93 or #(LCD_SD), r0 /* r0 |= LCD_SD */
94 and #(~(LCD_CS|LCD_DS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
95
96 bra .single_transfer /* jump into the transfer loop */
97 mov r0, r2
98
99
100 .align 2
101 .global _lcd_write_command_e
102 .type _lcd_write_command_e,@function
103
104/* Write a command byte and a data byte to the lcd controller
105 *
106 * Arguments:
107 * r4 - command byte
108 * r5 - data byte
109 *
110 * Register usage:
111 * r0 - scratch
112 * r1 - command/data byte (copied)
113 * r2 - precalculated port value (CS, DS and SC low, SD high)
114 * r3 - lcd port address
115 * r5 - fake end address
116 * r6 - data byte (saved)
117 * r7 - saved pr
118 */
119
120_lcd_write_command_e:
121 mov.l .lcdr, r3 /* put lcd data port address in r3 */
122 mov r4, r1 /* copy data byte to r1 */
123 mov r5, r6
124 mov #0, r5 /* fake end address - stop after first iteration */
125
126 /* This code will fail if an interrupt changes the contents of PBDRL.
127 * If so, we must disable the interrupt here. */
128
129 mov.b @r3, r0 /* r0 = PBDRL */
130 or #(LCD_SD), r0 /* r0 |= LCD_SD */
131 and #(~(LCD_CS|LCD_DS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
132
133 sts pr, r7
134 bsr .single_transfer /* jump into the transfer loop */
135 mov r0, r2
136
137 lds r7, pr
138 mov r6, r1
139 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
140 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
141 bra .single_transfer /* jump into the transfer loop */
142 mov r0, r2
143
144
145 .align 2
146 .global _lcd_write_data
147 .type _lcd_write_data,@function
148
149
150/* A high performance function to write data to the display,
151 * one or multiple bytes.
152 *
153 * Arguments:
154 * r4 - data address
155 * r5 - byte count
156 *
157 * Register usage:
158 * r0 - scratch
159 * r1 - current data byte
160 * r2 - precalculated port value (CS and SC low, DS and SD high)
161 * r3 - lcd port address
162 * r4 - current address
163 * r5 - end address
164 */
165
166_lcd_write_data:
167 mov.l .lcdr, r3 /* put lcd data port address in r3 */
168 add r4, r5 /* end address */
169
170 /* This code will fail if an interrupt changes the contents of PBDRL.
171 * If so, we must disable the interrupt here. If disabling interrupts
172 * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on
173 * recorders)is undesirable, the loop has to be rewritten to
174 * disable/precalculate/transfer/enable for each iteration. However,
175 * this would significantly decrease performance. */
176
177 mov.b @r3, r0 /* r0 = PBDRL */
178 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
179 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
180 mov r0, r2
181
182 .align 2
183.multi_transfer:
184 mov.b @r4+, r1 /* load data byte from memory */
185
186.single_transfer:
187 shll16 r1 /* shift data to most significant byte */
188 shll8 r1
189
190 shll r1 /* shift the msb into carry */
191 mov r2, r0 /* copy precalculated port value */
192 bt 1f /* data bit = 1? */
193 and #(~LCD_SD), r0 /* no: r0 &= ~LCD_SD */
1941:
195 shll r1 /* next shift here for alignment */
196 mov.b r0, @r3 /* set data to port */
197 or #(LCD_SC), r0 /* rise SC (independent of SD level) */
198 mov.b r0, @r3 /* set to port */
199
200 mov r2, r0
201 bt 1f
202 and #(~LCD_SD), r0
2031:
204 mov.b r0, @r3
205 or #(LCD_SC), r0
206 mov.b r0, @r3
207
208 shll r1
209 mov r2, r0
210 bt 1f
211 and #(~LCD_SD), r0
2121:
213 shll r1
214 mov.b r0, @r3
215 or #(LCD_SC), r0
216 mov.b r0, @r3
217
218 mov r2, r0
219 bt 1f
220 and #(~LCD_SD), r0
2211:
222 mov.b r0, @r3
223 or #(LCD_SC), r0
224 mov.b r0, @r3
225
226 shll r1
227 mov r2, r0
228 bt 1f
229 and #(~LCD_SD), r0
2301:
231 shll r1
232 mov.b r0, @r3
233 or #(LCD_SC), r0
234 mov.b r0, @r3
235
236 mov r2, r0
237 bt 1f
238 and #(~LCD_SD), r0
2391:
240 mov.b r0, @r3
241 or #(LCD_SC), r0
242 mov.b r0, @r3
243
244 shll r1
245 mov r2, r0
246 bt 1f
247 and #(~LCD_SD), r0
2481:
249 shll r1
250 mov.b r0, @r3
251 or #(LCD_SC), r0
252 mov.b r0, @r3
253
254 mov r2, r0
255 bt 1f
256 and #(~LCD_SD), r0
2571:
258 mov.b r0, @r3
259 or #(LCD_SC), r0
260 mov.b r0, @r3
261
262 cmp/hi r4, r5 /* some blocks left? */
263 bt .multi_transfer
264
265 or #(LCD_CS|LCD_DS|LCD_SD|LCD_SC),r0 /* restore port */
266 rts
267 mov.b r0, @r3
268
269 /* This is the place to reenable the interrupts, if we have disabled
270 * them. See above. */
271
272 .align 2
273.lcdr:
274 .long LCDR
diff --git a/firmware/target/sh/archos/player/lcd-player.c b/firmware/target/sh/archos/player/lcd-player.c
deleted file mode 100644
index 95b0164bf5..0000000000
--- a/firmware/target/sh/archos/player/lcd-player.c
+++ /dev/null
@@ -1,213 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 * Based on the work of Alan Korr, Kjell Ericson and others
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include <string.h>
24#include "config.h"
25#include "system.h"
26#include "kernel.h"
27#include "hwcompat.h"
28#include "lcd.h"
29#include "lcd-charcell.h"
30
31#define OLD_LCD_DDRAM ((char)0xB0) /* Display data (characters) */
32#define OLD_LCD_CGRAM ((char)0x80) /* Character generator (patterns) */
33#define OLD_LCD_ICONRAM ((char)0xE0)
34#define OLD_LCD_CONTRAST_SET ((char)0xA8)
35#define OLD_LCD_NOP ((char)0x00)
36#define OLD_LCD_SYSTEM_SET ((char)0x60)
37#define OLD_LCD_SET_POWER_SAVE_OSC_CONTROL ((char)0x40)
38#define OLD_LCD_SET_POWER_CONTROL ((char)0x50)
39#define OLD_LCD_SET_DISPLAY_CONTROL ((char)0x30)
40
41#define NEW_LCD_DDRAM ((char)0x80) /* Display data (characters) */
42#define NEW_LCD_CGRAM ((char)0xC0) /* Character generator (patterns) */
43#define NEW_LCD_ICONRAM ((char)0x40)
44#define NEW_LCD_CONTRAST_SET ((char)0x50)
45#define NEW_LCD_NOP ((char)0x00)
46#define NEW_LCD_FUNCTION_SET ((char)0x10)
47#define NEW_LCD_SET_POWER_SAVE_OSC_CONTROL ((char)0x0c)
48#define NEW_LCD_SET_POWER_CONTROL_REG ((char)0x20)
49#define NEW_LCD_SET_DISPLAY_CONTROL ((char)0x28)
50#define NEW_LCD_SET_DOUBLE_HEIGHT ((char)0x08)
51
52#define LCD_CURSOR(x,y) ((char)(lcd_ddram+((y)*16+(x))))
53#define LCD_ICON(i) ((char)(lcd_iconram+i))
54
55static bool new_lcd;
56static char lcd_contrast_set;
57static char lcd_ddram;
58static char lcd_cgram;
59static char lcd_iconram;
60
61/* hardware configuration */
62
63int lcd_default_contrast(void)
64{
65 return 30;
66}
67
68void lcd_set_contrast(int val)
69{
70 lcd_write_command_e(lcd_contrast_set, 31 - val);
71}
72
73/* charcell specific */
74
75void lcd_double_height(bool on)
76{
77 if(new_lcd)
78 lcd_write_command(on ? (NEW_LCD_SET_DOUBLE_HEIGHT|1)
79 : NEW_LCD_SET_DOUBLE_HEIGHT);
80}
81
82void lcd_icon(int icon, bool enable)
83{
84 static const struct {
85 char pos;
86 char mask;
87 } icontab[] = {
88 { 0, 0x02}, { 0, 0x08}, { 0, 0x04}, { 0, 0x10}, /* Battery */
89 { 2, 0x04}, /* USB */
90 { 3, 0x10}, /* Play */
91 { 4, 0x10}, /* Record */
92 { 5, 0x02}, /* Pause */
93 { 5, 0x10}, /* Audio */
94 { 6, 0x02}, /* Repeat */
95 { 7, 0x01}, /* 1 */
96 { 9, 0x04}, /* Volume */
97 { 9, 0x02}, { 9, 0x01}, {10, 0x08}, {10, 0x04}, {10, 0x01}, /* Vol 1-5 */
98 {10, 0x10}, /* Param */
99 };
100 static char icon_mirror[11] = {0};
101
102 int pos, mask;
103
104 pos = icontab[icon].pos;
105 mask = icontab[icon].mask;
106
107 if (enable)
108 icon_mirror[pos] |= mask;
109 else
110 icon_mirror[pos] &= ~mask;
111
112 lcd_write_command_e(LCD_ICON(pos), icon_mirror[pos]);
113}
114
115/* device specific init */
116void lcd_init_device(void)
117{
118 unsigned char data_vector[64];
119
120 /* LCD init for cold start */
121 PBCR2 &= 0xff00; /* Set PB0..PB3 to GPIO */
122 or_b(0x0f, &PBDRL); /* ... high */
123 or_b(0x0f, &PBIORL); /* ... and output */
124
125 new_lcd = is_new_player();
126
127 if (new_lcd)
128 {
129 lcd_contrast_set = NEW_LCD_CONTRAST_SET;
130 lcd_ddram = NEW_LCD_DDRAM;
131 lcd_cgram = NEW_LCD_CGRAM;
132 lcd_iconram = NEW_LCD_ICONRAM;
133
134 lcd_write_command(NEW_LCD_FUNCTION_SET|1); /* CGRAM selected */
135 lcd_write_command_e(NEW_LCD_CONTRAST_SET, 0x08);
136 lcd_write_command(NEW_LCD_SET_POWER_SAVE_OSC_CONTROL|2);
137 /* oscillator on */
138 lcd_write_command(NEW_LCD_SET_POWER_CONTROL_REG|7);
139 /* opamp buffer + voltage booster on */
140
141 memset(data_vector, 0x20, 64);
142 lcd_write_command(NEW_LCD_DDRAM); /* Set DDRAM address */
143 lcd_write_data(data_vector, 64); /* all spaces */
144
145 memset(data_vector, 0, 64);
146 lcd_write_command(NEW_LCD_CGRAM); /* Set CGRAM address */
147 lcd_write_data(data_vector, 64); /* zero out */
148 lcd_write_command(NEW_LCD_ICONRAM); /* Set ICONRAM address */
149 lcd_write_data(data_vector, 16); /* zero out */
150
151 lcd_write_command(NEW_LCD_SET_DISPLAY_CONTROL|1); /* display on */
152 }
153 else
154 {
155 lcd_contrast_set = OLD_LCD_CONTRAST_SET;
156 lcd_ddram = OLD_LCD_DDRAM;
157 lcd_cgram = OLD_LCD_CGRAM;
158 lcd_iconram = OLD_LCD_ICONRAM;
159
160 lcd_write_command(OLD_LCD_NOP);
161 lcd_write_command(OLD_LCD_SYSTEM_SET|1); /* CGRAM selected */
162 lcd_write_command(OLD_LCD_SET_POWER_SAVE_OSC_CONTROL|2);
163 /* oscillator on */
164 lcd_write_command(OLD_LCD_SET_POWER_CONTROL|7);
165 /* voltage regulator, voltage follower and booster on */
166
167 memset(data_vector, 0x24, 13);
168 lcd_write_command(OLD_LCD_DDRAM); /* Set DDRAM address */
169 lcd_write_data(data_vector, 13); /* all spaces */
170 lcd_write_command(OLD_LCD_DDRAM + 0x10);
171 lcd_write_data(data_vector, 13);
172 lcd_write_command(OLD_LCD_DDRAM + 0x20);
173 lcd_write_data(data_vector, 13);
174
175 memset(data_vector, 0, 32);
176 lcd_write_command(OLD_LCD_CGRAM); /* Set CGRAM address */
177 lcd_write_data(data_vector, 32); /* zero out */
178 lcd_write_command(OLD_LCD_ICONRAM); /* Set ICONRAM address */
179 lcd_write_data(data_vector, 13); /* zero out */
180 lcd_write_command(OLD_LCD_ICONRAM + 0x10);
181 lcd_write_data(data_vector, 13);
182
183 sleep(HZ/10);
184 lcd_write_command(OLD_LCD_SET_DISPLAY_CONTROL|1); /* display on */
185 }
186 lcd_set_contrast(lcd_default_contrast());
187}
188
189/*** Update functions ***/
190
191void lcd_update(void)
192{
193 int y;
194
195 for (y = 0; y < lcd_pattern_count; y++)
196 {
197 if (lcd_patterns[y].count > 0)
198 {
199 lcd_write_command(lcd_cgram | (y << 3));
200 lcd_write_data(lcd_patterns[y].pattern, 7);
201 }
202 }
203 for (y = 0; y < LCD_HEIGHT; y++)
204 {
205 lcd_write_command(LCD_CURSOR(0, y));
206 lcd_write_data(lcd_charbuffer[y], LCD_WIDTH);
207 }
208 if (lcd_cursor.visible)
209 {
210 lcd_write_command_e(LCD_CURSOR(lcd_cursor.x, lcd_cursor.y),
211 lcd_cursor.hw_char);
212 }
213}
diff --git a/firmware/target/sh/archos/player/power-player.c b/firmware/target/sh/archos/player/power-player.c
deleted file mode 100644
index 33f5959021..0000000000
--- a/firmware/target/sh/archos/player/power-player.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include <stdbool.h>
24#include "kernel.h"
25#include "system.h"
26#include "power.h"
27#include "usb.h"
28
29void power_init(void)
30{
31}
32
33unsigned int power_input_status(void)
34{
35 /* Player */
36 return ((PADR & 1) == 0) ?
37 POWER_INPUT_MAIN_CHARGER : POWER_INPUT_NONE;
38}
39
40void ide_power_enable(bool on)
41{
42 bool touched = false;
43
44 if(on)
45 {
46 or_b(0x10, &PBDRL);
47 touched = true;
48 }
49#ifdef HAVE_ATA_POWER_OFF
50 if(!on)
51 {
52 and_b(~0x10, &PBDRL);
53 touched = true;
54 }
55#endif /* HAVE_ATA_POWER_OFF */
56
57/* late port preparation, else problems with read/modify/write
58 of other bits on same port, while input and floating high */
59 if (touched)
60 {
61 or_b(0x10, &PBIORL); /* PB4 is an output */
62 PBCR2 &= ~0x0300; /* GPIO for PB4 */
63 }
64}
65
66
67bool ide_powered(void)
68{
69 /* This is not correct for very old players, since these are unable to
70 * control hd power. However, driving the pin doesn't hurt, because it
71 * is not connected anywhere */
72 if ((PBCR2 & 0x0300) || !(PBIORL & 0x10)) /* not configured for output */
73 return false; /* would be floating low, disk off */
74 else
75 return (PBDRL & 0x10) != 0;
76}
77
78void power_off(void)
79{
80 disable_irq();
81 and_b(~0x08, &PADRH);
82 or_b(0x08, &PAIORH);
83 while(1);
84}
diff --git a/firmware/target/sh/archos/player/powermgmt-player.c b/firmware/target/sh/archos/player/powermgmt-player.c
deleted file mode 100644
index 8aa03d88a5..0000000000
--- a/firmware/target/sh/archos/player/powermgmt-player.c
+++ /dev/null
@@ -1,64 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Heikki Hannikainen, Uwe Freese
11 * Revisions copyright (C) 2005 by Gerald Van Baren
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "adc.h"
25#include "powermgmt.h"
26
27const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
28{
29 4750
30};
31
32const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
33{
34 4400
35};
36
37/* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */
38const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
39{
40 /* original values were taken directly after charging, but it should show
41 100% after turning off the device for some hours, too */
42 { 4500, 4810, 4910, 4970, 5030, 5070, 5120, 5140, 5170, 5250, 5400 }
43 /* orig. values: ...,5280,5600 */
44};
45
46/* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */
47const unsigned short percent_to_volt_charge[11] =
48{
49 /* values guessed, see
50 http://www.seattlerobotics.org/encoder/200210/LiIon2.pdf until someone
51 measures voltages over a charging cycle */
52 4760, 5440, 5510, 5560, 5610, 5640, 5660, 5760, 5820, 5840, 5850 /* NiMH */
53};
54
55#define BATTERY_SCALE_FACTOR 6703
56/* full-scale ADC readout (2^10) in millivolt */
57
58/* Returns battery voltage from ADC [millivolts] */
59int _battery_voltage(void)
60{
61 return (adc_read(ADC_UNREG_POWER) * BATTERY_SCALE_FACTOR) >> 10;
62}
63
64
diff --git a/firmware/target/sh/archos/player/usb-player.c b/firmware/target/sh/archos/player/usb-player.c
deleted file mode 100644
index 76f2a2dcdd..0000000000
--- a/firmware/target/sh/archos/player/usb-player.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include <stdbool.h>
23#include "cpu.h"
24#include "system.h"
25#include "usb.h"
26
27int usb_detect(void)
28{
29 return (PADR & 0x8000) ? USB_EXTRACTED : USB_INSERTED;
30}
31
32void usb_enable(bool on)
33{
34 if(on)
35 and_b(~0x04, &PADRH);
36 else
37 or_b(0x04, &PADRH);
38}
39
40void usb_init_device(void)
41{
42 or_b(0x04, &PADRH);
43 or_b(0x04, &PAIORH);
44}
diff --git a/firmware/target/sh/archos/recorder/adc-target.h b/firmware/target/sh/archos/recorder/adc-target.h
deleted file mode 100644
index 06c48a5021..0000000000
--- a/firmware/target/sh/archos/recorder/adc-target.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_
23
24#define NUM_ADC_CHANNELS 8
25
26/* normal JBR channel assignment */
27#define ADC_BATTERY 0 /* Battery voltage always reads 0x3FF due to
28 silly scaling */
29#define ADC_CHARGE_REGULATOR 1 /* Regulator reference voltage, should read
30 about 0x1c0 when charging, else 0x3FF */
31#define ADC_USB_POWER 2 /* USB, reads 0x3FF when USB is inserted */
32#define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different
33 voltages for different keys */
34#define ADC_BUTTON_ROW2 5 /* Used for scanning the keys, different
35 voltages for different keys */
36#define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */
37#define ADC_EXT_POWER 7 /* The external power voltage, 0v or 2.7v */
38
39#define EXT_SCALE_FACTOR 14800
40
41#endif /* _ADC_TARGET_H_ */
diff --git a/firmware/target/sh/archos/recorder/backlight-target.h b/firmware/target/sh/archos/recorder/backlight-target.h
deleted file mode 100644
index c3dd395eca..0000000000
--- a/firmware/target/sh/archos/recorder/backlight-target.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24#include "config.h"
25#include "rtc.h"
26
27#define backlight_hw_init() true
28
29static inline void backlight_hw_on(void)
30{
31 rtc_write(0x13, 0x10); /* 32 kHz square wave */
32 rtc_write(0x0a, rtc_read(0x0a) | 0x40); /* Enable square wave */
33}
34
35static inline void backlight_hw_off(void)
36{
37 /* While on, backlight is flashing at 32 kHz. If the square wave output
38 is disabled while the backlight is lit, it will become constantly lit,
39 (brighter) and slowly fade. This resets the square wave counter and
40 results in the unlit state */
41 unsigned char rtc_0a = rtc_read(0x0a) & ~0x40;
42 rtc_write(0x0a, rtc_0a); /* Disable square wave */
43 rtc_write(0x13, 0xF0); /* 1 Hz square wave */
44 rtc_write(0x0a, rtc_0a | 0x40); /* Enable square wave */
45
46 /* When the square wave output is disabled in the unlit state,
47 the backlight stays off */
48 rtc_write(0x0a, rtc_0a);
49}
50
51#endif
diff --git a/firmware/target/sh/archos/recorder/button-recorder.c b/firmware/target/sh/archos/recorder/button-recorder.c
deleted file mode 100644
index 5e5e67487d..0000000000
--- a/firmware/target/sh/archos/recorder/button-recorder.c
+++ /dev/null
@@ -1,110 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "system.h"
24#include "button.h"
25#include "backlight.h"
26#include "adc.h"
27
28/*
29 Recorder hardware button hookup
30 ===============================
31
32 F1, F2, F3, UP: connected to AN4 through a resistor network
33 DOWN, PLAY, LEFT, RIGHT: likewise connected to AN5
34
35 The voltage on AN4/ AN5 depends on which keys (or key combo) is pressed
36
37 ON: PB8, low active
38 OFF: PB4, low active
39*/
40
41void button_init_device(void)
42{
43 /* Set PB4 and PB8 as input pins */
44 PBCR1 &= 0xfffc; /* PB8MD = 00 */
45 PBCR2 &= 0xfcff; /* PB4MD = 00 */
46 PBIOR &= ~0x0110; /* Inputs */
47}
48
49int button_read_device(void)
50{
51 int btn = BUTTON_NONE;
52 int data;
53 static int off_button_count = 0;
54
55 /* check F1..F3 and UP */
56 data = adc_read(ADC_BUTTON_ROW1);
57 if (data >= 250)
58 {
59 if (data >= 700)
60 if (data >= 900)
61 btn = BUTTON_F3;
62 else
63 btn = BUTTON_UP;
64 else
65 if (data >= 500)
66 btn = BUTTON_F2;
67 else
68 btn = BUTTON_F1;
69 }
70
71 /* Some units have mushy keypads, so pressing UP also activates
72 the Left/Right buttons. Let's combat that by skipping the AN5
73 checks when UP is pressed. */
74 if(!(btn & BUTTON_UP))
75 {
76 /* check DOWN, PLAY, LEFT, RIGHT */
77 data = adc_read(ADC_BUTTON_ROW2);
78 if (data >= 250)
79 {
80 if (data >= 700)
81 if (data >= 900)
82 btn |= BUTTON_DOWN;
83 else
84 btn |= BUTTON_PLAY;
85 else
86 if (data >= 500)
87 btn |= BUTTON_LEFT;
88 else
89 btn |= BUTTON_RIGHT;
90 }
91 }
92
93 /* check port B pins for ON and OFF */
94 data = PBDR;
95 if ((data & 0x0100) == 0)
96 btn |= BUTTON_ON;
97
98 if ((data & 0x0010) == 0)
99 {
100 /* When the batteries are low, the low-battery shutdown logic causes
101 * spurious OFF events due to voltage fluctuation on some units.
102 * Only accept OFF when read several times in sequence. */
103 if (++off_button_count > 3)
104 btn |= BUTTON_OFF;
105 }
106 else
107 off_button_count = 0;
108
109 return btn;
110}
diff --git a/firmware/target/sh/archos/recorder/button-target.h b/firmware/target/sh/archos/recorder/button-target.h
deleted file mode 100644
index f387fafe10..0000000000
--- a/firmware/target/sh/archos/recorder/button-target.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _BUTTON_TARGET_H_
23#define _BUTTON_TARGET_H_
24
25#define HAS_SERIAL_REMOTE
26
27 /* Main unit's buttons */
28#define BUTTON_ON 0x00000001
29#define BUTTON_OFF 0x00000002
30
31#define BUTTON_LEFT 0x00000004
32#define BUTTON_RIGHT 0x00000008
33#define BUTTON_UP 0x00000010
34#define BUTTON_DOWN 0x00000020
35
36#define BUTTON_PLAY 0x00000040
37
38#define BUTTON_F1 0x00000080
39#define BUTTON_F2 0x00000100
40#define BUTTON_F3 0x00000200
41
42#define BUTTON_MAIN (BUTTON_ON|BUTTON_OFF|BUTTON_LEFT|BUTTON_RIGHT\
43 |BUTTON_UP|BUTTON_DOWN|BUTTON_PLAY\
44 |BUTTON_F1|BUTTON_F2|BUTTON_F3)
45
46 /* Remote control's buttons */
47#define BUTTON_RC_PLAY 0x00100000
48#define BUTTON_RC_STOP 0x00080000
49
50#define BUTTON_RC_LEFT 0x00040000
51#define BUTTON_RC_RIGHT 0x00020000
52#define BUTTON_RC_VOL_UP 0x00010000
53#define BUTTON_RC_VOL_DOWN 0x00008000
54
55#define BUTTON_REMOTE (BUTTON_RC_PLAY|BUTTON_RC_STOP\
56 |BUTTON_RC_LEFT|BUTTON_RC_RIGHT\
57 |BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN)
58
59#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/sh/archos/recorder/power-recorder.c b/firmware/target/sh/archos/recorder/power-recorder.c
deleted file mode 100644
index 48cfdc1e17..0000000000
--- a/firmware/target/sh/archos/recorder/power-recorder.c
+++ /dev/null
@@ -1,107 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include <stdbool.h>
24#include "adc.h"
25#include "kernel.h"
26#include "system.h"
27#include "power.h"
28#include "powermgmt-target.h"
29#include "usb.h"
30
31static bool charger_on;
32
33void power_init(void)
34{
35 PBCR2 &= ~0x0c00; /* GPIO for PB5 */
36 or_b(0x20, &PBIORL); /* Set charging control bit to output */
37 charger_enable(false); /* Default to charger OFF */
38}
39
40unsigned int power_input_status(void)
41{
42 /* Recorder */
43 return (adc_read(ADC_EXT_POWER) > 0x100) ?
44 POWER_INPUT_MAIN_CHARGER : POWER_INPUT_NONE;
45}
46
47void charger_enable(bool on)
48{
49 if(on)
50 {
51 and_b(~0x20, &PBDRL);
52 }
53 else
54 {
55 or_b(0x20, &PBDRL);
56 }
57
58 charger_on = on;
59}
60
61bool charger_enabled(void)
62{
63 return charger_on;
64}
65
66void ide_power_enable(bool on)
67{
68 bool touched = false;
69
70 if(on)
71 {
72 or_b(0x20, &PADRL);
73 touched = true;
74 }
75#ifdef HAVE_ATA_POWER_OFF
76 if(!on)
77 {
78 and_b(~0x20, &PADRL);
79 touched = true;
80 }
81#endif /* HAVE_ATA_POWER_OFF */
82
83/* late port preparation, else problems with read/modify/write
84 of other bits on same port, while input and floating high */
85 if (touched)
86 {
87 or_b(0x20, &PAIORL); /* PA5 is an output */
88 PACR2 &= 0xFBFF; /* GPIO for PA5 */
89 }
90}
91
92
93bool ide_powered(void)
94{
95 if ((PACR2 & 0x0400) || !(PAIORL & 0x20)) /* not configured for output */
96 return true; /* would be floating high, disk on */
97 else
98 return (PADRL & 0x20) != 0;
99}
100
101void power_off(void)
102{
103 disable_irq();
104 and_b(~0x10, &PBDRL);
105 or_b(0x10, &PBIORL);
106 while(1);
107}
diff --git a/firmware/target/sh/archos/recorder/powermgmt-recorder.c b/firmware/target/sh/archos/recorder/powermgmt-recorder.c
deleted file mode 100644
index ca6067a4cc..0000000000
--- a/firmware/target/sh/archos/recorder/powermgmt-recorder.c
+++ /dev/null
@@ -1,501 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Heikki Hannikainen, Uwe Freese
11 * Revisions copyright (C) 2005 by Gerald Van Baren
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22#include "config.h"
23#include "system.h"
24#include <stdio.h>
25#include "debug.h"
26#include "storage.h"
27#include "adc.h"
28#include "power.h"
29#include "powermgmt.h"
30
31const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
32{
33 4750
34};
35
36const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
37{
38 4400
39};
40
41/* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */
42const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
43{
44 /* original values were taken directly after charging, but it should show
45 100% after turning off the device for some hours, too */
46 { 4500, 4810, 4910, 4970, 5030, 5070, 5120, 5140, 5170, 5250, 5400 }
47 /* orig. values: ...,5280,5600 */
48};
49
50/* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */
51const unsigned short percent_to_volt_charge[11] =
52{
53 /* values guessed, see
54 http://www.seattlerobotics.org/encoder/200210/LiIon2.pdf until someone
55 measures voltages over a charging cycle */
56 4760, 5440, 5510, 5560, 5610, 5640, 5660, 5760, 5820, 5840, 5850 /* NiMH */
57};
58
59#define BATTERY_SCALE_FACTOR 6620
60/* full-scale ADC readout (2^10) in millivolt */
61
62/* Returns battery voltage from ADC [millivolts] */
63int _battery_voltage(void)
64{
65 return (adc_read(ADC_UNREG_POWER) * BATTERY_SCALE_FACTOR) >> 10;
66}
67
68void powermgmt_init_target(void)
69{
70}
71
72/** Charger control **/
73#ifdef CHARGING_DEBUG_FILE
74#include "file.h"
75#define DEBUG_FILE_NAME "/powermgmt.csv"
76#define DEBUG_MESSAGE_LEN 133
77static char debug_message[DEBUG_MESSAGE_LEN];
78static int fd = -1; /* write debug information to this file */
79static int wrcount = 0;
80#endif /* CHARGING_DEBUG_FILE */
81
82/*
83 * For a complete description of the charging algorithm read
84 * docs/CHARGING_ALGORITHM.
85 */
86int long_delta; /* long term delta battery voltage */
87int short_delta; /* short term delta battery voltage */
88static bool disk_activity_last_cycle = false; /* flag set to aid charger time
89 * calculation */
90char power_message[POWER_MESSAGE_LEN] = ""; /* message that's shown in
91 debug menu */
92 /* percentage at which charging
93 starts */
94int powermgmt_last_cycle_startstop_min = 0; /* how many minutes ago was the
95 charging started or
96 stopped? */
97int powermgmt_last_cycle_level = 0; /* which level had the
98 batteries at this time? */
99int trickle_sec = 0; /* how many seconds should the
100 charger be enabled per
101 minute for trickle
102 charging? */
103int pid_p = 0; /* PID proportional term */
104int pid_i = 0; /* PID integral term */
105
106static unsigned int target_voltage = TRICKLE_VOLTAGE; /* desired topoff/trickle
107 * voltage level */
108static int charge_max_time_idle = 0; /* max. charging duration, calculated at
109 * beginning of charging */
110static int charge_max_time_now = 0; /* max. charging duration including
111 * hdd activity */
112static int minutes_disk_activity = 0; /* count minutes of hdd use during
113 * charging */
114static int last_disk_activity = CHARGE_END_LONGD + 1; /* last hdd use x mins ago */
115
116#ifdef CHARGING_DEBUG_FILE
117static void debug_file_close(void)
118{
119 if (fd >= 0) {
120 close(fd);
121 fd = -1;
122 }
123}
124
125static void debug_file_log(void)
126{
127 if (usb_inserted()) {
128 /* It is probably too late to close the file but we can try... */
129 debug_file_close();
130 }
131 else if (fd < 0) {
132 fd = open(DEBUG_FILE_NAME, O_WRONLY | O_APPEND | O_CREAT, 0666);
133
134 if (fd >= 0) {
135 snprintf(debug_message, DEBUG_MESSAGE_LEN,
136 "cycle_min, bat_millivolts, bat_percent, chgr_state"
137 " ,charge_state, pid_p, pid_i, trickle_sec\n");
138 write(fd, debug_message, strlen(debug_message));
139 wrcount = 99; /* force a flush */
140 }
141 }
142 else {
143 snprintf(debug_message, DEBUG_MESSAGE_LEN,
144 "%d, %d, %d, %d, %d, %d, %d, %d\n",
145 powermgmt_last_cycle_startstop_min, battery_voltage(),
146 battery_level(), charger_input_state, charge_state,
147 pid_p, pid_i, trickle_sec);
148 write(fd, debug_message, strlen(debug_message));
149 wrcount++;
150 }
151}
152
153static void debug_file_sync(void)
154{
155 /*
156 * If we have a lot of pending writes or if the disk is spining,
157 * fsync the debug log file.
158 */
159 if (wrcount > 10 || (wrcount > 0 && storage_disk_is_active())) {
160 if (fd >= 0)
161 fsync(fd);
162
163 wrcount = 0;
164 }
165}
166#else /* !CHARGING_DEBUG_FILE */
167#define debug_file_close()
168#define debug_file_log()
169#define debug_file_sync()
170#endif /* CHARGING_DEBUG_FILE */
171
172/*
173 * Do tasks that should be done every step.
174 */
175static void do_frequent_tasks(void)
176{
177 if (storage_disk_is_active()) {
178 /* flag hdd use for charging calculation */
179 disk_activity_last_cycle = true;
180 }
181
182 debug_file_sync();
183}
184
185/*
186 * The charger was just plugged in. If the battery level is
187 * nearly charged, just trickle. If the battery is low, start
188 * a full charge cycle. If the battery level is in between,
189 * top-off and then trickle.
190 */
191static void charger_plugged(void)
192{
193 int battery_percent = battery_level();
194
195 pid_p = 0;
196 pid_i = 0;
197 powermgmt_last_cycle_level = battery_percent;
198 powermgmt_last_cycle_startstop_min = 0;
199
200 snprintf(power_message, POWER_MESSAGE_LEN, "Charger plugged in");
201
202 if (battery_percent > START_TOPOFF_CHG) {
203
204 if (battery_percent >= START_TRICKLE_CHG) {
205 charge_state = TRICKLE;
206 target_voltage = TRICKLE_VOLTAGE;
207 }
208 else {
209 charge_state = TOPOFF;
210 target_voltage = TOPOFF_VOLTAGE;
211 }
212 }
213 else {
214 /*
215 * Start the charger full strength
216 */
217 int i = CHARGE_MAX_MIN_1500 * get_battery_capacity() / 1500;
218 charge_max_time_idle = i * (100 + 35 - battery_percent) / 100;
219
220 if (charge_max_time_idle > i)
221 charge_max_time_idle = i;
222
223 charge_max_time_now = charge_max_time_idle;
224
225 snprintf(power_message, POWER_MESSAGE_LEN,
226 "ChgAt %d%% max %dm", battery_percent,
227 charge_max_time_now);
228
229 /*
230 * Enable the charger after the max time calc is done,
231 * because battery_level depends on if the charger is
232 * on.
233 */
234 DEBUGF("power: charger inserted and battery"
235 " not full, charging\n");
236 trickle_sec = 60;
237 long_delta = short_delta = 999999;
238 charge_state = CHARGING;
239 }
240}
241
242/*
243 * The charger was just unplugged.
244 */
245static void charger_unplugged(void)
246{
247 DEBUGF("power: charger disconnected, disabling\n");
248
249 charger_enable(false);
250 powermgmt_last_cycle_level = battery_level();
251 powermgmt_last_cycle_startstop_min = 0;
252 trickle_sec = 0;
253 pid_p = 0;
254 pid_i = 0;
255 charge_state = DISCHARGING;
256 snprintf(power_message, POWER_MESSAGE_LEN, "Charger: discharge");
257}
258
259static void charging_step(void)
260{
261 int i;
262
263 /* alter charge time max length with extra disk use */
264 if (disk_activity_last_cycle) {
265 minutes_disk_activity++;
266 charge_max_time_now = charge_max_time_idle +
267 minutes_disk_activity*2 / 5;
268 disk_activity_last_cycle = false;
269 last_disk_activity = 0;
270 }
271 else {
272 last_disk_activity++;
273 }
274
275 /*
276 * Check the delta voltage over the last X minutes so we can do
277 * our end-of-charge logic based on the battery level change
278 * (no longer use minimum time as logic for charge end has 50
279 * minutes minimum charge built in).
280 */
281 if (powermgmt_last_cycle_startstop_min > CHARGE_END_SHORTD) {
282 short_delta = power_history[0] -
283 power_history[CHARGE_END_SHORTD - 1];
284 }
285
286 if (powermgmt_last_cycle_startstop_min > CHARGE_END_LONGD) {
287 /*
288 * Scan the history: the points where measurement is taken need to
289 * be fairly static. Check prior to short delta 'area'. Also only
290 * check first and last 10 cycles (delta in middle OK).
291 */
292 long_delta = power_history[0] -
293 power_history[CHARGE_END_LONGD - 1];
294
295 for (i = CHARGE_END_SHORTD; i < CHARGE_END_SHORTD + 10; i++)
296 {
297 if ((power_history[i] - power_history[i+1]) > 50 ||
298 (power_history[i] - power_history[i+1]) < -50) {
299 long_delta = 777777;
300 break;
301 }
302 }
303
304 for (i = CHARGE_END_LONGD - 11; i < CHARGE_END_LONGD - 1 ; i++)
305 {
306 if ((power_history[i] - power_history[i+1]) > 50 ||
307 (power_history[i] - power_history[i+1]) < -50) {
308 long_delta = 888888;
309 break;
310 }
311 }
312 }
313
314 snprintf(power_message, POWER_MESSAGE_LEN,
315 "Chg %dm, max %dm", powermgmt_last_cycle_startstop_min,
316 charge_max_time_now);
317
318 /*
319 * End of charge criteria (any qualify):
320 * 1) Charged a long time
321 * 2) DeltaV went negative for a short time ( & long delta static)
322 * 3) DeltaV was negative over a longer period (no disk use only)
323 *
324 * Note: short_delta and long_delta are millivolts
325 */
326 if (powermgmt_last_cycle_startstop_min >= charge_max_time_now ||
327 (short_delta <= -50 && long_delta < 50) ||
328 (long_delta < -20 && last_disk_activity > CHARGE_END_LONGD)) {
329
330 int battery_percent = battery_level();
331
332 if (powermgmt_last_cycle_startstop_min > charge_max_time_now) {
333 DEBUGF("power: powermgmt_last_cycle_startstop_min > charge_max_time_now, "
334 "enough!\n");
335 /*
336 * Have charged too long and deltaV detection did not
337 * work!
338 */
339 snprintf(power_message, POWER_MESSAGE_LEN,
340 "Chg tmout %d min", charge_max_time_now);
341 /*
342 * Switch to trickle charging. We skip the top-off
343 * since we've effectively done the top-off operation
344 * already since we charged for the maximum full
345 * charge time.
346 */
347 powermgmt_last_cycle_level = battery_percent;
348 powermgmt_last_cycle_startstop_min = 0;
349 charge_state = TRICKLE;
350
351 /*
352 * Set trickle charge target to a relative voltage instead
353 * of an arbitrary value - the fully charged voltage may
354 * vary according to ambient temp, battery condition etc.
355 * Trickle target is -0.15v from full voltage acheived.
356 * Topup target is -0.05v from full voltage.
357 */
358 target_voltage = power_history[0] - 150;
359
360 }
361 else {
362 if(short_delta <= -5) {
363 DEBUGF("power: short-term negative"
364 " delta, enough!\n");
365 snprintf(power_message, POWER_MESSAGE_LEN,
366 "end negd %d %dmin", short_delta,
367 powermgmt_last_cycle_startstop_min);
368 target_voltage = power_history[CHARGE_END_SHORTD - 1] - 50;
369 }
370 else {
371 DEBUGF("power: long-term small "
372 "positive delta, enough!\n");
373 snprintf(power_message, POWER_MESSAGE_LEN,
374 "end lowd %d %dmin", long_delta,
375 powermgmt_last_cycle_startstop_min);
376 target_voltage = power_history[CHARGE_END_LONGD - 1] - 50;
377 }
378
379 /*
380 * Switch to top-off charging.
381 */
382 powermgmt_last_cycle_level = battery_percent;
383 powermgmt_last_cycle_startstop_min = 0;
384 charge_state = TOPOFF;
385 }
386 }
387}
388
389static void topoff_trickle_step(void)
390{
391 unsigned int millivolts;
392
393 /*
394 *Time to switch from topoff to trickle?
395 */
396 if (charge_state == TOPOFF &&
397 powermgmt_last_cycle_startstop_min > TOPOFF_MAX_MIN) {
398
399 powermgmt_last_cycle_level = battery_level();
400 powermgmt_last_cycle_startstop_min = 0;
401 charge_state = TRICKLE;
402 target_voltage = target_voltage - 100;
403 }
404 /*
405 * Adjust trickle charge time (proportional and integral terms).
406 * Note: I considered setting the level higher if the USB is
407 * plugged in, but it doesn't appear to be necessary and will
408 * generate more heat [gvb].
409 */
410 millivolts = battery_voltage();
411
412 pid_p = ((signed)target_voltage - (signed)millivolts) / 5;
413 if (pid_p <= PID_DEADZONE && pid_p >= -PID_DEADZONE)
414 pid_p = 0;
415
416 if ((unsigned)millivolts < target_voltage) {
417 if (pid_i < 60)
418 pid_i++; /* limit so it doesn't "wind up" */
419 }
420 else {
421 if (pid_i > 0)
422 pid_i--; /* limit so it doesn't "wind up" */
423 }
424
425 trickle_sec = pid_p + pid_i;
426
427 if (trickle_sec > 60)
428 trickle_sec = 60;
429
430 if (trickle_sec < 0)
431 trickle_sec = 0;
432}
433
434void charging_algorithm_step(void)
435{
436 static int pwm_counter = 0; /* PWM total cycle in steps */
437 static int pwm_duty = 0; /* PWM duty cycle in steps */
438
439 switch (charger_input_state)
440 {
441 case CHARGER_PLUGGED:
442 charger_plugged();
443 break;
444
445 case CHARGER_UNPLUGGED:
446 charger_unplugged();
447 break;
448
449 case CHARGER:
450 case NO_CHARGER:
451 do_frequent_tasks();
452
453 if (pwm_counter > 0) {
454 if (pwm_duty > 0 && --pwm_duty <= 0)
455 charger_enable(false); /* Duty cycle expired */
456
457 if (--pwm_counter > 0)
458 return;
459
460 /* PWM cycle is complete */
461 powermgmt_last_cycle_startstop_min++;
462 debug_file_log();
463 }
464 break;
465 }
466
467 switch (charge_state)
468 {
469 case CHARGING:
470 charging_step();
471 break;
472
473 case TOPOFF:
474 case TRICKLE:
475 topoff_trickle_step();
476 break;
477
478 case DISCHARGING:
479 default:
480 break;
481 }
482
483 /* If 100%, ensure pwm_on never expires and briefly disables the
484 * charger. */
485 pwm_duty = (trickle_sec < 60) ? trickle_sec*2 : 0;
486 pwm_counter = 60*2;
487 charger_enable(trickle_sec > 0);
488}
489
490void charging_algorithm_close(void)
491{
492#ifdef CHARGING_DEBUG_FILE
493 debug_file_close();
494#endif /* CHARGING_DEBUG_FILE */
495}
496
497/* Returns true if the unit is charging the batteries. */
498bool charging_state(void)
499{
500 return charge_state == CHARGING;
501}
diff --git a/firmware/target/sh/archos/recorder/powermgmt-target.h b/firmware/target/sh/archos/recorder/powermgmt-target.h
deleted file mode 100644
index 6b68d05bd4..0000000000
--- a/firmware/target/sh/archos/recorder/powermgmt-target.h
+++ /dev/null
@@ -1,89 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Heikki Hannikainen, Uwe Freese
11 * Revisions copyright (C) 2005 by Gerald Van Baren
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22#ifndef POWERMGMT_TARGET_H
23#define POWERMGMT_TARGET_H
24
25/*
26 * Define CHARGING_DEBUG_FILE to create a csv (spreadsheet) with battery
27 * information in it (one sample per minute/connect/disconnect).
28 *
29 * This is only for very low level debug.
30 */
31#undef CHARGING_DEBUG_FILE
32
33
34/* stop when N minutes have passed with avg delta being < -0.05 V */
35#define CHARGE_END_SHORTD 6
36/* stop when N minutes have passed with avg delta being < -0.02 V */
37#define CHARGE_END_LONGD 50
38
39/* Battery % to start at top-off */
40#define START_TOPOFF_CHG 85
41/* Battery % to start at trickle */
42#define START_TRICKLE_CHG 95
43/* power thread status message */
44#define POWER_MESSAGE_LEN 32
45/* minutes: maximum charging time for 1500 mAh batteries
46 * actual max time depends also on BATTERY_CAPACITY! */
47#define CHARGE_MAX_MIN_1500 450
48/* minutes: minimum charging time */
49#define CHARGE_MIN_MIN 10
50/* After charging, go to top off charge. How long should top off charge be? */
51#define TOPOFF_MAX_MIN 90
52/* which voltage is best? (millivolts) */
53#define TOPOFF_VOLTAGE 5650
54/* After top off charge, go to trickle harge. How long should trickle
55 * charge be? */
56#define TRICKLE_MAX_MIN 720 /* 12 hrs */
57/* which voltage is best? (millivolts) */
58#define TRICKLE_VOLTAGE 5450
59/* initial trickle_sec for topoff */
60#define START_TOPOFF_SEC 25
61/* initial trickle_sec for trickle */
62#define START_TRICKLE_SEC 15
63
64#define PID_DEADZONE 4 /* PID proportional deadzone */
65
66extern char power_message[POWER_MESSAGE_LEN];
67
68extern int long_delta; /* long term delta battery voltage */
69extern int short_delta; /* short term delta battery voltage */
70
71extern int powermgmt_last_cycle_startstop_min; /* how many minutes ago was
72 the charging started or
73 stopped? */
74extern int powermgmt_last_cycle_level; /* which level had the batteries
75 at this time? */
76
77extern int pid_p; /* PID proportional term */
78extern int pid_i; /* PID integral term */
79extern int trickle_sec; /* how many seconds should the
80 charger be enabled per
81 minute for trickle
82 charging? */
83void charger_enable(bool on);
84bool charger_enabled(void);
85
86/* Battery filter lengths in samples */
87#define BATT_AVE_SAMPLES 32
88
89#endif /* POWERMGMT_TARGET_H */
diff --git a/firmware/target/sh/archos/recorder/usb-recorder.c b/firmware/target/sh/archos/recorder/usb-recorder.c
deleted file mode 100644
index f8b462b802..0000000000
--- a/firmware/target/sh/archos/recorder/usb-recorder.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include <stdbool.h>
23#include "adc.h"
24#include "cpu.h"
25#include "hwcompat.h"
26#include "system.h"
27#include "usb.h"
28
29int usb_detect(void)
30{
31 return (adc_read(ADC_USB_POWER) > 500) ? USB_INSERTED : USB_EXTRACTED;
32}
33
34void usb_enable(bool on)
35{
36 if(HW_MASK & USB_ACTIVE_HIGH)
37 on = !on;
38
39 if(on)
40 and_b(~0x04, &PADRH); /* enable USB */
41 else
42 or_b(0x04, &PADRH);
43}
44
45void usb_init_device(void)
46{
47 usb_enable(false);
48 or_b(0x04, &PAIORH);
49}
diff --git a/firmware/target/sh/archos/timer-archos.c b/firmware/target/sh/archos/timer-archos.c
deleted file mode 100644
index 98a3afb4b6..0000000000
--- a/firmware/target/sh/archos/timer-archos.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2005 Jens Arnold
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21
22#include "cpu.h"
23#include "system.h"
24#include "timer.h"
25
26void IMIA4(void) __attribute__((interrupt_handler));
27void IMIA4(void)
28{
29 if (pfn_timer != NULL)
30 pfn_timer();
31 and_b(~0x01, &TSR4); /* clear the interrupt */
32}
33
34bool timer_set(long cycles, bool start)
35{
36 int phi = 0; /* bits for the prescaler */
37 int prescale = 1;
38
39 while (cycles > 0x10000)
40 { /* work out the smallest prescaler that makes it fit */
41 phi++;
42 prescale <<= 1;
43 cycles >>= 1;
44 }
45
46 if (prescale > 8)
47 return false;
48
49 if (start)
50 {
51 if (pfn_unregister != NULL)
52 {
53 pfn_unregister();
54 pfn_unregister = NULL;
55 }
56
57 and_b(~0x10, &TSTR); /* Stop the timer 4 */
58 and_b(~0x10, &TSNC); /* No synchronization */
59 and_b(~0x10, &TMDR); /* Operate normally */
60
61 TIER4 = 0xF9; /* Enable GRA match interrupt */
62 }
63
64 TCR4 = 0x20 | phi; /* clear at GRA match, set prescaler */
65 GRA4 = (unsigned short)(cycles - 1);
66 if (start || (TCNT4 >= GRA4))
67 TCNT4 = 0;
68 and_b(~0x01, &TSR4); /* clear an eventual interrupt */
69
70 return true;
71}
72
73bool timer_start(void)
74{
75 IPRD = (IPRD & 0xFF0F) | 1 << 4; /* interrupt priority */
76 or_b(0x10, &TSTR); /* start timer 4 */
77 return true;
78}
79
80void timer_stop(void)
81{
82 and_b(~0x10, &TSTR); /* stop the timer 4 */
83 IPRD = (IPRD & 0xFF0F); /* disable interrupt */
84}
diff --git a/firmware/target/sh/archos/uart-archos.c b/firmware/target/sh/archos/uart-archos.c
deleted file mode 100644
index d17678f812..0000000000
--- a/firmware/target/sh/archos/uart-archos.c
+++ /dev/null
@@ -1,167 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Alan Korr & Nick Robinson
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include <stdio.h>
22#include <stdlib.h>
23#include <stdarg.h>
24
25#include "config.h"
26#include "button.h"
27#include "cpu.h"
28#include "system.h"
29#include "kernel.h"
30#include "serial.h"
31
32/* FIX: this doesn't work on iRiver or iPod yet */
33/* iFP7xx has no remote */
34
35/* Received byte identifiers */
36#define PLAY 0xC1
37#define STOP 0xC2
38#define PREV 0xC4
39#define NEXT 0xC8
40#define VOLUP 0xD0
41#define VOLDN 0xE0
42
43void serial_setup (void)
44{
45 /* Set PB10 function to serial Rx */
46 PBCR1 = (PBCR1 & 0xffcf) | 0x0020;
47
48 SMR1 = 0x00;
49 SCR1 = 0;
50 BRR1 = (FREQ/(32*9600))-1;
51 and_b(0, &SSR1); /* The status bits must be read before they are cleared,
52 so we do an AND operation */
53
54 /* Let the hardware settle. The serial port needs to wait "at least
55 the interval required to transmit or receive one bit" before it
56 can be used. */
57 sleep(1);
58
59 SCR1 = 0x10; /* Enable the receiver, no interrupt */
60}
61
62int tx_rdy(void)
63{
64 /* a dummy */
65 return 1;
66}
67
68static int rx_rdy(void)
69{
70 if(SSR1 & SCI_RDRF)
71 return 1;
72 else
73 return 0;
74}
75
76void tx_writec(unsigned char c)
77{
78 /* a dummy */
79 (void)c;
80}
81
82static unsigned char rx_readc(void)
83{
84 char tmp;
85 /* Read byte and clear the Rx Full bit */
86 tmp = RDR1;
87 and_b(~SCI_RDRF, &SSR1);
88 return tmp;
89}
90
91
92/* This function returns the received remote control code only if it is
93 received without errors before or after the reception.
94 It therefore returns the received code on the second call after the
95 code has been received. */
96int remote_control_rx(void)
97{
98 static int last_valid_button = BUTTON_NONE;
99 static int last_was_error = false;
100 int btn;
101 int ret = BUTTON_NONE;
102
103 /* Errors? Just clear'em. The receiver stops if we don't */
104 if(SSR1 & (SCI_ORER | SCI_FER | SCI_PER)) {
105 and_b(~(SCI_ORER | SCI_FER | SCI_PER), &SSR1);
106 last_valid_button = BUTTON_NONE;
107 last_was_error = true;
108 return BUTTON_NONE;
109 }
110
111 if(rx_rdy()) {
112 btn = rx_readc();
113
114 if(last_was_error)
115 {
116 last_valid_button = BUTTON_NONE;
117 ret = BUTTON_NONE;
118 }
119 else
120 {
121 switch (btn)
122 {
123 case STOP:
124 last_valid_button = BUTTON_RC_STOP;
125 break;
126
127 case PLAY:
128 last_valid_button = BUTTON_RC_PLAY;
129 break;
130
131 case VOLUP:
132 last_valid_button = BUTTON_RC_VOL_UP;
133 break;
134
135 case VOLDN:
136 last_valid_button = BUTTON_RC_VOL_DOWN;
137 break;
138
139 case PREV:
140 last_valid_button = BUTTON_RC_LEFT;
141 break;
142
143 case NEXT:
144 last_valid_button = BUTTON_RC_RIGHT;
145 break;
146
147 default:
148 last_valid_button = BUTTON_NONE;
149 break;
150 }
151 }
152 }
153 else
154 {
155 /* This means that a valid remote control character was received
156 the last time we were called, with no receiver errors either before
157 or after. Then we can assume that there really is a remote control
158 attached, and return the button code. */
159 ret = last_valid_button;
160 last_valid_button = BUTTON_NONE;
161 }
162
163 last_was_error = false;
164
165 return ret;
166}
167
diff --git a/firmware/target/sh/bitswap.S b/firmware/target/sh/bitswap.S
deleted file mode 100644
index ba8dd0cc1a..0000000000
--- a/firmware/target/sh/bitswap.S
+++ /dev/null
@@ -1,152 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22 .section .icode,"ax",@progbits
23 .align 2
24 .global _bitswap
25 .type _bitswap,@function
26
27/* Flips the bits of all bytes in a memory area (required for mp3 data on
28 * the Archos). This version is optimized for speed and size.
29 *
30 * arguments:
31 * r4 - start address
32 * r5 - length
33 *
34 * return value: void
35 *
36 * register usage:
37 * r0 - temporary
38 * r1 - bit mask for rounding to long bound / low byte (after swap)
39 * r2 - high byte (after swap) / combined result
40 * r4 - data address - 4
41 * r5 - end address - 4
42 * r7 - flip table (addressing with signed offset)
43 *
44 * The instruction order below is devised in a way to utilize the pipelining
45 * of the SH1 to the max.
46 */
47
48_bitswap:
49 mova _fliptable,r0
50 mov r0,r7
51 add #-4,r4 /* address is shifted by 4 */
52 add r4,r5 /* r5 = end_address - 4 */
53 cmp/hi r4,r5 /* at least something to do? */
54 bf .exit /* no, get out of here! */
55
56 add #-3,r5 /* end offset for flipping 4 bytes per pass */
57 mov r4,r0
58 tst #1,r0 /* even address? */
59 bt .start2_w /* yes, jump into main loop */
60
61 /* no, flip first byte */
62 mov.b @(4,r4),r0 /* load byte, sign extension! */
63 add #1,r4 /* early increment */
64 mov.b @(r0,r7),r0 /* fliptable offset is signed */
65 bra .start2_w /* jump into main loop */
66 mov.b r0,@(3,r4) /* store byte */
67
68 /* main loop: flips 2 words per pass */
69 .align 2
70.loop2_w:
71 mov.w @(6,r4),r0 /* load second word */
72 add #4,r4 /* early increment */
73 swap.b r0,r2 /* get high byte (2nd word) */
74 exts.b r0,r0 /* prepare low byte (2nd word) */
75 mov.b @(r0,r7),r1 /* swap low byte (2nd word) */
76 exts.b r2,r0 /* prepare high byte (2nd word) */
77 mov.b @(r0,r7),r2 /* swap high byte (2nd word) */
78 extu.b r1,r0 /* zero extend low byte (2nd word) */
79 mov.w @r4,r1 /* load first word */
80 shll8 r2 /* shift high byte (2nd word), low byte zeroed */
81 or r2,r0 /* put low byte (2nd word) in result */
82 swap.b r1,r2 /* get high byte (1st word) */
83 mov.w r0,@(2,r4) /* store result (2nd word) */
84 exts.b r1,r0 /* prepare low byte (1st word) */
85 mov.b @(r0,r7),r1 /* swap low byte (1st word) */
86 exts.b r2,r0 /* prepare high byte (1st word) */
87 mov.b @(r0,r7),r2 /* swap high byte (1st word) */
88 extu.b r1,r0 /* zero extend low byte (1st word) */
89 shll8 r2 /* shift high byte (1st word), low byte zeroed */
90 or r2,r0 /* put low byte (1st word) in result */
91 mov.w r0,@r4 /* store result (1st word) */
92.start2_w:
93 cmp/hi r4,r5 /* runs r4 up to last long bound */
94 bt .loop2_w
95
96 bra .start_b2 /* jump into trailing byte loop */
97 add #3,r5 /* reset end offset */
98
99 /* trailing byte loop: flips 0..3 bytes */
100.loop_b2:
101 mov.b @(4,r4),r0 /* loand byte, sign extension! */
102 add #1,r4 /* early increment */
103 mov.b @(r0,r7),r0 /* fliptable offset is signed */
104 mov.b r0,@(3,r4) /* store byte */
105.start_b2:
106 cmp/hi r4,r5 /* runs r4 up to end address */
107 bt .loop_b2
108
109.exit:
110 rts
111 nop
112
113 .align 2
114 .global _fliptable
115
116 .byte 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1
117 .byte 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1
118 .byte 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9
119 .byte 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9
120 .byte 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5
121 .byte 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5
122 .byte 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed
123 .byte 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd
124 .byte 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3
125 .byte 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3
126 .byte 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb
127 .byte 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb
128 .byte 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7
129 .byte 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7
130 .byte 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef
131 .byte 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff
132_fliptable:
133 .byte 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0
134 .byte 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0
135 .byte 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8
136 .byte 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8
137 .byte 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4
138 .byte 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4
139 .byte 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec
140 .byte 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc
141 .byte 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2
142 .byte 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2
143 .byte 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea
144 .byte 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa
145 .byte 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6
146 .byte 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6
147 .byte 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee
148 .byte 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe
149
150
151.end:
152 .size _bitswap,.end-_bitswap
diff --git a/firmware/target/sh/crt0.S b/firmware/target/sh/crt0.S
deleted file mode 100644
index 0e8bbfdd68..0000000000
--- a/firmware/target/sh/crt0.S
+++ /dev/null
@@ -1,219 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23
24 .section .init.text,"ax",@progbits
25
26 .global start
27start:
28
29 mov.l .vbr_k,r1
30#ifdef DEBUG
31 /* If we have built our code to be loaded via the standalone GDB
32 * stub, we will have out VBR at some other location than 0x9000000.
33 * We must copy the trap vectors for the GDB stub to our vector table. */
34 mov.l .orig_vbr_k,r2
35
36 /* Move the invalid instruction vector (4) */
37 mov #4,r0
38 shll2 r0
39 mov.l @(r0,r2),r3
40 mov.l r3,@(r0,r1)
41
42 /* Move the invalid slot vector (6) */
43 mov #6,r0
44 shll2 r0
45 mov.l @(r0,r2),r3
46 mov.l r3,@(r0,r1)
47
48 /* Move the bus error vector (9) */
49 mov #9,r0
50 shll2 r0
51 mov.l @(r0,r2),r3
52 mov.l r3,@(r0,r1)
53
54 /* Move the DMA bus error vector (10) */
55 mov #10,r0
56 shll2 r0
57 mov.l @(r0,r2),r3
58 mov.l r3,@(r0,r1)
59
60 /* Move the NMI vector as well (11) */
61 mov #11,r0
62 shll2 r0
63 mov.l @(r0,r2),r3
64 mov.l r3,@(r0,r1)
65
66 /* Move the UserBreak vector as well (12) */
67 mov #12,r0
68 shll2 r0
69 mov.l @(r0,r2),r3
70 mov.l r3,@(r0,r1)
71
72 /* Move the breakpoint trap vector (32) */
73 mov #32,r0
74 shll2 r0
75 mov.l @(r0,r2),r3
76 mov.l r3,@(r0,r1)
77
78 /* Move the IO trap vector (33) */
79 mov #33,r0
80 shll2 r0
81 mov.l @(r0,r2),r3
82 mov.l r3,@(r0,r1)
83
84 /* Move the serial Rx interrupt vector (105) */
85 mov #105,r0
86 shll2 r0
87 mov.l @(r0,r2),r3
88 mov.l r3,@(r0,r1)
89
90 /* Move the single step trap vector (127) */
91 mov #127,r0
92 shll2 r0
93 mov.l @(r0,r2),r3
94 mov.l r3,@(r0,r1)
95#endif /* DEBUG */
96 ldc r1,vbr
97
98 mov #0,r0
99 ldc r0,gbr
100
101 /* .iram copy is done first since it is reclaimed for other
102 * uninitialized sections */
103
104 /* copy the .iram section */
105 mov.l .iramcopy_k,r0
106 mov.l .iram_k,r1
107 mov.l .iramend_k,r2
108 /* Note: We cannot put a PC relative load into the delay slot of a 'bra'
109 instruction (the offset would be wrong), but there is nothing else to
110 do before the loop, so the delay slot would be 'nop'. The cmp / bf
111 sequence is the same length, but more efficient. */
112 cmp/hi r1,r2
113 bf .noiramcopy
114.iramloop:
115 mov.l @r0+,r3
116 mov.l r3,@r1
117 add #4,r1
118 cmp/hi r1,r2
119 bt .iramloop
120.noiramcopy:
121
122 /* zero out .ibss */
123 mov.l .iedata_k,r0
124 mov.l .iend_k,r1
125 bra .iedatastart
126 mov #0,r2
127.iedataloop: /* backwards is faster and shorter */
128 mov.l r2,@-r1
129.iedatastart:
130 cmp/hi r0,r1
131 bt .iedataloop
132
133 /* zero out bss */
134 mov.l .edata_k,r0
135 mov.l .end_k,r1
136 bra .edatastart
137 mov #0,r2
138.edataloop: /* backwards is faster and shorter */
139 mov.l r2,@-r1
140.edatastart:
141 cmp/hi r0,r1
142 bt .edataloop
143
144 /* copy the .data section, for rombased execution */
145 mov.l .datacopy_k,r0
146 mov.l .data_k,r1
147 cmp/eq r0,r1
148 bt .nodatacopy /* Don't copy if src and dest are equal */
149 mov.l .dataend_k,r2
150 cmp/hi r1,r2
151 bf .nodatacopy
152.dataloop:
153 mov.l @r0+,r3
154 mov.l r3,@r1
155 add #4,r1
156 cmp/hi r1,r2
157 bt .dataloop
158.nodatacopy:
159
160 /* Munge the main thread stack */
161 mov.l .stackbegin_k,r0
162 mov.l .stackend_k,r1
163 mov r1,r15
164 mov.l .deadbeef_k,r2
165.mungeloop: /* backwards is faster and shorter */
166 mov.l r2,@-r1
167 cmp/hi r0,r1
168 bt .mungeloop
169
170 /* call the mainline */
171 mov.l .main_k,r0
172 jsr @r0
173 nop
174.hoo:
175 bra .hoo
176 nop
177
178 .align 2
179.vbr_k:
180 .long vectors
181#ifdef DEBUG
182.orig_vbr_k:
183 .long 0x09000000
184#endif
185.iedata_k:
186 .long _iedata
187.iend_k:
188 .long _iend
189.iramcopy_k:
190 .long _iramcopy
191.iram_k:
192 .long _iramstart
193.iramend_k:
194 .long _iramend
195.edata_k:
196 .long _edata
197.end_k:
198 .long _end
199.datacopy_k:
200 .long _datacopy
201.data_k:
202 .long _datastart
203.dataend_k:
204 .long _dataend
205.stackbegin_k:
206 .long _stackbegin
207.stackend_k:
208 .long _stackend
209.deadbeef_k:
210 .long 0xdeadbeef
211.main_k:
212 .long _main
213
214 .section .resetvectors
215vectors:
216 .long start
217 .long _stackend
218 .long start
219 .long _stackend
diff --git a/firmware/target/sh/debug-sh.c b/firmware/target/sh/debug-sh.c
deleted file mode 100644
index bee4896174..0000000000
--- a/firmware/target/sh/debug-sh.c
+++ /dev/null
@@ -1,285 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 Heikki Hannikainen
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include <stdbool.h>
23#include <string.h>
24
25#include "config.h"
26#include "system.h"
27#include "kernel.h"
28#include "font.h"
29#include "lcd.h"
30#include "button.h"
31#include "powermgmt.h"
32#include "adc.h"
33#include "hwcompat.h" /* ROM_VERSION */
34#include "crc32.h"
35
36#if CONFIG_KEYPAD == RECORDER_PAD
37# define DEBUG_CANCEL BUTTON_OFF
38
39#elif CONFIG_KEYPAD == ONDIO_PAD
40# define DEBUG_CANCEL BUTTON_MENU
41#endif
42
43/* Tool function to read the flash manufacturer and type, if available.
44 Only chips which could be reprogrammed in system will return values.
45 (The mode switch addresses vary between flash manufacturers, hence addr1/2) */
46 /* In IRAM to avoid problems when running directly from Flash */
47static bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device,
48 unsigned addr1, unsigned addr2)
49 ICODE_ATTR __attribute__((noinline));
50static bool dbg_flash_id(unsigned* p_manufacturer, unsigned* p_device,
51 unsigned addr1, unsigned addr2)
52{
53 unsigned not_manu, not_id; /* read values before switching to ID mode */
54 unsigned manu, id; /* read values when in ID mode */
55
56 volatile unsigned char* flash = (unsigned char*)0x2000000; /* flash mapping */
57 int old_level; /* saved interrupt level */
58
59 not_manu = flash[0]; /* read the normal content */
60 not_id = flash[1]; /* should be 'A' (0x41) and 'R' (0x52) from the "ARCH" marker */
61
62 /* disable interrupts, prevent any stray flash access */
63 old_level = disable_irq_save();
64
65 flash[addr1] = 0xAA; /* enter command mode */
66 flash[addr2] = 0x55;
67 flash[addr1] = 0x90; /* ID command */
68 /* Atmel wants 20ms pause here */
69 /* sleep(HZ/50); no sleeping possible while interrupts are disabled */
70
71 manu = flash[0]; /* read the IDs */
72 id = flash[1];
73
74 flash[0] = 0xF0; /* reset flash (back to normal read mode) */
75 /* Atmel wants 20ms pause here */
76 /* sleep(HZ/50); no sleeping possible while interrupts are disabled */
77
78 restore_irq(old_level); /* enable interrupts again */
79 /* I assume success if the obtained values are different from
80 the normal flash content. This is not perfectly bulletproof, they
81 could theoretically be the same by chance, causing us to fail. */
82 if (not_manu != manu || not_id != id) /* a value has changed */
83 {
84 *p_manufacturer = manu; /* return the results */
85 *p_device = id;
86 return true; /* success */
87 }
88 return false; /* fail */
89}
90
91bool dbg_ports(void)
92{
93 int adc_battery_voltage;
94#ifndef HAVE_LCD_BITMAP
95 int currval = 0;
96 int button;
97#else
98 int adc_battery_level;
99
100 lcd_setfont(FONT_SYSFIXED);
101#endif
102 lcd_clear_display();
103
104 while(1)
105 {
106#ifdef HAVE_LCD_BITMAP
107 lcd_putsf(0, 0, "PADR: %04x", (unsigned short)PADR);
108 lcd_putsf(0, 1, "PBDR: %04x", (unsigned short)PBDR);
109
110 lcd_putsf(0, 2, "AN0: %03x AN4: %03x", adc_read(0), adc_read(4));
111 lcd_putsf(0, 3, "AN1: %03x AN5: %03x", adc_read(1), adc_read(5));
112 lcd_putsf(0, 4, "AN2: %03x AN6: %03x", adc_read(2), adc_read(6));
113 lcd_putsf(0, 5, "AN3: %03x AN7: %03x", adc_read(3), adc_read(7));
114
115 battery_read_info(&adc_battery_voltage, &adc_battery_level);
116 lcd_putsf(0, 6, "Batt: %d.%03dV %d%% ", adc_battery_voltage / 1000,
117 adc_battery_voltage % 1000, adc_battery_level);
118
119 lcd_update();
120
121 while (button_get_w_tmo(HZ/10) != (DEBUG_CANCEL|BUTTON_REL));
122
123 lcd_setfont(FONT_UI);
124
125#else /* !HAVE_LCD_BITMAP */
126
127 if (currval == 0) {
128 lcd_putsf(0, 0, "PADR: %04x", (unsigned short)PADR);
129 } else if (currval == 1) {
130 lcd_putsf(0, 0, "PBDR: %04x", (unsigned short)PBDR);
131 } else {
132 int idx = currval - 2; /* idx < 7 */
133 lcd_putsf(0, 0, "AN%d: %03x", idx, adc_read(idx));
134 }
135
136 battery_read_info(&adc_battery_voltage, NULL);
137 lcd_putsf(0, 1, "Batt: %d.%03dV", adc_battery_voltage / 1000,
138 adc_battery_voltage % 1000);
139 lcd_update();
140
141 button = button_get_w_tmo(HZ/5);
142 switch(button)
143 {
144 case BUTTON_STOP:
145 return false;
146
147 case BUTTON_LEFT:
148 currval--;
149 if(currval < 0)
150 currval = 9;
151 break;
152
153 case BUTTON_RIGHT:
154 currval++;
155 if(currval > 9)
156 currval = 0;
157 break;
158 }
159#endif
160 }
161 return false;
162}
163
164bool dbg_hw_info(void)
165{
166#ifndef HAVE_LCD_BITMAP
167 int button;
168 int currval = 0;
169#else
170 int bitmask = HW_MASK;
171#endif
172 int rom_version = ROM_VERSION;
173 unsigned manu, id; /* flash IDs */
174 bool got_id; /* flag if we managed to get the flash IDs */
175 unsigned rom_crc = 0xffffffff; /* CRC32 of the boot ROM */
176 bool has_bootrom; /* flag for boot ROM present */
177 int oldmode; /* saved memory guard mode */
178
179 oldmode = system_memory_guard(MEMGUARD_NONE); /* disable memory guard */
180
181 /* get flash ROM type */
182 got_id = dbg_flash_id(&manu, &id, 0x5555, 0x2AAA); /* try SST, Atmel, NexFlash */
183 if (!got_id)
184 got_id = dbg_flash_id(&manu, &id, 0x555, 0x2AA); /* try AMD, Macronix */
185
186 /* check if the boot ROM area is a flash mirror */
187 has_bootrom = (memcmp((char*)0, (char*)0x02000000, 64*1024) != 0);
188 if (has_bootrom) /* if ROM and Flash different */
189 {
190 /* calculate CRC16 checksum of boot ROM */
191 rom_crc = crc_32((unsigned char*)0x0000, 64*1024, 0xffffffff);
192 }
193
194 system_memory_guard(oldmode); /* re-enable memory guard */
195
196 lcd_clear_display();
197
198#ifdef HAVE_LCD_BITMAP
199 lcd_setfont(FONT_SYSFIXED);
200
201 lcd_puts(0, 0, "[Hardware info]");
202
203 lcd_putsf(0, 1, "ROM: %d.%02d", rom_version/100, rom_version%100);
204
205 lcd_putsf(0, 2, "Mask: 0x%04x", bitmask);
206 if (got_id)
207 lcd_putsf(0, 3, "Flash: M=%02x D=%02x", manu, id);
208 else
209 lcd_puts(0, 3, "Flash: M=?? D=??"); /* unknown, sorry */
210
211 if (has_bootrom)
212 {
213 if (rom_crc == 0x56DBA4EE) /* known Version 1 */
214 lcd_puts(0, 4, "Boot ROM: V1");
215 else
216 lcd_putsf(0, 4, "ROMcrc: 0x%08x", rom_crc);
217 }
218 else
219 {
220 lcd_puts(0, 4, "Boot ROM: none");
221 }
222
223 lcd_update();
224
225 /* wait for exit */
226 while (button_get_w_tmo(HZ/10) != (DEBUG_CANCEL|BUTTON_REL));
227
228 lcd_setfont(FONT_UI);
229
230#else /* !HAVE_LCD_BITMAP */
231 lcd_puts(0, 0, "[HW Info]");
232 while(1)
233 {
234 switch(currval)
235 {
236 case 0:
237 lcd_putsf(0, 1, "ROM: %d.%02d",
238 rom_version/100, rom_version%100);
239 break;
240 case 1:
241 if (got_id)
242 lcd_putsf(0, 1, "Flash:%02x,%02x", manu, id);
243 else
244 lcd_puts(0, 1, "Flash:??,??"); /* unknown, sorry */
245 break;
246 case 2:
247 if (has_bootrom)
248 {
249 if (rom_crc == 0x56DBA4EE) /* known Version 1 */
250 lcd_puts(0, 1, "BootROM: V1");
251 else if (rom_crc == 0x358099E8)
252 lcd_puts(0, 1, "BootROM: V2");
253 /* alternative boot ROM found in one single player so far */
254 else
255 lcd_putsf(0, 1, "R: %08x", rom_crc);
256 }
257 else
258 lcd_puts(0, 1, "BootROM: no");
259 }
260
261 lcd_update();
262
263 button = button_get_w_tmo(HZ/10);
264
265 switch(button)
266 {
267 case BUTTON_STOP:
268 return false;
269
270 case BUTTON_LEFT:
271 currval--;
272 if(currval < 0)
273 currval = 2;
274 break;
275
276 case BUTTON_RIGHT:
277 currval++;
278 if(currval > 2)
279 currval = 0;
280 break;
281 }
282 }
283#endif
284 return false;
285}
diff --git a/firmware/target/sh/kernel-sh.c b/firmware/target/sh/kernel-sh.c
deleted file mode 100644
index 65b27e47f0..0000000000
--- a/firmware/target/sh/kernel-sh.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Björn Stenberg
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "system.h"
23#include "kernel.h"
24#include "panic.h"
25
26void tick_start(unsigned int interval_in_ms)
27{
28 unsigned long count;
29
30 count = CPU_FREQ * interval_in_ms / 1000 / 8;
31
32 if(count > 0x10000)
33 {
34 panicf("Error! The tick interval is too long (%d ms)\n",
35 interval_in_ms);
36 return;
37 }
38
39 /* We are using timer 0 */
40
41 TSTR &= ~0x01; /* Stop the timer */
42 TSNC &= ~0x01; /* No synchronization */
43 TMDR &= ~0x01; /* Operate normally */
44
45 TCNT0 = 0; /* Start counting at 0 */
46 GRA0 = (unsigned short)(count - 1);
47 TCR0 = 0x23; /* Clear at GRA match, sysclock/8 */
48
49 /* Enable interrupt on level 1 */
50 IPRC = (IPRC & ~0x00f0) | 0x0010;
51
52 TSR0 &= ~0x01;
53 TIER0 = 0xf9; /* Enable GRA match interrupt */
54
55 TSTR |= 0x01; /* Start timer 1 */
56}
57
58void IMIA0(void) __attribute__ ((interrupt_handler));
59void IMIA0(void)
60{
61 /* Run through the list of tick tasks */
62 call_tick_tasks();
63
64 TSR0 &= ~0x01;
65}
diff --git a/firmware/target/sh/system-sh.c b/firmware/target/sh/system-sh.c
deleted file mode 100644
index e054801b57..0000000000
--- a/firmware/target/sh/system-sh.c
+++ /dev/null
@@ -1,450 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 * Based on the work of Alan Korr and others
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include <stdio.h>
24#include "config.h"
25#include "system.h"
26#include "lcd.h"
27#include "font.h"
28#include "led.h"
29
30const unsigned bit_n_table[32] = {
31 1LU<< 0, 1LU<< 1, 1LU<< 2, 1LU<< 3,
32 1LU<< 4, 1LU<< 5, 1LU<< 6, 1LU<< 7,
33 1LU<< 8, 1LU<< 9, 1LU<<10, 1LU<<11,
34 1LU<<12, 1LU<<13, 1LU<<14, 1LU<<15,
35 1LU<<16, 1LU<<17, 1LU<<18, 1LU<<19,
36 1LU<<20, 1LU<<21, 1LU<<22, 1LU<<23,
37 1LU<<24, 1LU<<25, 1LU<<26, 1LU<<27,
38 1LU<<28, 1LU<<29, 1LU<<30, 1LU<<31
39};
40
41static const char* const irqname[] = {
42 "", "", "", "", "IllInstr", "", "IllSltIn","","",
43 "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
44 "","","","","","","","","","","","","","","","","","","",
45 "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
46 "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
47 "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
48 "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
49 "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
50 "Dma0","","Dma1","","Dma2","","Dma3","",
51 "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
52 "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
53 "IMIA4","IMIB4","OVI4","",
54 "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
55 "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
56 "ParityEr","A/D conv","","","Watchdog","DRAMRefr"
57};
58
59#define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
60#define DEFAULT_INTERRUPT(name, number) "\t.weak\t_" #name \
61 "\n\t.set\t_" #name ",_UIE" #number \
62 "\n\t.long\t_" #name "\n"
63
64asm (
65
66/* Vector table.
67 * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
68 * defined in an asm block -- silly.
69 * Reset vectors (0..3) are handled in crt0.S */
70
71 ".section\t.vectors,\"aw\",@progbits\n"
72 DEFAULT_INTERRUPT (GII, 4)
73 RESERVE_INTERRUPT ( 5)
74 DEFAULT_INTERRUPT (ISI, 6)
75 RESERVE_INTERRUPT ( 7)
76 RESERVE_INTERRUPT ( 8)
77 DEFAULT_INTERRUPT (CPUAE, 9)
78 DEFAULT_INTERRUPT (DMAAE, 10)
79 DEFAULT_INTERRUPT (NMI, 11)
80 DEFAULT_INTERRUPT (UB, 12)
81 RESERVE_INTERRUPT ( 13)
82 RESERVE_INTERRUPT ( 14)
83 RESERVE_INTERRUPT ( 15)
84 RESERVE_INTERRUPT ( 16) /* TCB #0 */
85 RESERVE_INTERRUPT ( 17) /* TCB #1 */
86 RESERVE_INTERRUPT ( 18) /* TCB #2 */
87 RESERVE_INTERRUPT ( 19) /* TCB #3 */
88 RESERVE_INTERRUPT ( 20) /* TCB #4 */
89 RESERVE_INTERRUPT ( 21) /* TCB #5 */
90 RESERVE_INTERRUPT ( 22) /* TCB #6 */
91 RESERVE_INTERRUPT ( 23) /* TCB #7 */
92 RESERVE_INTERRUPT ( 24) /* TCB #8 */
93 RESERVE_INTERRUPT ( 25) /* TCB #9 */
94 RESERVE_INTERRUPT ( 26) /* TCB #10 */
95 RESERVE_INTERRUPT ( 27) /* TCB #11 */
96 RESERVE_INTERRUPT ( 28) /* TCB #12 */
97 RESERVE_INTERRUPT ( 29) /* TCB #13 */
98 RESERVE_INTERRUPT ( 30) /* TCB #14 */
99 RESERVE_INTERRUPT ( 31) /* TCB #15 */
100 DEFAULT_INTERRUPT (TRAPA32, 32)
101 DEFAULT_INTERRUPT (TRAPA33, 33)
102 DEFAULT_INTERRUPT (TRAPA34, 34)
103 DEFAULT_INTERRUPT (TRAPA35, 35)
104 DEFAULT_INTERRUPT (TRAPA36, 36)
105 DEFAULT_INTERRUPT (TRAPA37, 37)
106 DEFAULT_INTERRUPT (TRAPA38, 38)
107 DEFAULT_INTERRUPT (TRAPA39, 39)
108 DEFAULT_INTERRUPT (TRAPA40, 40)
109 DEFAULT_INTERRUPT (TRAPA41, 41)
110 DEFAULT_INTERRUPT (TRAPA42, 42)
111 DEFAULT_INTERRUPT (TRAPA43, 43)
112 DEFAULT_INTERRUPT (TRAPA44, 44)
113 DEFAULT_INTERRUPT (TRAPA45, 45)
114 DEFAULT_INTERRUPT (TRAPA46, 46)
115 DEFAULT_INTERRUPT (TRAPA47, 47)
116 DEFAULT_INTERRUPT (TRAPA48, 48)
117 DEFAULT_INTERRUPT (TRAPA49, 49)
118 DEFAULT_INTERRUPT (TRAPA50, 50)
119 DEFAULT_INTERRUPT (TRAPA51, 51)
120 DEFAULT_INTERRUPT (TRAPA52, 52)
121 DEFAULT_INTERRUPT (TRAPA53, 53)
122 DEFAULT_INTERRUPT (TRAPA54, 54)
123 DEFAULT_INTERRUPT (TRAPA55, 55)
124 DEFAULT_INTERRUPT (TRAPA56, 56)
125 DEFAULT_INTERRUPT (TRAPA57, 57)
126 DEFAULT_INTERRUPT (TRAPA58, 58)
127 DEFAULT_INTERRUPT (TRAPA59, 59)
128 DEFAULT_INTERRUPT (TRAPA60, 60)
129 DEFAULT_INTERRUPT (TRAPA61, 61)
130 DEFAULT_INTERRUPT (TRAPA62, 62)
131 DEFAULT_INTERRUPT (TRAPA63, 63)
132 DEFAULT_INTERRUPT (IRQ0, 64)
133 DEFAULT_INTERRUPT (IRQ1, 65)
134 DEFAULT_INTERRUPT (IRQ2, 66)
135 DEFAULT_INTERRUPT (IRQ3, 67)
136 DEFAULT_INTERRUPT (IRQ4, 68)
137 DEFAULT_INTERRUPT (IRQ5, 69)
138 DEFAULT_INTERRUPT (IRQ6, 70)
139 DEFAULT_INTERRUPT (IRQ7, 71)
140 DEFAULT_INTERRUPT (DEI0, 72)
141 RESERVE_INTERRUPT ( 73)
142 DEFAULT_INTERRUPT (DEI1, 74)
143 RESERVE_INTERRUPT ( 75)
144 DEFAULT_INTERRUPT (DEI2, 76)
145 RESERVE_INTERRUPT ( 77)
146 DEFAULT_INTERRUPT (DEI3, 78)
147 RESERVE_INTERRUPT ( 79)
148 DEFAULT_INTERRUPT (IMIA0, 80)
149 DEFAULT_INTERRUPT (IMIB0, 81)
150 DEFAULT_INTERRUPT (OVI0, 82)
151 RESERVE_INTERRUPT ( 83)
152 DEFAULT_INTERRUPT (IMIA1, 84)
153 DEFAULT_INTERRUPT (IMIB1, 85)
154 DEFAULT_INTERRUPT (OVI1, 86)
155 RESERVE_INTERRUPT ( 87)
156 DEFAULT_INTERRUPT (IMIA2, 88)
157 DEFAULT_INTERRUPT (IMIB2, 89)
158 DEFAULT_INTERRUPT (OVI2, 90)
159 RESERVE_INTERRUPT ( 91)
160 DEFAULT_INTERRUPT (IMIA3, 92)
161 DEFAULT_INTERRUPT (IMIB3, 93)
162 DEFAULT_INTERRUPT (OVI3, 94)
163 RESERVE_INTERRUPT ( 95)
164 DEFAULT_INTERRUPT (IMIA4, 96)
165 DEFAULT_INTERRUPT (IMIB4, 97)
166 DEFAULT_INTERRUPT (OVI4, 98)
167 RESERVE_INTERRUPT ( 99)
168 DEFAULT_INTERRUPT (REI0, 100)
169 DEFAULT_INTERRUPT (RXI0, 101)
170 DEFAULT_INTERRUPT (TXI0, 102)
171 DEFAULT_INTERRUPT (TEI0, 103)
172 DEFAULT_INTERRUPT (REI1, 104)
173 DEFAULT_INTERRUPT (RXI1, 105)
174 DEFAULT_INTERRUPT (TXI1, 106)
175 DEFAULT_INTERRUPT (TEI1, 107)
176 RESERVE_INTERRUPT ( 108)
177 DEFAULT_INTERRUPT (ADITI, 109)
178
179/* UIE# block.
180 * Must go into the same section as the UIE() handler */
181
182 "\t.text\n"
183 "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
184 "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
185 "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
186 "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
187 "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
188 "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
189 "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
190 "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
191 "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
192 "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
193 "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
194 "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
195 "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
196 "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
197 "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
198 "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
199 "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
200 "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
201 "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
202 "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
203 "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
204 "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
205 "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
206 "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
207 "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
208 "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
209 "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
210 "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
211 "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
212 "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
213 "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
214 "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
215 "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
216 "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
217 "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
218 "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
219 "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
220 "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
221 "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
222 "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
223 "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
224 "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
225 "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
226 "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
227 "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
228 "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
229 "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
230 "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
231 "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
232 "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
233 "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
234 "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
235 "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
236 "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
237 "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
238 "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
239 "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
240 "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
241 "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
242 "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
243 "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
244 "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
245 "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
246 "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
247 "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
248 "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
249 "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
250 "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
251 "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
252 "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
253 "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
254 "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
255 "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
256 "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
257 "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
258 "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
259 "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
260 "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
261 "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
262 "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
263 "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
264 "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
265 "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
266 "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
267 "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
268 "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
269 "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
270 "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
271 "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
272 "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
273 "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
274 "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
275 "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
276 "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
277 "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
278 "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
279 "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
280 "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
281 "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
282 "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
283 "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
284 "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
285 "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
286 "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
287 "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
288 "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
289
290);
291
292extern void UIE4(void); /* needed for calculating the UIE number */
293
294void UIE (unsigned int pc) __attribute__((section(".text")));
295void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
296{
297 unsigned int n;
298
299 asm volatile ("sts\tpr,%0" : "=r"(n));
300
301 /* clear screen */
302#ifdef HAVE_LCD_BITMAP
303#if LCD_DEPTH > 1
304 lcd_set_backdrop(NULL);
305 lcd_set_drawmode(DRMODE_SOLID);
306 lcd_set_foreground(LCD_BLACK);
307 lcd_set_background(LCD_WHITE);
308#endif
309 lcd_setfont(FONT_SYSFIXED);
310 lcd_set_viewport(NULL);
311#endif
312
313 lcd_clear_display();
314 /* output exception */
315 n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
316 lcd_putsf(0, 0, "I%02x:%s", n, irqname[n]);
317 lcd_putsf(0, 1, "at %08x", pc);
318 lcd_update();
319
320 /* try to restart firmware if ON is pressed */
321 system_exception_wait();
322
323 /* enable the watchguard timer, but don't service it */
324 RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
325 TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
326 while (1);
327}
328
329void system_init(void)
330{
331 /* Disable all interrupts */
332 IPRA = 0;
333 IPRB = 0;
334 IPRC = 0;
335 IPRD = 0;
336 IPRE = 0;
337
338 /* NMI level low, falling edge on all interrupts */
339 ICR = 0;
340
341 /* Enable burst and RAS down mode on DRAM */
342 DCR |= 0x5000;
343
344 /* Activate Warp mode (simultaneous internal and external mem access) */
345 BCR |= 0x2000;
346
347 /* Bus state controller initializations. These are only necessary when
348 running from flash. */
349 WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
350 WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
351}
352
353void system_reboot (void)
354{
355 disable_irq();
356
357 asm volatile ("ldc\t%0,vbr" : : "r"(0));
358
359 PACR2 |= 0x4000; /* for coldstart detection */
360 IPRA = 0;
361 IPRB = 0;
362 IPRC = 0;
363 IPRD = 0;
364 IPRE = 0;
365 ICR = 0;
366
367 asm volatile ("jmp @%0; mov.l @%1,r15" : :
368 "r"(*(int*)0),"r"(4));
369}
370
371void system_exception_wait(void)
372{
373#if (CONFIG_LED == LED_REAL)
374 bool state = false;
375 int i = 0;
376#endif
377
378 while (1)
379 {
380#if (CONFIG_LED == LED_REAL)
381 if (--i <= 0)
382 {
383 state = !state;
384 led(state);
385 i = 240000;
386 }
387#endif
388
389#if CONFIG_KEYPAD == PLAYER_PAD
390 /* Player */
391 if (!(PADRL & 0x20))
392#elif CONFIG_KEYPAD == RECORDER_PAD
393 /* Recorder */
394#ifdef HAVE_FMADC
395 if (!(PCDR & 0x0008))
396#else
397 if (!(PBDRH & 0x01))
398#endif
399#elif CONFIG_KEYPAD == ONDIO_PAD
400 /* Ondio */
401 if (!(PCDR & 0x0008))
402#endif /* CONFIG_KEYPAD */
403 return;
404 }
405}
406
407/* Utilise the user break controller to catch invalid memory accesses. */
408int system_memory_guard(int newmode)
409{
410 static const struct {
411 unsigned long addr;
412 unsigned long mask;
413 unsigned short bbr;
414 } modes[MAXMEMGUARD] = {
415 /* catch nothing */
416 { 0x00000000, 0x00000000, 0x0000 },
417 /* catch writes to area 02 (flash ROM) */
418 { 0x02000000, 0x00FFFFFF, 0x00F8 },
419 /* catch all accesses to areas 00 (internal ROM) and 01 (free) */
420 { 0x00000000, 0x01FFFFFF, 0x00FC }
421 };
422
423 int oldmode = MEMGUARD_NONE;
424 int i;
425
426 /* figure out the old mode from what is in the UBC regs. If the register
427 values don't match any mode, assume MEMGUARD_NONE */
428 for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
429 {
430 if (BAR == modes[i].addr && BAMR == modes[i].mask &&
431 BBR == modes[i].bbr)
432 {
433 oldmode = i;
434 break;
435 }
436 }
437
438 if (newmode == MEMGUARD_KEEP)
439 newmode = oldmode;
440
441 BBR = 0; /* switch off everything first */
442
443 /* always set the UBC according to the mode, in case the old settings
444 didn't match any valid mode */
445 BAR = modes[newmode].addr;
446 BAMR = modes[newmode].mask;
447 BBR = modes[newmode].bbr;
448
449 return oldmode;
450}
diff --git a/firmware/target/sh/system-target.h b/firmware/target/sh/system-target.h
deleted file mode 100644
index a62a024823..0000000000
--- a/firmware/target/sh/system-target.h
+++ /dev/null
@@ -1,154 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 * Based on the work of Alan Korr and others
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22#ifndef SYSTEM_TARGET_H
23#define SYSTEM_TARGET_H
24
25#define or_b(mask, address) \
26 asm \
27 ("or.b %0,@(r0,gbr)" \
28 : \
29 : /* %0 */ I_CONSTRAINT((char)(mask)), \
30 /* %1 */ "z"(address-GBR))
31
32#define and_b(mask, address) \
33 asm \
34 ("and.b %0,@(r0,gbr)" \
35 : \
36 : /* %0 */ I_CONSTRAINT((char)(mask)), \
37 /* %1 */ "z"(address-GBR))
38
39#define xor_b(mask, address) \
40 asm \
41 ("xor.b %0,@(r0,gbr)" \
42 : \
43 : /* %0 */ I_CONSTRAINT((char)(mask)), \
44 /* %1 */ "z"(address-GBR))
45
46
47/****************************************************************************
48 * Interrupt level setting
49 * The level is left shifted 4 bits
50 ****************************************************************************/
51#define HIGHEST_IRQ_LEVEL (15<<4)
52
53static inline int set_irq_level(int level)
54{
55 int i;
56 /* Read the old level and set the new one */
57
58 /* Not volatile - will be optimized away if the return value isn't used */
59 asm ("stc sr, %0" : "=r" (i));
60 asm volatile ("ldc %0, sr" : : "r" (level));
61 return i;
62}
63
64static inline void enable_irq(void)
65{
66 int i;
67 asm volatile ("mov %1, %0 \n" /* Save a constant load from RAM */
68 "ldc %0, sr \n" : "=&r"(i) : "i"(0));
69}
70
71#define disable_irq() \
72 ((void)set_irq_level(HIGHEST_IRQ_LEVEL))
73
74#define disable_irq_save() \
75 set_irq_level(HIGHEST_IRQ_LEVEL)
76
77#define restore_irq(i) \
78 ((void)set_irq_level(i))
79
80static inline uint16_t swap16_hw(uint16_t value)
81 /*
82 result[15..8] = value[ 7..0];
83 result[ 7..0] = value[15..8];
84 */
85{
86 uint16_t result;
87 asm ("swap.b\t%1,%0" : "=r"(result) : "r"(value));
88 return result;
89}
90
91static inline uint32_t swaw32_hw(uint32_t value)
92 /*
93 result[31..16] = value[15.. 0];
94 result[15.. 0] = value[31..16];
95 */
96{
97 uint32_t result;
98 asm ("swap.w\t%1,%0" : "=r"(result) : "r"(value));
99 return result;
100}
101
102static inline uint32_t swap32_hw(uint32_t value)
103 /*
104 result[31..24] = value[ 7.. 0];
105 result[23..16] = value[15.. 8];
106 result[15.. 8] = value[23..16];
107 result[ 7.. 0] = value[31..24];
108 */
109{
110 asm ("swap.b\t%0,%0\n"
111 "swap.w\t%0,%0\n"
112 "swap.b\t%0,%0\n" : "+r"(value));
113 return value;
114}
115
116static inline uint32_t swap_odd_even32_hw(uint32_t value)
117{
118 /*
119 result[31..24],[15.. 8] = value[23..16],[ 7.. 0]
120 result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
121 */
122 asm ("swap.b\t%0,%0\n"
123 "swap.w\t%0,%0\n"
124 "swap.b\t%0,%0\n"
125 "swap.w\t%0,%0\n" : "+r"(value));
126 return value;
127}
128
129extern const unsigned bit_n_table[32];
130#define BIT_N(n) ( \
131 __builtin_constant_p(n) \
132 ? (1U << (n)) \
133 : bit_n_table[n] \
134)
135
136static inline void commit_dcache(void) {}
137static inline void commit_discard_dcache(void) {}
138static inline void commit_discard_idcache(void) {}
139
140/*---------------------------------------------------------------------------
141 * Put core in a power-saving state.
142 *---------------------------------------------------------------------------
143 */
144static inline void core_sleep(void)
145{
146 asm volatile (
147 "and.b #0x7f, @(r0, gbr) \n" /* Clear SBY (bit 7) in SBYCR */
148 "mov #0, r1 \n" /* Enable interrupts */
149 "ldc r1, sr \n" /* Following instruction cannot be interrupted */
150 "sleep \n" /* Execute standby */
151 : : "z"(&SBYCR-GBR) : "r1");
152}
153
154#endif /* SYSTEM_TARGET_H */
diff --git a/firmware/test/buflib/Makefile b/firmware/test/buflib/Makefile
deleted file mode 100644
index 33191c6cbe..0000000000
--- a/firmware/test/buflib/Makefile
+++ /dev/null
@@ -1,67 +0,0 @@
1FIRMWARE=../..
2
3CC ?= gcc
4# Note: Don't be fooled by MEMORYSIZE here
5# We have a fixed, predictable buffer in UT_core_allocator_init()
6CFLAGS += -g -O2 -DDEBUG -D__PCTOOL__ -DBUFLIB_UNIT_TEST -DMEMORYSIZE=8 -DBUFLIB_DEBUG_BLOCKS -std=gnu99 -I$(FIRMWARE)/include -I$(FIRMWARE)/export -I.
7LDFLAGS += -L. -lpthread
8
9.PHONY: clean all
10
11TARGETS_OBJ = test_main.o \
12 test_main2.o \
13 test_move.o \
14 test_move2.o \
15 test_max.o \
16 test_shrink.o \
17 test_shrink_unaligned.o \
18 test_shrink_startchanged.o \
19 test_shrink_cb.o
20
21TARGETS = $(TARGETS_OBJ:.o=)
22
23LIB_OBJ = buflib.o \
24 core_alloc.o \
25 crc32.o \
26 strlcpy.o \
27 util.o
28
29LIB_FILE = libbuflib.a
30LIB = buflib
31
32
33ifndef V
34SILENT:=@
35else
36VERBOSEOPT:=-v
37endif
38
39PRINTS=$(SILENT)$(call info,$(1))
40
41all: $(TARGETS)
42
43test_%: test_%.o $(LIB_FILE)
44 $(call PRINTS,LD $@)$(CC) $(LDFLAGS) -o $@ $< -l$(LIB)
45
46$(TARGETS): $(TARGETS_OBJ) $(LIB_FILE)
47
48buflib.o: $(FIRMWARE)/buflib.c
49 $(CC) $(CFLAGS) -c $< -o $@
50
51core_alloc.o: $(FIRMWARE)/core_alloc.c
52 $(CC) $(CFLAGS) -c $< -o $@
53
54crc32.o: $(FIRMWARE)/common/crc32.c
55 $(CC) $(CFLAGS) -c $< -o $@
56
57strlcpy.o: $(FIRMWARE)/common/strlcpy.c
58 $(CC) $(CFLAGS) -c $< -o $@
59
60%.o: %.c
61 $(call PRINTS,CC $<)$(CC) $(CFLAGS) -c $<
62
63$(LIB_FILE): $(LIB_OBJ)
64 $(call PRINTS,AR $@)ar rcs $@ $^
65
66clean:
67 rm *.o $(TARGETS) $(LIB_FILE)
diff --git a/firmware/test/buflib/autoconf.h b/firmware/test/buflib/autoconf.h
deleted file mode 100644
index abfaa482e1..0000000000
--- a/firmware/test/buflib/autoconf.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* Define endianess for the target or simulator platform */
2#define ROCKBOX_LITTLE_ENDIAN 1
diff --git a/firmware/test/buflib/system-hosted.h b/firmware/test/buflib/system-hosted.h
deleted file mode 100644
index 40b5ea8f9f..0000000000
--- a/firmware/test/buflib/system-hosted.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2015 Thomas Jarosch
11*
12* Loosely based upon rbcodecplatform-unix.h from rbcodec
13*
14* This program is free software; you can redistribute it and/or
15* modify it under the terms of the GNU General Public License
16* as published by the Free Software Foundation; either version 2
17* of the License, or (at your option) any later version.
18*
19* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20* KIND, either express or implied.
21*
22****************************************************************************/
23
24#ifndef _COMMON_UNITTEST_H
25#define _COMMON_UNITTEST_H
26
27/* debugf, logf */
28#define debugf(...) fprintf(stderr, __VA_ARGS__)
29
30#ifndef logf
31#define logf(...) do { fprintf(stderr, __VA_ARGS__); \
32 putc('\n', stderr); \
33 } while (0)
34#endif
35
36#ifndef panicf
37#define panicf(...) do { fprintf(stderr, __VA_ARGS__); \
38 putc('\n', stderr); \
39 exit(-1); \
40 } while (0)
41#endif
42
43#endif /* _COMMON_UNITTEST_H */
diff --git a/firmware/test/buflib/test_main.c b/firmware/test/buflib/test_main.c
deleted file mode 100644
index 83b95e4341..0000000000
--- a/firmware/test/buflib/test_main.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21
22#include <stdio.h>
23#include <stdlib.h>
24#include "buflib.h"
25#include "util.h"
26
27#define BUFLIB_BUFFER_SIZE (12<<10)
28static char buflib_buffer[BUFLIB_BUFFER_SIZE];
29static struct buflib_context ctx;
30#define assert(x) do { if (!(x)) exit(1); } while(0)
31
32int move_callback(int handle, void* current, void* new)
33{
34 (void)handle;(void)current;(void)new;
35 printf("Move!\n");
36}
37
38int shrink_callback(int handle, unsigned hints, void* start, size_t old_size)
39{
40 (void)handle;(void)start;(void)old_size;(void)hints;
41 printf("Shrink");
42}
43
44struct buflib_callbacks ops = {
45 .move_callback = move_callback,
46 .shrink_callback = shrink_callback,
47};
48
49int main(int argc, char **argv)
50{
51 buflib_init(&ctx, buflib_buffer, BUFLIB_BUFFER_SIZE);
52
53 int id = buflib_alloc_ex(&ctx, 512, "foo", &ops);
54 int id2 = buflib_alloc_ex(&ctx, 1024, "bar", &ops);
55 int id3 = buflib_alloc_ex(&ctx, 8<<10, "8K", &ops);
56
57 assert(id > 0 && id2 > 0 && id3 > 0);
58
59 #define STR "<TEST>"
60 strncpy(buflib_get_data(&ctx, id3), STR, sizeof STR);
61 if (id > 0)
62 {
63 buflib_print_allocs(&ctx, &print_handle);
64 buflib_free(&ctx, id);
65 buflib_print_allocs(&ctx, &print_handle);
66 buflib_free(&ctx, id2);
67 buflib_print_allocs(&ctx, &print_handle);
68
69 id = buflib_alloc_ex(&ctx, 3<<10, "should compact", &ops);
70 if (id <= 0) printf("compacting alloc failed\n");
71
72 buflib_print_allocs(&ctx, &print_handle);
73
74 printf("id I: %p\n", buflib_get_data(&ctx, id3));
75 id2 = buflib_alloc_ex(&ctx, 3<<10, "should fail", &ops);
76 printf("id II: %p\n", buflib_get_data(&ctx, id3));
77 if (id2 <= 0) printf("failing alloc failed\n");
78 else buflib_free(&ctx, id2);
79
80 if (id > 0)
81 buflib_free(&ctx, id);
82
83 printf("Check string: \"%s\"\n", buflib_get_data(&ctx, id3));
84 buflib_print_allocs(&ctx, &print_handle);
85 }
86
87 return 0;
88}
diff --git a/firmware/test/buflib/test_main2.c b/firmware/test/buflib/test_main2.c
deleted file mode 100644
index da6b1366e7..0000000000
--- a/firmware/test/buflib/test_main2.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include <stdlib.h>
23#include "core_alloc.h"
24#include "util.h"
25
26/*
27 * Expected output (64-bit):
28-------------------
29-------------------
30*/
31
32#define error(...) do { printf(__VA_ARGS__); exit(1); } while(0)
33static int move_callback(int handle, void* old, void* new)
34{
35 printf("MOVED!\n");
36 return BUFLIB_CB_OK;
37}
38
39static int shrink_callback(int handle, unsigned hints, void* start, size_t size)
40{
41 char* buf = start;
42
43 size_t wanted = hints & BUFLIB_SHRINK_SIZE_MASK;
44
45 if (handle == 4)
46 {
47 buf+=1, size-=1;
48 memmove(buf, buf-1, (size < 20) ? size : 20);
49 core_shrink(handle, buf, size);
50 return BUFLIB_CB_OK;
51 }
52 return BUFLIB_CB_CANNOT_SHRINK;
53}
54
55static struct buflib_callbacks ops = {
56 .move_callback = move_callback,
57 .shrink_callback = shrink_callback,
58};
59
60static struct buflib_callbacks ops2 = {
61 .move_callback = NULL,
62 .shrink_callback = shrink_callback,
63};
64
65int main(void)
66{
67 size_t size2, size4;
68 UT_core_allocator_init();
69
70 printf("available: %zu\n", core_available());
71 int first = core_alloc("first, fixed", 4<<10);
72 if (first <= 0) error("first failed\n");
73
74 printf("available: %zu\n", core_available());
75 int second = core_alloc_maximum("second, var", &size2, &ops);
76 if (second <= 0) error("second failed\n");
77 printf("second size: %zu\n", size2);
78
79 strcpy(core_get_data(second), "begin");
80 strcpy(core_get_data(second)+124, "end");
81 printf("%s\n", core_get_name(second));
82 if (!core_shrink(second, core_get_data(second), 128))
83 error("shrink second failed\n");
84
85 int third = core_alloc("third, fixed", 20<<10);
86 if (third <= 0) error("third failed");
87 strcpy(core_get_data(third), "third");
88
89 printf("available: %zu\n", core_available());
90 int fourth = core_alloc_maximum("fourth", &size4, &ops2);
91 if (fourth <= 0) error("fourth failed\n");
92 core_print_blocks(&print_simple);
93 if (!core_shrink(fourth, core_get_data(fourth)+(5<<10), size4-(5<<10)))
94 {
95 error("shrink fourth failed\n");
96 }
97 sprintf(core_get_data(fourth), "fourth size: %zu", size4);
98 core_print_blocks(&print_simple);
99
100 int fifth = core_alloc("fifth, fixed", 6<<10);
101 if (fifth <= 0) error("fifth failed\n");
102
103 printf("%s\n", core_get_data(fourth));
104 core_print_blocks(&print_simple);
105 core_print_allocs(&print_simple);
106
107 return 0;
108}
diff --git a/firmware/test/buflib/test_max.c b/firmware/test/buflib/test_max.c
deleted file mode 100644
index 5378fcf6bd..0000000000
--- a/firmware/test/buflib/test_max.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24
25
26/*
27 * Expected output (64bit):
28-------------------
29get_all(1): 0x6027a0
30 0x6027c8
31 6424
32get_all(1): 0x6027a0
33 0x6027c8
34 3232
35get_all(1): 0x6027a0
36 0x6027c8
37 3232
38dont freeze(2): 0x603440
39 0x603470
40 152
410x6027a0: val: 404 (get_all)
420x603440: val: 19 (dont freeze)
43-------------------
44*/
45struct buflib_callbacks ops;
46int main(void)
47{
48 UT_core_allocator_init();
49 size_t size;
50 int handle = core_alloc_maximum("get_all", &size, &ops);
51
52 if (handle <= 0)
53 printf("core_alloc_maximum error\n");
54 int handle2;
55
56 core_print_allocs(&print_simple);
57
58 /* this should freeze */
59 // core_alloc("freeze", 100);
60 core_shrink(handle, core_get_data(handle), size/2);
61
62 core_print_allocs(&print_simple);
63
64 /* this should not freeze anymore */
65 handle2 = core_alloc("dont freeze", 100);
66 if (handle2 <= 0)
67 printf("handle 2 failed!\n");
68
69 core_print_allocs(&print_simple);
70 core_print_blocks(&print_simple);
71
72 core_free(handle);
73 core_free(handle2);
74 return 0;
75}
diff --git a/firmware/test/buflib/test_move.c b/firmware/test/buflib/test_move.c
deleted file mode 100644
index cf6168a311..0000000000
--- a/firmware/test/buflib/test_move.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24
25static int move_size;
26int move_callback(int handle, void* old, void* new)
27{
28 move_size = (char*)old-(char*)new;
29 printf("Move! %s, %p, %p, %zu\n", core_get_name(handle), old, new,
30 move_size);
31
32 return BUFLIB_CB_OK;
33}
34
35struct buflib_callbacks ops = {
36 .move_callback = move_callback,
37 .shrink_callback = NULL,
38};
39
40int main(void)
41{
42 UT_core_allocator_init();
43
44 int first = core_alloc("first", 20<<10);
45 int second= core_alloc_ex("second", 20<<10, &ops);
46 strcpy(core_get_data(second), "Here's data");
47
48 core_free(first);
49 /* should not trigger compaction, but replace the just freed one */
50 int third = core_alloc("third", 20<<10);
51 core_free(third);
52 /* should trigger compaction since it's a bit bigger than the just freed one */
53 int fourth = core_alloc("fourth", 21<<10);
54
55 int ret = !(!strcmp(core_get_data(second), "Here's data") && move_size >= 20<<10);
56
57 core_print_blocks(&print_simple);
58
59 core_free(second);
60 core_free(third);
61
62 return ret;
63}
diff --git a/firmware/test/buflib/test_move2.c b/firmware/test/buflib/test_move2.c
deleted file mode 100644
index 2f72850b2b..0000000000
--- a/firmware/test/buflib/test_move2.c
+++ /dev/null
@@ -1,132 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24/*
25 * Expected output (64bit)
26--------------------
27after freeing first: available: 10040
28after freeing forth: available: 10040
29buflib_compact(): Compacting!
30move_block(): moving "third"(id=3) by -3210(-25680)
31Move! third, 0x608758, 0x602308, 25680
32Cannot move now for handle 3
33fifth failed. Retrying...
34buflib_compact(): Compacting!
35move_block(): moving "third"(id=3) by -3210(-25680)
36Move! third, 0x608758, 0x602308, 25680
37fifth handle: 1
38fifth(1): 0x608730
39 0x608758
40 21544
41second(2): 0x607308
42 0x607330
43 5160
44third(3): 0x6022e0
45 0x602308
46 15400
47sixth(4): 0x605f08
48 0x605f30
49 2088
50seventh(5): 0x606730
51 0x606758
52 552
530x6022e0: val: 1925 (third)
540x605f08: val: 261 (sixth)
550x606730: val: 69 (seventh)
560x606958: val: -310 (<unallocated>)
570x607308: val: 645 (second)
580x608730: val: 2693 (fifth)
59--------------------
60*/
61
62static int move_size, retry;
63int move_callback(int handle, void* old, void* new)
64{
65 move_size = (char*)old-(char*)new;
66 printf("Move! %s, %p, %p, %d\n", core_get_name(handle), old, new,
67 move_size);
68
69 if (!retry)
70 {
71 retry = 1;
72 printf("Cannot move now for handle %d\n", handle);
73 return BUFLIB_CB_CANNOT_MOVE;
74 }
75 return BUFLIB_CB_OK;
76}
77
78struct buflib_callbacks ops = {
79 .move_callback = move_callback,
80 .shrink_callback = NULL,
81};
82
83static struct buflib_callbacks ops_no_move = {
84 .move_callback = NULL,
85 .shrink_callback = NULL,
86};
87
88int main(void)
89{
90 UT_core_allocator_init();
91
92 int first = core_alloc("first", 20<<10);
93 int second= core_alloc_ex("second", 5<<10, &ops_no_move);
94 int third = core_alloc_ex("third", 15<<10, &ops);
95 strcpy(core_get_data(second), "Here's data");
96
97 core_free(first);
98 printf("after freeing first: available: %zu\n", core_available());
99 /* should not trigger compaction, but replace the just freed one */
100 int fourth = core_alloc("forth", 20<<10);
101 core_free(fourth);
102 printf("after freeing forth: available: %zu\n", core_available());
103 /* should trigger compaction since it's a bit bigger than the just freed one */
104 int fifth = core_alloc("fifth", 21<<10);
105 if (fifth <= 0)
106 {
107 printf("fifth failed. Retrying...\n");
108 fifth = core_alloc("fifth", 21<<10);
109 }
110 if (fifth <= 0)
111 {
112 printf("fifth still failed\n");
113 }
114
115 printf("fifth handle: %d\n", fifth);
116 int sixth = core_alloc("sixth", 2<<10);
117 int seventh = core_alloc("seventh", 512);
118
119
120 core_print_allocs(&print_simple);
121 core_print_blocks(&print_simple);
122 int ret = !(!strcmp(core_get_data(second), "Here's data") && move_size >= 20<<10);
123
124 core_free(second);
125 core_free(third);
126 if (fifth > 0)
127 core_free(fifth);
128 core_free(sixth);
129 core_free(seventh);
130
131 return ret;
132}
diff --git a/firmware/test/buflib/test_shrink.c b/firmware/test/buflib/test_shrink.c
deleted file mode 100644
index 7424f56d51..0000000000
--- a/firmware/test/buflib/test_shrink.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24
25/*
26 * Expected output:
27-------------------
280x602520: val: 1285 (first)
290x604d48: val: -32 (<unallocated>)
300x604e48: val: 1221 (second)
310x607470: val: -32 (<unallocated>)
320x607570: val: 1285 (third)
33-------------------
34*/
35struct buflib_callbacks ops;
36
37int main(void)
38{
39 UT_core_allocator_init();
40
41 int first = core_alloc("first", 10<<10);
42 int second = core_alloc("second", 10<<10);
43 int third = core_alloc("third", 10<<10);
44
45 strcpy((char*)core_get_data(second)+0x100, "foobar");
46 core_shrink(second, (char*)core_get_data(second)+0x100, (10<<10)-0x200);
47 core_print_blocks(&print_simple);
48
49 int ret = strcmp(core_get_data(second), "foobar");
50
51 core_free(first);
52 core_free(second);
53 core_free(third);
54
55 return ret;
56}
diff --git a/firmware/test/buflib/test_shrink_cb.c b/firmware/test/buflib/test_shrink_cb.c
deleted file mode 100644
index 8c2c02ed1c..0000000000
--- a/firmware/test/buflib/test_shrink_cb.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include <stdlib.h>
23#include "core_alloc.h"
24#include "util.h"
25
26/*
27 * Expected output (64-bit):
28-------------------
29MOVED!
300x6032e0: val: 1285 (first)
310x605b08: val: 1285 (third)
320x608330: val: 1413 (fourth)
330x60af58: val: 2181 (fifth)
34SHRINK! 517
35MOVED!
360x6032e0: val: 1285 (first)
370x605b08: val: 645 (third)
380x606f30: val: 1413 (fourth)
390x609b58: val: 2181 (fifth)
400x60df80: val: 517 (sixth)
41-------------------
42*/
43
44#define error(...) do { printf(__VA_ARGS__); exit(1); } while(0)
45static int move_callback(int handle, void* old, void* new)
46{
47 printf("MOVED!\n");
48 return BUFLIB_CB_OK;
49}
50
51static int shrink_callback(int handle, unsigned hints, void* start, size_t size)
52{
53 char* buf = start;
54 size /= 2;
55
56 printf("SHRINK! %u\n", hints);
57
58 memmove(buf + size/2, buf, size);
59 if (core_shrink(handle, buf + size/2, size))
60 {
61 return BUFLIB_CB_OK;
62 }
63 return BUFLIB_CB_CANNOT_SHRINK;
64}
65
66struct buflib_callbacks ops = {
67 .move_callback = move_callback,
68 .shrink_callback = shrink_callback,
69};
70
71int main(void)
72{
73 UT_core_allocator_init();
74
75 int first = core_alloc("first", 10<<10);
76 int second = core_alloc("second", 10<<10);
77 int third = core_alloc_ex("third", 10<<10, &ops);
78
79 strcpy(core_get_data(third), "third");
80
81 core_free(second);
82 int fourth = core_alloc("fourth", 11<<10);
83 strcpy(core_get_data(fourth), "fourth");
84
85 /* this should cause MOVED! twice */
86 int fifth = core_alloc("fifth", 17<<10);
87 if (fifth <= 0) error("fifth failed\n");
88 strcpy(core_get_data(fifth), "fifth");
89
90 core_print_blocks(&print_simple);
91 int sixth = core_alloc("sixth", 4<<10);
92 if (sixth <= 0) error("sixth failed\n");
93 strcpy(core_get_data(sixth), "sixth");
94
95 core_print_blocks(&print_simple);
96
97 int ret = strcmp(core_get_data(third), "third")
98 || strcmp(core_get_data(fourth), "fourth")
99 || strcmp(core_get_data(fifth), "fifth")
100 || strcmp(core_get_data(sixth), "sixth");
101 core_free(first);
102 core_free(third);
103 core_free(fourth);
104 core_free(fifth);
105 core_free(sixth);
106
107 return ret;
108}
diff --git a/firmware/test/buflib/test_shrink_startchanged.c b/firmware/test/buflib/test_shrink_startchanged.c
deleted file mode 100644
index 63b864db88..0000000000
--- a/firmware/test/buflib/test_shrink_startchanged.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24
25/*
26 * Expected output:
27-------------------
280x602620: val: 1285 (first)
290x604e48: val: -32 (<unallocated>)
300x604f48: val: 1253 (second)
310x607670: val: 1285 (third)
32-------------------
33*/
34struct buflib_callbacks ops;
35
36int main(void)
37{
38 UT_core_allocator_init();
39
40 int first = core_alloc("first", 10<<10);
41 int second = core_alloc("second", 10<<10);
42 int third = core_alloc("third", 10<<10);
43
44 strcpy(core_get_data(third), "baz");
45
46 strcpy((char*)core_get_data(second)+0x102, "foobar");
47 core_shrink(second, (char*)core_get_data(second)+0x102, (10<<10)-0x102);
48 memset(core_get_data(second) + sizeof("foobar"), 0, (10<<10)-0x102-sizeof("foobar"));
49 core_print_blocks(&print_simple);
50
51 int ret = strcmp(core_get_data(second), "foobar")
52 || strcmp(core_get_data(third), "baz");
53
54 core_free(first);
55 core_free(second);
56 core_free(third);
57
58 return ret;
59}
diff --git a/firmware/test/buflib/test_shrink_unaligned.c b/firmware/test/buflib/test_shrink_unaligned.c
deleted file mode 100644
index 0f07685f65..0000000000
--- a/firmware/test/buflib/test_shrink_unaligned.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2011 Thomas Martitz
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include <stdio.h>
22#include "core_alloc.h"
23#include "util.h"
24
25/*
26 * Expected output:
27-------------------
280x602520: val: 1285 (first)
290x604d48: val: -32 (<unallocated>)
300x604e48: val: 1222 (second)
310x607470: val: -31 (<unallocated>)
320x607570: val: 1285 (third)
33-------------------
34*/
35struct buflib_callbacks ops;
36
37int main(void)
38{
39 UT_core_allocator_init();
40
41 int first = core_alloc("first", 10<<10);
42 int second = core_alloc("second", 10<<10);
43 int third = core_alloc("third", 10<<10);
44
45 strcpy((char*)core_get_data(second)+0x102, "foobar");
46 core_shrink(second, (char*)core_get_data(second)+0x102, (10<<10)-0x200);
47 core_print_blocks(&print_simple);
48
49 int ret = strcmp(core_get_data(second), "foobar");
50
51 core_free(first);
52 core_free(second);
53 core_free(third);
54
55 return ret;
56}
diff --git a/firmware/test/buflib/util.c b/firmware/test/buflib/util.c
deleted file mode 100644
index 66a02e8a0d..0000000000
--- a/firmware/test/buflib/util.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2015 Thomas Jarosch
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21#include "util.h"
22#include "stdio.h"
23#include "buflib.h"
24#include "system.h"
25
26void print_simple(const char *str)
27{
28 printf("%s\n", str);
29}
30
31void print_handle(int handle_num, const char *str)
32{
33 (void)handle_num;
34 printf("%s\n", str);
35}
36
37/* fake core_allocator_init() with a fixed 50kb buffer size */
38void UT_core_allocator_init()
39{
40 extern struct buflib_context core_ctx;
41 static char buf[50<<10];
42 unsigned char *raw_start = buf;
43 unsigned char *aligned_start = ALIGN_UP(raw_start, sizeof(intptr_t));
44
45 buflib_init(&core_ctx, aligned_start, sizeof(buf) - (aligned_start - raw_start));
46}
47
48/* TODO: those should be part of core_alloc */
49void core_print_blocks(void (*print)(const char*))
50{
51 (void)print;
52 extern struct buflib_context core_ctx;
53 buflib_print_blocks(&core_ctx, &print_handle);
54}
55
56void core_print_allocs(void (*print)(const char*))
57{
58 (void)print;
59 extern struct buflib_context core_ctx;
60 buflib_print_allocs(&core_ctx, &print_handle);
61}
diff --git a/firmware/test/buflib/util.h b/firmware/test/buflib/util.h
deleted file mode 100644
index 1b03bbbed5..0000000000
--- a/firmware/test/buflib/util.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id$
9*
10* Copyright (C) 2015 Thomas Jarosch
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21
22#ifndef _TEST_UTIL_H
23#define _TEST_UTIL_H
24
25void print_simple(const char *string);
26void print_handle(int handle_num, const char *string);
27
28void UT_core_allocator_init();
29
30#endif
diff --git a/firmware/test/fat/Makefile b/firmware/test/fat/Makefile
deleted file mode 100644
index 38bce0bde1..0000000000
--- a/firmware/test/fat/Makefile
+++ /dev/null
@@ -1,49 +0,0 @@
1SECTOR_SIZE = 512
2FIRMWARE = ../..
3
4DRIVERS = ../../drivers
5EXPORT = ../../export
6
7BUILDDATE=$(shell date -u +'-DYEAR=%Y -DMONTH=%m -DDAY=%d')
8INCLUDE = -I$(EXPORT) -I$(FIRMWARE)/include -I$(FIRMWARE)/target/hosted -I$(FIRMWARE)/target/hosted/sdl
9DEFINES = -DTEST_FAT -DDEBUG -DDISK_WRITE -DHAVE_FAT16SUPPORT -D__PCTOOL__
10
11CFLAGS = -g -Wall -std=gnu99 -Wno-pointer-sign $(DEFINES) $(BUILDDATE) -I. $(INCLUDE) -I$(FIRMWARE)/libc/include -DROCKBOX_DIR='".rockbox"' -DSECTOR_SIZE=$(SECTOR_SIZE)
12SIMFLAGS = -g -Wall -std=gnu99 -Wno-pointer-sign $(DEFINES) -I. $(INCLUDE) -DSECTOR_SIZE=$(SECTOR_SIZE)
13
14TARGET = fat
15
16all: $(TARGET)
17
18$(TARGET): fat.o ata-sim.o main.o disk.o dir.o file.o ctype.o unicode.o strlcpy.o
19 gcc -g -o fat $+
20
21fat.o: $(DRIVERS)/fat.c $(EXPORT)/fat.h $(EXPORT)/ata.h
22 $(CC) $(CFLAGS) -c $< -o $@
23
24ctype.o: $(FIRMWARE)/libc/ctype.c
25 $(CC) $(CFLAGS) -c $< -o $@
26
27disk.o: $(FIRMWARE)/common/disk.c
28 $(CC) $(CFLAGS) -c $< -o $@
29
30dir.o: $(FIRMWARE)/common/dir_uncached.c
31 $(CC) $(CFLAGS) -c $< -o $@
32
33file.o: $(FIRMWARE)/common/file.c
34 $(CC) $(CFLAGS) -c $< -o $@
35
36unicode.o: $(FIRMWARE)/common/unicode.c
37 $(CC) $(CFLAGS) -c $< -o $@
38
39strlcpy.o: $(FIRMWARE)/common/strlcpy.c
40 $(CC) $(CFLAGS) -c $< -o $@
41
42ata-sim.o: ata-sim.c $(EXPORT)/ata.h
43 $(CC) $(SIMFLAGS) -c $< -o $@
44
45main.o: main.c $(EXPORT)/ata.h
46 $(CC) $(SIMFLAGS) -c $< -o $@
47
48clean:
49 rm -f *.o $(TARGET)
diff --git a/firmware/test/fat/README b/firmware/test/fat/README
deleted file mode 100644
index 58ffe7ffa8..0000000000
--- a/firmware/test/fat/README
+++ /dev/null
@@ -1,32 +0,0 @@
1This code is for testing the Rockbox fat code on a dummy drive image file.
2
3Dummy image
4-----------
5Here's how to create a 1 gig dummy drive image in linux:
6
7# dd if=/dev/hda of=disk.img bs=1M count=1024
8
9You can then format disk.img as a FAT32 partition:
10
11# mkdosfs -F 32 disk.img
12
13To mount the image, your linux kernel must include the loopback device:
14
15# mount -o loop disk.img /mnt/image
16
17Now copy some test data to the disk, umount it and start testing.
18
19The test script mounts the disk image in order to initialize it will a number
20of dummy files. Since users are no longer allowed to mount loopback devices,
21you can either run the test script as root (not recommended) or add a line to
22your fstab file:
23
24/path/to/disk.img /mnt/dummy vfat loop,users,noauto 0 0
25
26
27Test code
28---------
29The files in this dir build the 'fat' program. It will read 'disk.img' and
30treat is as a real disk, thanks to the ata-sim.c module.
31
32Modify the main.c source code to make it perform the tests you want.
diff --git a/firmware/test/fat/ata-sim.c b/firmware/test/fat/ata-sim.c
deleted file mode 100644
index 07b772f433..0000000000
--- a/firmware/test/fat/ata-sim.c
+++ /dev/null
@@ -1,68 +0,0 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <string.h>
4#include "debug.h"
5
6static FILE* file;
7
8void panicf( const char *fmt, ... );
9
10int storage_read_sectors(unsigned long start, int count, void* buf)
11{
12 if ( count > 1 )
13 DEBUGF("[Reading %d blocks: 0x%lx to 0x%lx]\n",
14 count, start, start+count-1);
15 else
16 DEBUGF("[Reading block 0x%lx]\n", start);
17
18 if(fseek(file,start*SECTOR_SIZE,SEEK_SET)) {
19 perror("fseek");
20 return -1;
21 }
22 if(!fread(buf,SECTOR_SIZE,count,file)) {
23 DEBUGF("ata_write_sectors(0x%lx, 0x%x, %p)\n", start, count, buf );
24 perror("fread");
25 panicf("Disk error\n");
26 }
27 return 0;
28}
29
30int storage_write_sectors(unsigned long start, int count, void* buf)
31{
32 if ( count > 1 )
33 DEBUGF("[Writing %d blocks: 0x%lx to 0x%lx]\n",
34 count, start, start+count-1);
35 else
36 DEBUGF("[Writing block 0x%lx]\n", start);
37
38 if (start == 0)
39 panicf("Writing on sector 0!\n");
40
41 if(fseek(file,start*SECTOR_SIZE,SEEK_SET)) {
42 perror("fseek");
43 return -1;
44 }
45 if(!fwrite(buf,SECTOR_SIZE,count,file)) {
46 DEBUGF("ata_write_sectors(0x%lx, 0x%x, %p)\n", start, count, buf );
47 perror("fwrite");
48 panicf("Disk error\n");
49 }
50 return 0;
51}
52
53int ata_init(void)
54{
55 char* filename = "disk.img";
56 /* check disk size */
57 file=fopen(filename,"rb+");
58 if(!file) {
59 fprintf(stderr, "read_disk() - Could not find \"%s\"\n",filename);
60 return -1;
61 }
62 return 0;
63}
64
65void ata_exit(void)
66{
67 fclose(file);
68}
diff --git a/firmware/test/fat/autoconf.h b/firmware/test/fat/autoconf.h
deleted file mode 100644
index e5a91790af..0000000000
--- a/firmware/test/fat/autoconf.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/* fake autoconf for fat testing */
2
3#ifndef __BUILD_AUTOCONF_H
4#define __BUILD_AUTOCONF_H
5
6/* assume little endian for now */
7#define ROCKBOX_LITTLE_ENDIAN 1
8
9#endif
diff --git a/firmware/test/fat/main.c b/firmware/test/fat/main.c
deleted file mode 100644
index e838682b0b..0000000000
--- a/firmware/test/fat/main.c
+++ /dev/null
@@ -1,724 +0,0 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <string.h>
4#include <stdarg.h>
5#include <time.h>
6#include "fat.h"
7#include "debug.h"
8#include "disk.h"
9#include "dir.h"
10#include "file.h"
11#include "ata.h"
12#include "storage.h"
13
14void dbg_dump_sector(int sec);
15void dbg_dump_buffer(unsigned char *buf, int len, int offset);
16void dbg_console(void);
17
18void mutex_init(struct mutex* l) {}
19void mutex_lock(struct mutex* l) {}
20void mutex_unlock(struct mutex* l) {}
21
22void panicf( char *fmt, ...)
23{
24 va_list ap;
25 va_start( ap, fmt );
26 fprintf(stderr,"***PANIC*** ");
27 vfprintf(stderr, fmt, ap );
28 va_end( ap );
29 exit(1);
30}
31
32void debugf(const char *fmt, ...)
33{
34 va_list ap;
35 va_start( ap, fmt );
36 fprintf(stderr,"DEBUGF: ");
37 vfprintf( stderr, fmt, ap );
38 va_end( ap );
39}
40
41void ldebugf(const char* file, int line, const char *fmt, ...)
42{
43 va_list ap;
44 va_start( ap, fmt );
45 fprintf( stderr, "%s:%d ", file, line );
46 vfprintf( stderr, fmt, ap );
47 va_end( ap );
48}
49
50void dbg_dump_sector(int sec)
51{
52 unsigned char buf[SECTOR_SIZE];
53
54 storage_read_sectors(sec,1,buf);
55 DEBUGF("---< Sector %d >-----------------------------------------\n", sec);
56 dbg_dump_buffer(buf, SECTOR_SIZE, 0);
57}
58
59void dbg_dump_buffer(unsigned char *buf, int len, int offset)
60{
61 int i, j;
62 unsigned char c;
63 unsigned char ascii[33];
64
65 for(i = 0;i < len/16;i++)
66 {
67 DEBUGF("%03x: ", i*16 + offset);
68 for(j = 0;j < 16;j++)
69 {
70 c = buf[i*16+j];
71
72 DEBUGF("%02x ", c);
73 if(c < 32 || c > 127)
74 {
75 ascii[j] = '.';
76 }
77 else
78 {
79 ascii[j] = c;
80 }
81 }
82
83 ascii[j] = 0;
84 DEBUGF("%s\n", ascii);
85 }
86}
87
88void dbg_dir(char* currdir)
89{
90 DIR* dir;
91 struct dirent* entry;
92
93 dir = opendir(currdir);
94 if (dir)
95 {
96 while ( (entry = readdir(dir)) ) {
97 DEBUGF("%15s %lx\n", entry->d_name, entry->startcluster);
98 }
99 closedir(dir);
100 }
101 else
102 {
103 DEBUGF( "Could not open dir %s\n", currdir);
104 }
105}
106
107#define CHUNKSIZE 8
108#define BUFSIZE 8192
109
110int dbg_mkfile(char* name, int num)
111{
112 char text[BUFSIZE+1];
113 int i;
114 int fd;
115 int x=0;
116 bool stop = false;
117
118 fd = creat(name,O_WRONLY);
119 if (fd<0) {
120 DEBUGF("Failed creating file\n");
121 return -1;
122 }
123 num *= 1024;
124 while ( num ) {
125 int rc;
126 int len = num > BUFSIZE ? BUFSIZE : num;
127
128 for (i=0; i<len/CHUNKSIZE; i++ )
129 sprintf(text+i*CHUNKSIZE,"%c%06x,",name[1],x++);
130
131 rc = write(fd, text, len);
132 if ( rc < 0 ) {
133 DEBUGF("Failed writing data\n");
134 return -1;
135 }
136 else
137 if ( rc == 0 ) {
138 DEBUGF("No space left\n");
139 return -2;
140 }
141 else
142 DEBUGF("wrote %d bytes\n",rc);
143
144 num -= len;
145
146 if ( !num ) {
147 if ( stop )
148 break;
149
150 /* add a random number of chunks to test byte-copy code */
151 num = ((int) rand() % SECTOR_SIZE) & ~7;
152 LDEBUGF("Adding random size %d\n",num);
153 stop = true;
154 }
155 }
156
157 return close(fd);
158}
159
160
161int dbg_chkfile(char* name, int size)
162{
163 char text[81920];
164 int i;
165 int x=0;
166 int pos = 0;
167 int block=0;
168 int fd = open(name,O_RDONLY);
169 if (fd<0) {
170 DEBUGF("Failed opening file\n");
171 return -1;
172 }
173
174 size = lseek(fd, 0, SEEK_END);
175 DEBUGF("File is %d bytes\n", size);
176 /* random start position */
177 if ( size )
178 pos = ((int)rand() % size) & ~7;
179 lseek(fd, pos, SEEK_SET);
180 x = pos / CHUNKSIZE;
181
182 LDEBUGF("Check base is %x (%d)\n",x,pos);
183
184 while (1) {
185 int rc = read(fd, text, sizeof text);
186 DEBUGF("read %d bytes\n",rc);
187 if (rc < 0) {
188 panicf("Failed reading data\n");
189 }
190 else {
191 char tmp[CHUNKSIZE+1];
192 if (!rc)
193 break;
194 for (i=0; i<rc/CHUNKSIZE; i++ ) {
195 sprintf(tmp,"%c%06x,",name[1],x++);
196 if (strncmp(text+i*CHUNKSIZE,tmp,CHUNKSIZE)) {
197 int idx = pos + block*sizeof(text) + i*CHUNKSIZE;
198 DEBUGF("Mismatch in byte 0x%x (byte 0x%x of sector 0x%x)."
199 "\nExpected %.8s found %.8s\n",
200 idx, idx % SECTOR_SIZE, idx / SECTOR_SIZE,
201 tmp,
202 text+i*CHUNKSIZE);
203 DEBUGF("i=%x, idx=%x\n",i,idx);
204 dbg_dump_buffer(text+i*CHUNKSIZE - 0x20, 0x40, idx - 0x20);
205 return -1;
206 }
207 }
208 }
209 block++;
210 }
211
212 return close(fd);
213}
214
215int dbg_wrtest(char* name)
216{
217 char text[81920];
218 int i;
219 int x=0;
220 int pos = 0;
221 int block=0;
222 int size, fd, rc;
223 char tmp[CHUNKSIZE+1];
224
225 fd = open(name,O_RDWR);
226 if (fd<0) {
227 DEBUGF("Failed opening file\n");
228 return -1;
229 }
230
231 size = lseek(fd, 0, SEEK_END);
232 DEBUGF("File is %d bytes\n", size);
233 /* random start position */
234 if ( size )
235 pos = ((int)rand() % size) & ~7;
236 rc = lseek(fd, pos, SEEK_SET);
237 if ( rc < 0 )
238 panicf("Failed seeking\n");
239 x = pos / CHUNKSIZE;
240 LDEBUGF("Check base is %x (%d)\n",x,pos);
241
242 sprintf(tmp,"%c%06x,",name[1],x++);
243 rc = write(fd, tmp, 8);
244 if ( rc < 0 )
245 panicf("Failed writing data\n");
246
247 if ( size )
248 pos = ((int)rand() % size) & ~7;
249 rc = lseek(fd, pos, SEEK_SET);
250 if ( rc < 0 )
251 panicf("Failed seeking\n");
252 x = pos / CHUNKSIZE;
253 LDEBUGF("Check base 2 is %x (%d)\n",x,pos);
254
255 while (1) {
256 rc = read(fd, text, sizeof text);
257 DEBUGF("read %d bytes\n",rc);
258 if (rc < 0) {
259 panicf("Failed reading data\n");
260 }
261 else {
262 if (!rc)
263 break;
264 for (i=0; i<rc/CHUNKSIZE; i++ ) {
265 sprintf(tmp,"%c%06x,",name[1],x++);
266 if (strncmp(text+i*CHUNKSIZE,tmp,CHUNKSIZE)) {
267 int idx = pos + block*sizeof(text) + i*CHUNKSIZE;
268 DEBUGF("Mismatch in byte 0x%x (byte 0x%x of sector 0x%x)."
269 "\nExpected %.8s found %.8s\n",
270 idx, idx % SECTOR_SIZE, idx / SECTOR_SIZE,
271 tmp,
272 text+i*CHUNKSIZE);
273 DEBUGF("i=%x, idx=%x\n",i,idx);
274 dbg_dump_buffer(text+i*CHUNKSIZE - 0x20, 0x40, idx - 0x20);
275 return -1;
276 }
277 }
278 }
279 block++;
280 }
281
282 return close(fd);
283}
284
285void dbg_type(char* name)
286{
287 const int size = SECTOR_SIZE*5;
288 unsigned char buf[SECTOR_SIZE*5+1];
289 int fd,rc;
290
291 fd = open(name,O_RDONLY);
292 if (fd<0)
293 return;
294 DEBUGF("Got file descriptor %d\n",fd);
295
296 while ( 1 ) {
297 rc = read(fd, buf, size);
298 if( rc > 0 )
299 {
300 buf[size] = 0;
301 printf("%d: %.*s\n", rc, rc, buf);
302 }
303 else if ( rc == 0 ) {
304 DEBUGF("EOF\n");
305 break;
306 }
307 else
308 {
309 DEBUGF("Failed reading file: %d\n",rc);
310 break;
311 }
312 }
313 close(fd);
314}
315
316int dbg_append(char* name)
317{
318 int x=0;
319 int size, fd, rc;
320 char tmp[CHUNKSIZE+1];
321
322 fd = open(name,O_RDONLY);
323 if (fd<0) {
324 DEBUGF("Failed opening file\n");
325 return -1;
326 }
327
328 size = lseek(fd, 0, SEEK_END);
329 DEBUGF("File is %d bytes\n", size);
330 x = size / CHUNKSIZE;
331 LDEBUGF("Check base is %x (%d)\n",x,size);
332
333 if (close(fd) < 0)
334 return -1;
335
336 fd = open(name,O_RDWR|O_APPEND);
337 if (fd<0) {
338 DEBUGF("Failed opening file\n");
339 return -1;
340 }
341
342 sprintf(tmp,"%c%06x,",name[1],x++);
343 rc = write(fd, tmp, 8);
344 if ( rc < 0 )
345 panicf("Failed writing data\n");
346
347 return close(fd);
348}
349
350int dbg_test(char* name)
351{
352 int x=0;
353 int j;
354 int fd;
355 char text[BUFSIZE+1];
356
357 for (j=0; j<5; j++) {
358 int num = 40960;
359
360 fd = open(name,O_WRONLY|O_CREAT|O_APPEND, 0666);
361 if (fd<0) {
362 DEBUGF("Failed opening file\n");
363 return -1;
364 }
365
366 while ( num ) {
367 int rc, i;
368 int len = num > BUFSIZE ? BUFSIZE : num;
369
370 for (i=0; i<len/CHUNKSIZE; i++ )
371 sprintf(text+i*CHUNKSIZE,"%c%06x,",name[1],x++);
372
373 rc = write(fd, text, len);
374 if ( rc < 0 ) {
375 DEBUGF("Failed writing data\n");
376 return -1;
377 }
378 else
379 if ( rc == 0 ) {
380 DEBUGF("No space left\n");
381 return -2;
382 }
383 else
384 DEBUGF("wrote %d bytes\n",rc);
385
386 num -= len;
387 }
388
389 if (close(fd) < 0)
390 return -1;
391 }
392
393 return 0;
394}
395
396int dbg_dump(char* name, int offset)
397{
398 char buf[SECTOR_SIZE];
399
400 int rc;
401 int fd = open(name,O_RDONLY);
402 if (fd<0) {
403 DEBUGF("Failed opening file\n");
404 return -1;
405 }
406 lseek(fd, offset, SEEK_SET);
407 rc = read(fd, buf, sizeof buf);
408
409 if ( rc < 0 )
410 panicf("Error reading data\n");
411
412 if (close(fd) < 0)
413 return -1;
414
415 dbg_dump_buffer(buf, rc, offset);
416
417 return 0;
418}
419
420void dbg_tail(char* name)
421{
422 unsigned char buf[SECTOR_SIZE*5];
423 int fd,rc;
424
425 fd = open(name,O_RDONLY);
426 if (fd<0)
427 return;
428 DEBUGF("Got file descriptor %d\n",fd);
429
430 rc = lseek(fd,-SECTOR_SIZE,SEEK_END);
431 if ( rc >= 0 ) {
432 rc = read(fd, buf, SECTOR_SIZE);
433 if( rc > 0 )
434 {
435 buf[rc]=0;
436 printf("%d:\n%s\n", (int)strlen(buf), buf);
437 }
438 else if ( rc == 0 ) {
439 DEBUGF("EOF\n");
440 }
441 else
442 {
443 DEBUGF("Failed reading file: %d\n",rc);
444 }
445 }
446 else {
447 perror("lseek");
448 }
449
450 close(fd);
451}
452
453int dbg_head(char* name)
454{
455 unsigned char buf[SECTOR_SIZE*5];
456 int fd,rc;
457
458 fd = open(name,O_RDONLY);
459 if (fd<0)
460 return -1;
461 DEBUGF("Got file descriptor %d\n",fd);
462
463 rc = read(fd, buf, SECTOR_SIZE*3);
464 if( rc > 0 )
465 {
466 buf[rc]=0;
467 printf("%d:\n%s\n", (int)strlen(buf), buf);
468 }
469 else if ( rc == 0 ) {
470 DEBUGF("EOF\n");
471 }
472 else
473 {
474 DEBUGF("Failed reading file: %d\n",rc);
475 }
476
477 return close(fd);
478}
479
480int dbg_trunc(char* name, int size)
481{
482 int fd,rc;
483
484#if 1
485 fd = open(name,O_RDWR);
486 if (fd<0)
487 return -1;
488
489 rc = ftruncate(fd, size);
490 if (rc<0) {
491 DEBUGF("ftruncate(%d) failed\n", size);
492 return -2;
493 }
494
495#else
496 fd = open(name,O_RDWR|O_TRUNC);
497 if (fd<0)
498 return -1;
499
500 rc = lseek(fd, size, SEEK_SET);
501 if (fd<0)
502 return -2;
503#endif
504
505 return close(fd);
506}
507
508int dbg_mkdir(char* name)
509{
510 int fd;
511
512 fd = mkdir(name);
513 if (fd<0) {
514 DEBUGF("Failed creating directory\n");
515 return -1;
516 }
517 return 0;
518}
519
520int dbg_cmd(int argc, char *argv[])
521{
522 char* cmd = NULL;
523 char* arg1 = NULL;
524 char* arg2 = NULL;
525
526 if (argc > 1) {
527 cmd = argv[1];
528 if ( argc > 2 ) {
529 arg1 = argv[2];
530 if ( argc > 3 ) {
531 arg2 = argv[3];
532 }
533 }
534 }
535 else {
536 DEBUGF("usage: fat command [options]\n"
537 "commands:\n"
538 " dir <dir>\n"
539 " ds <sector> - display sector\n"
540 " type <file>\n"
541 " head <file>\n"
542 " tail <file>\n"
543 " mkfile <file> <size (KB)>\n"
544 " chkfile <file>\n"
545 " del <file>\n"
546 " rmdir <dir>\n"
547 " dump <file> <offset>\n"
548 " mkdir <dir>\n"
549 " trunc <file> <size>\n"
550 " wrtest <file>\n"
551 " append <file>\n"
552 " test <file>\n"
553 " ren <file> <newname>\n"
554 );
555 return -1;
556 }
557
558 if (!strcasecmp(cmd, "dir"))
559 {
560 if ( arg1 )
561 dbg_dir(arg1);
562 else
563 dbg_dir("/");
564 }
565
566 if (!strcasecmp(cmd, "ds"))
567 {
568 if ( arg1 ) {
569 DEBUGF("secnum: %ld\n", strtol(arg1, NULL, 0));
570 dbg_dump_sector(strtol(arg1, NULL, 0));
571 }
572 }
573
574 if (!strcasecmp(cmd, "type"))
575 {
576 if (arg1)
577 dbg_type(arg1);
578 }
579
580 if (!strcasecmp(cmd, "head"))
581 {
582 if (arg1)
583 return dbg_head(arg1);
584 }
585
586 if (!strcasecmp(cmd, "tail"))
587 {
588 if (arg1)
589 dbg_tail(arg1);
590 }
591
592 if (!strcasecmp(cmd, "mkfile"))
593 {
594 if (arg1) {
595 if (arg2)
596 return dbg_mkfile(arg1,strtol(arg2, NULL, 0));
597 else
598 return dbg_mkfile(arg1,1);
599 }
600 }
601
602 if (!strcasecmp(cmd, "chkfile"))
603 {
604 if (arg1) {
605 if (arg2)
606 return dbg_chkfile(arg1, strtol(arg2, NULL, 0));
607 else
608 return dbg_chkfile(arg1, 0);
609 }
610 }
611
612 if (!strcasecmp(cmd, "mkdir"))
613 {
614 if (arg1) {
615 return dbg_mkdir(arg1);
616 }
617 }
618
619 if (!strcasecmp(cmd, "del"))
620 {
621 if (arg1)
622 return remove(arg1);
623 }
624
625 if (!strcasecmp(cmd, "rmdir"))
626 {
627 if (arg1)
628 return rmdir(arg1);
629 }
630
631 if (!strcasecmp(cmd, "dump"))
632 {
633 if (arg1) {
634 if (arg2)
635 return dbg_dump(arg1, strtol(arg2, NULL, 0));
636 else
637 return dbg_dump(arg1, 0);
638 }
639 }
640
641 if (!strcasecmp(cmd, "wrtest"))
642 {
643 if (arg1)
644 return dbg_wrtest(arg1);
645 }
646
647 if (!strcasecmp(cmd, "append"))
648 {
649 if (arg1)
650 return dbg_append(arg1);
651 }
652
653 if (!strcasecmp(cmd, "test"))
654 {
655 if (arg1)
656 return dbg_test(arg1);
657 }
658
659 if (!strcasecmp(cmd, "trunc"))
660 {
661 if (arg1 && arg2)
662 return dbg_trunc(arg1, strtol(arg2, NULL, 0));
663 }
664
665 if (!strcasecmp(cmd, "ren"))
666 {
667 if (arg1 && arg2)
668 return rename(arg1, arg2);
669 }
670
671 return 0;
672}
673
674extern void ata_exit(void);
675
676int main(int argc, char *argv[])
677{
678 int rc,i;
679 struct partinfo* pinfo;
680
681 srand(clock());
682
683 if(ata_init()) {
684 DEBUGF("*** Warning! The disk is uninitialized\n");
685 return -1;
686 }
687 pinfo = disk_init();
688 if (!pinfo) {
689 DEBUGF("*** Failed reading partitions\n");
690 return -1;
691 }
692
693 for ( i=0; i<4; i++ ) {
694 if ( pinfo[i].type == PARTITION_TYPE_FAT32
695#ifdef HAVE_FAT16SUPPORT
696 || pinfo[i].type == PARTITION_TYPE_FAT16
697#endif
698 ) {
699 DEBUGF("*** Mounting at block %ld\n",pinfo[i].start);
700 rc = fat_mount(IF_MV(0,) IF_MD(0,) pinfo[i].start);
701 if(rc) {
702 DEBUGF("mount: %d",rc);
703 return -1;
704 }
705 break;
706 }
707 }
708 if ( i==4 ) {
709 if(fat_mount(IF_MV(0,) IF_MD(0,) 0)) {
710 DEBUGF("No FAT32 partition!");
711 return -1;
712 }
713 }
714
715 rc = dbg_cmd(argc, argv);
716
717 ata_exit();
718
719 if (rc)
720 DEBUGF("Return code: %d\n", rc);
721
722 return rc;
723}
724
diff --git a/firmware/test/fat/test.sh b/firmware/test/fat/test.sh
deleted file mode 100644
index ca0a1db067..0000000000
--- a/firmware/test/fat/test.sh
+++ /dev/null
@@ -1,146 +0,0 @@
1#!/bin/sh
2
3IMAGE=disk.img
4MOUNT=/mnt/dummy
5RESULT=result.txt
6
7fail() {
8 echo "!! Test failed. Look in $RESULT for test logs."
9 chmod a+rw $RESULT
10 exit
11}
12
13check() {
14 /sbin/dosfsck -r $IMAGE | tee -a $RESULT
15 [ $RETVAL -ne 0 ] && fail
16}
17
18try() {
19 echo COMMAND: fat $1 "$2" "$3"
20 echo COMMAND: fat $1 "$2" "$3" >> $RESULT
21 ./fat $1 "$2" "$3" 2>> $RESULT
22 RETVAL=$?
23 [ $RETVAL -ne 0 ] && fail
24}
25
26buildimage() {
27 /sbin/mkdosfs -F 32 -s $1 $IMAGE > /dev/null
28 #mount -o loop $IMAGE $MOUNT
29 mount $MOUNT
30 echo "Filling it with /etc files"
31 find /etc -maxdepth 1 -type f -readable -exec cp {} $MOUNT \;
32 for i in `seq 1 120`;
33 do
34 echo apa > "$MOUNT/very $i long test filename so we can make sure they.work"
35 done
36 umount $MOUNT
37}
38
39runtests() {
40 rm $RESULT
41
42 echo ---Test: create a long name directory in the root
43 try mkdir "/very long subdir name"
44 check
45 try mkdir "/very long subdir name/apa.monkey.me.now"
46 check
47
48 echo ---Test: create a directory called "dir"
49 try mkdir "/dir"
50 check
51
52 echo ---Test: create a 10K file
53 try mkfile "/really long filenames rock" 10
54 check
55
56 try mkfile /dir/apa.monkey.me.now 10
57 check
58 try chkfile "/really long filenames rock" 10
59 try chkfile /dir/apa.monkey.me.now 8
60
61 echo ---Test: create a 1K file
62 try mkfile /bpa.rock 1
63 check
64 try chkfile /bpa.rock 1
65
66 echo ---Test: create a 40K file
67 try mkfile /cpa.rock 40
68 check
69 try chkfile /cpa.rock 40
70
71 echo ---Test: create a 400K file
72 try mkfile /dpa.rock 400
73 check
74 try chkfile /dpa.rock 400
75
76 echo ---Test: create a 1200K file
77 try mkfile /epa.rock 1200
78 check
79 try chkfile /epa.rock 1200
80
81 echo ---Test: rewrite first 20K of a 40K file
82 try mkfile /cpa.rock 20
83 check
84 try chkfile /cpa.rock 20
85
86 echo ---Test: rewrite first sector of 40K file
87 try mkfile /cpa.rock 0
88 check
89 try chkfile /cpa.rock
90 try chkfile /bpa.rock
91
92 LOOP=50
93 SIZE=700
94
95 try del "/really long filenames rock"
96
97 echo ---Test: create $LOOP $SIZE k files
98 for i in `seq 1 $LOOP`;
99 do
100 echo ---Test: $i/$LOOP ---
101 try mkfile "/rockbox rocks.$i" $SIZE
102 check
103 try chkfile "/rockbox rocks.$i" $SIZE
104 check
105 try del "/rockbox rocks.$i"
106 check
107 try mkfile "/rockbox rocks.$i" $SIZE
108 check
109 try ren "/rockbox rocks.$i" "/$i is a new long filename!"
110 check
111 done
112
113}
114
115echo "--------------------------------------"
116echo "Building test image (4 sector/cluster)"
117echo "--------------------------------------"
118buildimage 4
119runtests
120
121echo "---------------------------------------"
122echo "Building test image (32 sectors/cluster)"
123echo "---------------------------------------"
124buildimage 32
125runtests
126
127echo "--------------------------------------"
128echo "Building test image (1 sector/cluster)"
129echo "--------------------------------------"
130buildimage 1
131runtests
132
133echo "--------------------------------------"
134echo "Building test image (8 sectors/cluster)"
135echo "--------------------------------------"
136buildimage 8
137runtests
138
139echo "----------------------------------------"
140echo "Building test image (128 sectors/cluster)"
141echo "----------------------------------------"
142buildimage 128
143runtests
144
145echo "== Test completed successfully =="
146chmod a+rw $RESULT
diff --git a/firmware/test/fat/test16.sh b/firmware/test/fat/test16.sh
deleted file mode 100644
index 5a1c13150c..0000000000
--- a/firmware/test/fat/test16.sh
+++ /dev/null
@@ -1,135 +0,0 @@
1#!/bin/sh
2
3IMAGE=disk.img
4MOUNT=/mnt/dummy
5DIR=$MOUNT/q
6RESULT=result.txt
7
8fail() {
9 echo "!! Test failed $RETVAL. Look in $RESULT for test logs."
10 chmod a+rw $RESULT
11 exit
12}
13
14check() {
15 /sbin/dosfsck -r $IMAGE | tee -a $RESULT
16 [ $RETVAL -ne 0 ] && fail
17}
18
19try() {
20 echo COMMAND: fat $1 "$2" "$3"
21 echo COMMAND: fat $1 "$2" "$3" >> $RESULT
22 ./fat $1 "$2" "$3" 2>> $RESULT
23 RETVAL=$?
24 [ $RETVAL -ne 0 ] && fail
25}
26
27buildimage() {
28 /sbin/mkdosfs -F 16 -s $1 $IMAGE > /dev/null;
29 mount -o loop,fat=16 $IMAGE $MOUNT;
30 echo "Filling it with /etc files";
31 mkdir $DIR;
32 find /etc -type f -maxdepth 1 -exec cp {} $DIR \;
33 for i in `seq 1 120`;
34 do
35 echo apa > "$DIR/very $i long test filename so we can make sure they.work";
36 done;
37 umount $MOUNT;
38}
39
40runtests() {
41 rm $RESULT
42
43 echo ---Test: create a long name directory in the root
44 try mkdir "/very long subdir name"
45 check
46 try mkdir "/very long subdir name/apa.monkey.me.now"
47 check
48
49 echo ---Test: create a directory called "dir"
50 try mkdir "/dir"
51 check
52
53 echo ---Test: create a 10K file
54 try mkfile "/really long filenames rock" 10
55 check
56
57 try mkfile /dir/apa.monkey.me.now 10
58 check
59 try chkfile "/really long filenames rock" 10
60 try chkfile /dir/apa.monkey.me.now 8
61
62 echo ---Test: create a 1K file
63 try mkfile /bpa.rock 1
64 check
65 try chkfile /bpa.rock 1
66
67 echo ---Test: create a 40K file
68 try mkfile /cpa.rock 40
69 check
70 try chkfile /cpa.rock 40
71
72 echo ---Test: create a 400K file
73 try mkfile /dpa.rock 400
74 check
75 try chkfile /dpa.rock 400
76
77 echo ---Test: create a 1200K file
78 try mkfile /epa.rock 1200
79 check
80 try chkfile /epa.rock 1200
81
82 echo ---Test: rewrite first 20K of a 40K file
83 try mkfile /cpa.rock 20
84 check
85 try chkfile /cpa.rock 20
86
87 echo ---Test: rewrite first sector of 40K file
88 try mkfile /cpa.rock 0
89 check
90 try chkfile /cpa.rock
91 try chkfile /bpa.rock
92
93 LOOP=25
94 SIZE=700
95
96 try del "/really long filenames rock"
97
98 echo ---Test: create $LOOP $SIZE k files
99 for i in `seq 1 $LOOP`;
100 do
101 echo ---Test: $i/$LOOP ---
102 try mkfile "/q/rockbox rocks.$i" $SIZE
103 check
104 try chkfile "/q/rockbox rocks.$i" $SIZE
105 check
106 try del "/q/rockbox rocks.$i"
107 check
108 try mkfile "/q/rockbox rocks.$i" $SIZE
109 check
110 try ren "/q/rockbox rocks.$i" "/q/$i is a new long filename!"
111 check
112 done
113
114}
115
116echo "--------------------------------------"
117echo "Building test image (4 sector/cluster)"
118echo "--------------------------------------"
119buildimage 4
120runtests
121
122echo "--------------------------------------"
123echo "Building test image (8 sectors/cluster)"
124echo "--------------------------------------"
125buildimage 8
126runtests
127
128echo "----------------------------------------"
129echo "Building test image (64 sectors/cluster)"
130echo "----------------------------------------"
131buildimage 64
132runtests
133
134echo "== Test completed successfully =="
135chmod a+rw $RESULT
diff --git a/firmware/test/i2c/Makefile b/firmware/test/i2c/Makefile
deleted file mode 100644
index 51e72b859b..0000000000
--- a/firmware/test/i2c/Makefile
+++ /dev/null
@@ -1,53 +0,0 @@
1CC = sh-elf-gcc
2LD = sh-elf-ld
3AR = sh-elf-ar
4AS = sh-elf-as
5OC = sh-elf-objcopy
6
7FIRMWARE=../..
8
9INCLUDES=-I$(FIRMWARE) -I$(FIRMWARE)/common -I$(FIRMWARE)/drivers
10
11TARGET = -DARCHOS_PLAYER_OLD=1
12
13CFLAGS = -g -W -Wall -m1 -save-temps -nostdlib -Wstrict-prototypes -fschedule-insns -fno-builtin $(INCLUDES) $(TARGET) -DDEBUG
14AFLAGS += -small -relax
15
16SRC := $(wildcard *.c)
17OBJS := $(SRC:%.c=%.o) $(FIRMWARE)/crt0.o
18DEPS:=.deps
19DEPDIRS:=$(DEPS)
20
21all : archos.mod
22
23archos.elf : $(OBJS) app.lds
24 $(CC) -nostartfiles -o archos.elf $(OBJS) -lgcc -lrockbox -L$(FIRMWARE) -Tapp.lds -Wl,-Map,archos.map
25
26archos.bin : archos.elf
27 $(OC) -O binary archos.elf archos.bin
28
29archos.asm: archos.bin
30 sh2d -sh1 archos.bin > archos.asm
31
32archos.mod : archos.bin
33 scramble archos.bin archos.mod
34
35archos.mod.gz : archos.mod
36 gzip -f archos.mod
37
38dist:
39 tar czvf dist.tar.gz Makefile main.c start.s app.lds
40
41clean:
42 -rm -f $(OBJS) *.x *.i *.o *.s *.elf *.bin *.map *.mod *.bak *~
43 -$(RM) -r $(DEPS)
44
45$(DEPS)/%.d: %.c
46 @$(SHELL) -c 'for d in $(DEPDIRS); do { if [ ! -d $$d ]; then mkdir $$d; fi; }; done'
47 @echo "Updating dependencies for $<"
48 @$(SHELL) -ec '$(CC) -MM $(CFLAGS) $< \
49 |sed '\''s|\($*\)\.o[ :]*|\1.o $(<:%.c=%.d) : |g'\'' > $@; \
50 [ -s $@ ] || rm -f $@'
51
52-include $(SRC:%.c=$(DEPS)/%.d)
53
diff --git a/firmware/test/i2c/app.lds b/firmware/test/i2c/app.lds
deleted file mode 100644
index b8a341a8ae..0000000000
--- a/firmware/test/i2c/app.lds
+++ /dev/null
@@ -1,36 +0,0 @@
1ENTRY(start)
2OUTPUT_FORMAT(elf32-sh)
3SECTIONS
4{
5 .text 0x09010000 :
6 {
7 KEEP(*(.vectors))
8 . = ALIGN(0x200);
9 *(.init.text)
10 }
11
12 .text :
13 {
14 *(.text)
15 }
16
17 .data :
18 {
19 *(.rodata)
20 *(.data)
21 }
22
23 .rodata :
24 {
25 *(.rodata)
26 }
27
28 .bss :
29 {
30 _edata = .;
31 *(.bss)
32 *(COMMON)
33 _end = .;
34 _stack = . + 0x80000;
35 }
36}
diff --git a/firmware/test/i2c/gendata.c b/firmware/test/i2c/gendata.c
deleted file mode 100644
index dc5989ee66..0000000000
--- a/firmware/test/i2c/gendata.c
+++ /dev/null
@@ -1,31 +0,0 @@
1#include <stdio.h>
2
3int main(int argc, char *argv[])
4{
5 FILE *f;
6 int i;
7 unsigned char buf[128000];
8
9 f = fopen("mp.mp3", "r");
10
11 if(f)
12 {
13 if(fread(buf, 1, 128000, f) < 128000)
14 {
15 fprintf(stderr, "FAN!\n");
16 exit(1);
17 }
18
19 printf("int mp3datalen = 128000;\n");
20 printf("unsigned char mp3data[128000] =\n{");
21 for(i = 0;i < 128000;i++)
22 {
23 if(i % 8 == 0)
24 {
25 printf("\n");
26 }
27 printf("0x%02x, ", buf[i]);
28 }
29 printf("};\n");
30 }
31}
diff --git a/firmware/test/i2c/main.c b/firmware/test/i2c/main.c
deleted file mode 100644
index 990369eae8..0000000000
--- a/firmware/test/i2c/main.c
+++ /dev/null
@@ -1,1280 +0,0 @@
1/***************************************************************************
2
3 * __________ __ ___.
4
5 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
6
7 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
8
9 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
10
11 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
12
13 * \/ \/ \/ \/ \/
14
15 * $Id$
16
17 *
18
19 * Copyright (C) 2002 by Linus Nielsen Feltzing
20
21 *
22
23
24 * This program is free software; you can redistribute it and/or
25 * modify it under the terms of the GNU General Public License
26 * as published by the Free Software Foundation; either version 2
27 * of the License, or (at your option) any later version.
28
29 *
30
31 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
32
33 * KIND, either express or implied.
34
35 *
36
37 ****************************************************************************/
38
39#include <stdio.h>
40
41#include <stdlib.h>
42
43#include <stdbool.h>
44
45#include <string.h>
46
47#include "i2c.h"
48
49#include "mas35xx.h"
50
51#include "dac3550a.h"
52
53#include "sh7034.h"
54
55#include "system.h"
56
57#include "debug.h"
58
59#include "kernel.h"
60
61#include "thread.h"
62
63#include "ata.h"
64
65#include "disk.h"
66
67#include "fat.h"
68
69#include "file.h"
70
71#include "dir.h"
72
73#include "panic.h"
74
75
76
77#ifndef MIN
78
79#define MIN(a, b) (((a)<(b))?(a):(b))
80
81#endif
82
83
84
85#define MPEG_PLAY 1
86
87#define MPEG_STOP 2
88
89#define MPEG_PAUSE 3
90
91#define MPEG_RESUME 4
92
93#define MPEG_NEED_DATA 100
94
95
96
97#define MP3_LOW_WATER 0x30000
98
99#define MP3_CHUNK_SIZE 0x20000
100
101
102
103unsigned int bass_table[] =
104
105{
106
107 0,
108
109 0x800, /* 1dB */
110
111 0x10000, /* 2dB */
112
113 0x17c00, /* 3dB */
114
115 0x1f800, /* 4dB */
116
117 0x27000, /* 5dB */
118
119 0x2e400, /* 6dB */
120
121 0x35800, /* 7dB */
122
123 0x3c000, /* 8dB */
124
125 0x42800, /* 9dB */
126
127 0x48800, /* 10dB */
128
129 0x4e400, /* 11dB */
130
131 0x53800, /* 12dB */
132
133 0x58800, /* 13dB */
134
135 0x5d400, /* 14dB */
136
137 0x61800 /* 15dB */
138
139};
140
141
142
143unsigned int treble_table[] =
144
145{
146
147 0,
148
149 0x5400, /* 1dB */
150
151 0xac00, /* 2dB */
152
153 0x10400, /* 3dB */
154
155 0x16000, /* 4dB */
156
157 0x1c000, /* 5dB */
158
159 0x22400, /* 6dB */
160
161 0x28400, /* 7dB */
162
163 0x2ec00, /* 8dB */
164
165 0x35400, /* 9dB */
166
167 0x3c000, /* 10dB */
168
169 0x42c00, /* 11dB */
170
171 0x49c00, /* 12dB */
172
173 0x51800, /* 13dB */
174
175 0x58400, /* 14dB */
176
177 0x5f800 /* 15dB */
178
179};
180
181
182
183unsigned char fliptable[] =
184
185{
186
187 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
188
189 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
190
191 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
192
193 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
194
195 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
196
197 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
198
199 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
200
201 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
202
203 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
204
205 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
206
207 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
208
209 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
210
211 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
212
213 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
214
215 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
216
217 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
218
219 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
220
221 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
222
223 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
224
225 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
226
227 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
228
229 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
230
231 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
232
233 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
234
235 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
236
237 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
238
239 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
240
241 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
242
243 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
244
245 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
246
247 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
248
249 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff
250
251};
252
253
254
255extern unsigned int stack[];
256
257/* Place the MP3 data right after the stack */
258
259
260
261#define MP3BUF_LEN 0x100000 /* 1 Mbyte */
262
263
264
265unsigned char *mp3buf = (unsigned char *)stack;
266
267
268
269char *tracks[100];
270
271int num_tracks;
272
273
274
275int mp3buf_write;
276
277int mp3buf_read;
278
279int last_dma_chunk_size;
280
281
282
283bool dma_on; /* The DMA is active */
284
285bool playing; /* We are playing an MP3 stream */
286
287bool filling; /* We are filling the buffer with data from disk */
288
289
290
291struct event_queue mpeg_queue SHAREDBSS_ATTR;
292
293
294
295static void mas_poll_start(unsigned int interval_in_ms);
296
297void mpeg_thread(void);
298
299
300
301void reset_mp3_buffer(void)
302
303{
304
305 mp3buf_read = 0;
306
307 mp3buf_write = 0;
308
309}
310
311
312
313void setup_sci0(void)
314
315{
316
317 /* PB15 is I/O, PB14 is IRQ6, PB12 is SCK0 */
318
319 PBCR1 = (PBCR1 & 0x0cff) | 0x1200;
320
321
322
323 /* Set PB12 to output */
324
325 PBIOR |= 0x1000;
326
327
328
329 /* Disable serial port */
330
331 SCR0 = 0x00;
332
333
334
335 /* Synchronous, no prescale */
336
337 SMR0 = 0x80;
338
339
340
341 /* Set baudrate 1Mbit/s */
342
343 BRR0 = 0x03;
344
345
346
347 /* use SCK as serial clock output */
348
349 SCR0 = 0x01;
350
351
352
353 /* Clear FER and PER */
354
355 SSR0 &= 0xe7;
356
357
358
359 /* Set interrupt ITU2 and SCI0 priority to 0 */
360
361 IPRD &= 0x0ff0;
362
363
364
365 /* set IRQ6 and IRQ7 to edge detect */
366
367 ICR |= 0x03;
368
369
370
371 /* set PB15 and PB14 to inputs */
372
373 PBIOR &= 0x7fff;
374
375 PBIOR &= 0xbfff;
376
377
378
379 /* set IRQ6 prio 8 and IRQ7 prio 0 */
380
381 IPRB = ( IPRB & 0xff00 ) | 0x0080;
382
383
384
385 /* Enable End of DMA interrupt at prio 8 */
386
387 IPRC = (IPRC & 0xf0ff) | 0x0800;
388
389
390
391 /* Enable Tx (only!) */
392
393 SCR0 |= 0x20;
394
395}
396
397
398
399
400
401void init_dma(void)
402
403{
404
405 SAR3 = (unsigned int) mp3buf + mp3buf_read;
406
407 DAR3 = 0x5FFFEC3;
408
409 CHCR3 &= ~0x0002; /* Clear interrupt */
410
411 CHCR3 = 0x1504; /* Single address destination, TXI0, IE=1 */
412
413 last_dma_chunk_size = MIN(65536, mp3buf_write - mp3buf_read);
414
415 DTCR3 = last_dma_chunk_size & 0xffff;
416
417 DMAOR = 0x0001; /* Enable DMA */
418
419 CHCR3 |= 0x0001; /* Enable DMA IRQ */
420
421}
422
423
424
425void start_dma(void)
426
427{
428
429 SCR0 |= 0x80;
430
431 dma_on = true;
432
433}
434
435
436
437void stop_dma(void)
438
439{
440
441 SCR0 &= 0x7f;
442
443 dma_on = false;
444
445}
446
447
448
449void dma_tick(void)
450
451{
452
453 /* Start DMA if it isn't running */
454
455 if(playing && !dma_on)
456
457 {
458
459 if(PBDR & 0x4000)
460
461 {
462
463 if(!(SCR0 & 0x80))
464
465 start_dma();
466
467 }
468
469 }
470
471}
472
473
474
475void bitswap(unsigned char *data, int length)
476
477{
478
479 int i;
480
481 for(i = 0;i < length;i++)
482
483 {
484
485 data[i] = fliptable[data[i]];
486
487 }
488
489}
490
491
492
493int main(void)
494
495{
496
497 char buf[40];
498
499 char str[32];
500
501 int i=0;
502
503 DIR *d;
504
505 struct dirent *dent;
506
507 char *tmp;
508
509 int volume, bass, treble;
510
511 unsigned short frame_count;
512
513
514
515 /* Clear it all! */
516
517 SSR1 &= ~(SCI_RDRF | SCI_ORER | SCI_PER | SCI_FER);
518
519
520
521 /* This enables the serial Rx interrupt, to be able to exit into the
522
523 debugger when you hit CTRL-C */
524
525 SCR1 |= 0x40;
526
527 SCR1 &= ~0x80;
528
529
530
531 IPRE |= 0xf000; /* Highest priority */
532
533
534
535 i2c_init();
536
537
538
539 dma_on = true;
540
541
542
543 kernel_init();
544
545
546
547 enable_irq();
548
549
550
551 setup_sci0();
552
553
554
555 i=mas_readmem(MAS_BANK_D1,0xff6,(unsigned long*)buf,2);
556
557 if (i) {
558
559 debugf("Error - mas_readmem() returned %d\n", i);
560
561 while(1);
562
563 }
564
565
566
567 i = buf[0] | buf[1] << 8;
568
569 debugf("MAS version: %x\n", i);
570
571 i = buf[4] | buf[5] << 8;
572
573 debugf("MAS revision: %x\n", i);
574
575
576
577 i=mas_readmem(MAS_BANK_D1,0xff9,(unsigned long*)buf,7);
578
579 if (i) {
580
581 debugf("Error - mas_readmem() returned %d\n", i);
582
583 while(1);
584
585 }
586
587
588
589 for(i = 0;i < 7;i++)
590
591 {
592
593 str[i*2+1] = buf[i*4];
594
595 str[i*2] = buf[i*4+1];
596
597 }
598
599 str[i*2] = 0;
600
601 debugf("Description: %s\n", str);
602
603
604
605 i=mas_writereg(0x3b, 0x20);
606
607 if (i < 0) {
608
609 debugf("Error - mas_writereg() returned %d\n", i);
610
611 while(1);
612
613 }
614
615
616
617 i = mas_run(1);
618
619 if (i < 0) {
620
621 debugf("Error - mas_run() returned %d\n", i);
622
623 while(1);
624
625 }
626
627
628
629 i = ata_init();
630
631 debugf("ata_init() returned %d\n", i);
632
633
634
635 i = disk_init();
636
637 debugf("disk_init() returned %d\n", i);
638
639
640
641 debugf("part[0] starts at sector %d\n", part[0].start);
642
643
644
645 i = fat_mount(IF_MV(0,) IF_MD(0,) part[0].start);
646
647 debugf("fat_mount() returned %d\n", i);
648
649
650
651 num_tracks = 0;
652
653 if((d = opendir("/")))
654
655 {
656
657 while((dent = readdir(d)))
658
659 {
660
661 debugf("%s\n", dent->d_name);
662
663 i = strlen(dent->d_name);
664
665 tmp = dent->d_name + i - 4;
666
667 debugf("%s\n", tmp);
668
669 if(!stricmp(tmp, ".mp3"))
670
671 {
672
673 tmp = malloc(i+1);
674
675 if(tmp)
676
677 {
678
679 debugf("Adding track %s\n", dent->d_name);
680
681 snprintf(tmp, i+1, "/%s", dent->d_name);
682
683 tracks[num_tracks++] = tmp;
684
685 }
686
687 else
688
689 {
690
691 panicf("Out of memory\n");
692
693 }
694
695 }
696
697 }
698
699 closedir(d);
700
701 }
702
703
704
705 debugf("Number of tracks: %d\n");
706
707
708
709 queue_init(&mpeg_queue);
710
711
712
713 create_thread(mpeg_thread, stack - 0x2000, 0x4000, 0);
714
715
716
717 mas_poll_start(2);
718
719
720
721 debugf("let's play...\n");
722
723
724
725 queue_post(&mpeg_queue, MPEG_PLAY, 0);
726
727
728
729 volume = 0x2c;
730
731
732
733 if(dac_config(0x04) < 0)
734
735 debugf("DAC write failed\n");
736
737
738
739 if(dac_volume(volume) < 0)
740
741 debugf("DAC write failed\n");
742
743
744
745 bass = 12;
746
747 treble = 8;
748
749
750
751 mas_writereg(MAS_REG_KPRESCALE, 0xe9400);
752
753 mas_writereg(MAS_REG_KBASS, bass_table[bass]);
754
755 mas_writereg(MAS_REG_KTREBLE, treble_table[treble]);
756
757
758
759 while(1)
760
761 {
762
763 sleep(HZ*4);
764
765 }
766
767}
768
769
770
771void IRQ6(void) __attribute__((interrupt_handler));
772
773void IRQ6(void)
774
775{
776
777 stop_dma();
778
779}
780
781
782
783void DEI3(void) __attribute__((interrupt_handler));
784
785void DEI3(void)
786
787{
788
789 int unplayed_space_left;
790
791 int space_until_end_of_buffer;
792
793
794
795 if(playing)
796
797 {
798
799 mp3buf_read += last_dma_chunk_size;
800
801 if(mp3buf_read >= MP3BUF_LEN)
802
803 mp3buf_read = 0;
804
805
806
807 unplayed_space_left = mp3buf_write - mp3buf_read;
808
809 if(unplayed_space_left < 0)
810
811 unplayed_space_left = MP3BUF_LEN + unplayed_space_left;
812
813
814
815 space_until_end_of_buffer = MP3BUF_LEN - mp3buf_read;
816
817
818
819 if(!filling && unplayed_space_left < MP3_LOW_WATER)
820
821 {
822
823 queue_post(&mpeg_queue, MPEG_NEED_DATA, 0);
824
825 }
826
827
828
829 if(unplayed_space_left)
830
831 {
832
833 last_dma_chunk_size = MIN(65536, unplayed_space_left);
834
835 last_dma_chunk_size = MIN(last_dma_chunk_size, space_until_end_of_buffer);
836
837 DTCR3 = last_dma_chunk_size & 0xffff;
838
839 SAR3 = (unsigned int)mp3buf + mp3buf_read;
840
841 }
842
843 else
844
845 {
846
847 debugf("No more MP3 data. Stopping.\n");
848
849 CHCR3 = 0; /* Stop DMA interrupt */
850
851 }
852
853 }
854
855
856
857 CHCR3 &= ~0x0002; /* Clear DMA interrupt */
858
859}
860
861
862
863static void mas_poll_start(unsigned int interval_in_ms)
864
865{
866
867 unsigned int count;
868
869
870
871 count = FREQ / 1000 / 8 * interval_in_ms;
872
873
874
875 if(count > 0xffff)
876
877 {
878
879 panicf("Error! The MAS poll interval is too long (%d ms)\n",
880
881 interval_in_ms);
882
883 return;
884
885 }
886
887
888
889 /* We are using timer 1 */
890
891
892
893 TSTR &= ~0x02; /* Stop the timer */
894
895 TSNC &= ~0x02; /* No synchronization */
896
897 TMDR &= ~0x02; /* Operate normally */
898
899
900
901 TCNT1 = 0; /* Start counting at 0 */
902
903 GRA1 = count;
904
905 TCR1 = 0x23; /* Clear at GRA match, sysclock/8 */
906
907
908
909 /* Enable interrupt on level 2 */
910
911 IPRC = (IPRC & ~0x000f) | 0x0002;
912
913
914
915 TSR1 &= ~0x02;
916
917 TIER1 = 0xf9; /* Enable GRA match interrupt */
918
919
920
921 TSTR |= 0x02; /* Start timer 2 */
922
923}
924
925
926
927void IMIA1(void) __attribute__((interrupt_handler));
928
929void IMIA1(void)
930
931{
932
933 dma_tick();
934
935 TSR1 &= ~0x01;
936
937}
938
939
940
941int track_index = 0;
942
943char *peek_next_track(int index)
944
945{
946
947 if(track_index < num_tracks)
948
949 return tracks[track_index+index];
950
951 else
952
953 return NULL;
954
955}
956
957
958
959void next_track(void)
960
961{
962
963 track_index++;
964
965}
966
967
968
969int mpeg_file = -1;
970
971
972
973int new_file(void)
974
975{
976
977 char *trackname;
978
979
980
981 trackname = peek_next_track(0);
982
983
984
985 debugf("playing %s\n", trackname);
986
987 mpeg_file = open(trackname, O_RDONLY);
988
989 if(mpeg_file < 0)
990
991 {
992
993 debugf("Couldn't open file\n");
994
995 return -1;
996
997 }
998
999 return 0;
1000
1001}
1002
1003
1004
1005void mpeg_thread(void)
1006
1007{
1008
1009 struct queue_event ev;
1010
1011 int len;
1012
1013 int free_space_left;
1014
1015 int amount_to_read;
1016
1017 bool play_pending;
1018
1019
1020
1021 play_pending = false;
1022
1023 playing = false;
1024
1025
1026
1027 while(1)
1028
1029 {
1030
1031 debugf("S\n");
1032
1033 queue_wait(&mpeg_queue, &ev);
1034
1035 switch(ev.id)
1036
1037 {
1038
1039 case MPEG_PLAY:
1040
1041 /* Stop the current stream */
1042
1043 play_pending = false;
1044
1045 playing = false;
1046
1047 stop_dma();
1048
1049
1050
1051 reset_mp3_buffer();
1052
1053
1054
1055 new_file();
1056
1057
1058
1059 /* Make it read more data */
1060
1061 filling = true;
1062
1063 queue_post(&mpeg_queue, MPEG_NEED_DATA, 0);
1064
1065
1066
1067 /* Tell the file loading code that we want to start playing
1068
1069 as soon as we have some data */
1070
1071 play_pending = true;
1072
1073 break;
1074
1075
1076
1077 case MPEG_STOP:
1078
1079 /* Stop the current stream */
1080
1081 playing = false;
1082
1083 stop_dma();
1084
1085 break;
1086
1087
1088
1089 case MPEG_PAUSE:
1090
1091 /* Stop the current stream */
1092
1093 playing = false;
1094
1095 stop_dma();
1096
1097 break;
1098
1099
1100
1101 case MPEG_RESUME:
1102
1103 /* Stop the current stream */
1104
1105 playing = true;
1106
1107 start_dma();
1108
1109 break;
1110
1111
1112
1113 case MPEG_NEED_DATA:
1114
1115 free_space_left = mp3buf_read - mp3buf_write;
1116
1117
1118
1119 /* We interpret 0 as "empty buffer" */
1120
1121 if(free_space_left <= 0)
1122
1123 free_space_left = MP3BUF_LEN + free_space_left;
1124
1125
1126
1127 if(free_space_left <= MP3_CHUNK_SIZE)
1128
1129 {
1130
1131 debugf("0\n");
1132
1133 ata_spindown(-1);
1134
1135 filling = false;
1136
1137 break;
1138
1139 }
1140
1141
1142
1143 amount_to_read = MIN(MP3_CHUNK_SIZE, free_space_left);
1144
1145 amount_to_read = MIN(MP3BUF_LEN - mp3buf_write, amount_to_read);
1146
1147
1148
1149 /* Read in a few seconds worth of MP3 data. We don't want to
1150
1151 read too large chunks because the bitswapping will take
1152
1153 too much time. We must keep the DMA happy and also give
1154
1155 the other threads a chance to run. */
1156
1157 debugf("R\n");
1158
1159 len = read(mpeg_file, mp3buf+mp3buf_write, amount_to_read);
1160
1161 if(len)
1162
1163 {
1164
1165 debugf("B\n");
1166
1167 bitswap(mp3buf + mp3buf_write, len);
1168
1169
1170
1171 mp3buf_write += len;
1172
1173 if(mp3buf_write >= MP3BUF_LEN)
1174
1175 {
1176
1177 mp3buf_write = 0;
1178
1179 debugf("W\n");
1180
1181 }
1182
1183
1184
1185 /* Tell ourselves that we want more data */
1186
1187 queue_post(&mpeg_queue, MPEG_NEED_DATA, 0);
1188
1189
1190
1191 /* And while we're at it, see if we have startet playing
1192
1193 yet. If not, do it. */
1194
1195 if(play_pending)
1196
1197 {
1198
1199 play_pending = false;
1200
1201 playing = true;
1202
1203
1204
1205 init_dma();
1206
1207 start_dma();
1208
1209 }
1210
1211 }
1212
1213 else
1214
1215 {
1216
1217 close(mpeg_file);
1218
1219
1220
1221 /* Make sure that the write pointer is at a word
1222
1223 boundary */
1224
1225 mp3buf_write &= 0xfffffffe;
1226
1227
1228
1229 next_track();
1230
1231 if(new_file() < 0)
1232
1233 {
1234
1235 /* No more data to play */
1236
1237 debugf("Finished playing\n");
1238
1239 playing = false;
1240
1241 ata_spindown(-1);
1242
1243 filling = false;
1244
1245 }
1246
1247 else
1248
1249 {
1250
1251 /* Tell ourselves that we want more data */
1252
1253 queue_post(&mpeg_queue, MPEG_NEED_DATA, 0);
1254
1255 }
1256
1257 }
1258
1259 break;
1260
1261 }
1262
1263 }
1264
1265}
1266
1267
1268
1269/* Newlib trap honeypot */
1270
1271void __trap34(void)
1272
1273{
1274
1275 debugf("newlib trap34\n");
1276
1277 while(1);
1278
1279}
1280
diff --git a/firmware/test/id3/Makefile b/firmware/test/id3/Makefile
deleted file mode 100644
index 8b9cd230b2..0000000000
--- a/firmware/test/id3/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
1TARGET = id3test
2
3OBJS = id3.o
4CFLAGS = -g -W -Wall -DDEBUG_STANDALONE -DSIMULATOR -c -o
5
6$(TARGET) : $(OBJS)
7 $(CC) -o $(TARGET) $(OBJS)
8
9id3.o:../../id3.c
10 $(CC) $(CFLAGS) $@ $<
11
12clean:
13 rm -f $(OBJS) $(TARGET) *~
diff --git a/firmware/test/kernel/Makefile b/firmware/test/kernel/Makefile
deleted file mode 100644
index 94171767c6..0000000000
--- a/firmware/test/kernel/Makefile
+++ /dev/null
@@ -1,52 +0,0 @@
1CC = sh-elf-gcc
2LD = sh-elf-ld
3AR = sh-elf-ar
4AS = sh-elf-as
5OC = sh-elf-objcopy
6
7INCLUDES=-I../../ -I../../drivers
8
9# Pick a target to build for
10#TARGET = -DARCHOS_PLAYER=1
11TARGET = -DARCHOS_PLAYER_OLD=1
12#TARGET = -DARCHOS_RECORDER=1
13
14CFLAGS = -g -Wall -m1 -save-temps -nostdlib -Wstrict-prototypes -fschedule-insns -fno-builtin $(INCLUDES) $(TARGET) -DDEBUG
15AFLAGS += -small -relax
16
17OBJS= ../../crt0.o ../../system.o main.o ../../panic.o ../../drivers/lcd.o \
18 thread.o ../../kernel.o ../../drivers/led.o \
19 ../../debug.o ../../common/sprintf.o
20
21%.o: %.S
22 $(CC) -o $@ $(CFLAGS) $(INCLUDES) $(DEFS) $(ASMFLAGS) -c $<
23
24
25all : archos.mod
26
27archos.elf : $(OBJS) app.lds
28 $(CC) -nostartfiles -o archos.elf $(OBJS) -lgcc -Tapp.lds -Wl,-Map,archos.map
29
30archos.bin : archos.elf
31 $(OC) -O binary archos.elf archos.bin
32
33archos.asm: archos.bin
34 sh2d -sh1 archos.bin > archos.asm
35
36archos.mod : archos.bin
37 scramble archos.bin archos.mod
38
39archos.mod.gz : archos.mod
40 gzip -f archos.mod
41
42dist:
43 tar czvf dist.tar.gz Makefile main.c start.s app.lds
44
45clean:
46 -rm -f $(OBJS) *.s *.x *.i *.o *.elf *.bin *.map *.mod *.bak *~
47
48install:
49 mount /mnt/archos; cp archos.mod /mnt/archos; umount /mnt/archos
50
51thread.o: ../../thread.c
52 $(CC) -O -fomit-frame-pointer -c $(CFLAGS) $<
diff --git a/firmware/test/kernel/app.lds b/firmware/test/kernel/app.lds
deleted file mode 100644
index b8a341a8ae..0000000000
--- a/firmware/test/kernel/app.lds
+++ /dev/null
@@ -1,36 +0,0 @@
1ENTRY(start)
2OUTPUT_FORMAT(elf32-sh)
3SECTIONS
4{
5 .text 0x09010000 :
6 {
7 KEEP(*(.vectors))
8 . = ALIGN(0x200);
9 *(.init.text)
10 }
11
12 .text :
13 {
14 *(.text)
15 }
16
17 .data :
18 {
19 *(.rodata)
20 *(.data)
21 }
22
23 .rodata :
24 {
25 *(.rodata)
26 }
27
28 .bss :
29 {
30 _edata = .;
31 *(.bss)
32 *(COMMON)
33 _end = .;
34 _stack = . + 0x80000;
35 }
36}
diff --git a/firmware/test/kernel/main.c b/firmware/test/kernel/main.c
deleted file mode 100644
index df0e72156a..0000000000
--- a/firmware/test/kernel/main.c
+++ /dev/null
@@ -1,104 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "thread.h"
22#include "kernel.h"
23#include "sh7034.h"
24#include "debug.h"
25
26void tick_start(unsigned int interval);
27
28unsigned int s1[256];
29unsigned int s2[256];
30
31void t1(void);
32void t2(void);
33
34struct event_queue main_q SHAREDBSS_ATTR;
35
36int tick_add_task(void (*f)(void));
37
38void testfunc(void)
39{
40 if(current_tick == 5000)
41 debugf("Yippie!\n");
42}
43
44int main(void)
45{
46 char buf[40];
47 char str[32];
48 int i=0;
49 struct queue_event *ev;
50
51 /* Clear it all! */
52 SSR1 &= ~(SCI_RDRF | SCI_ORER | SCI_PER | SCI_FER);
53
54 /* This enables the serial Rx interrupt, to be able to exit into the
55 debugger when you hit CTRL-C */
56 SCR1 |= 0x40;
57 SCR1 &= ~0x80;
58 IPRE |= 0xf000; /* Set to highest priority */
59
60 debugf("OK. Let's go\n");
61
62 kernel_init();
63
64 enable_irq();
65
66 tick_add_task(testfunc);
67
68 debugf("sleeping 10s...\n");
69 sleep(HZ*10);
70 debugf("woke up\n");
71
72 queue_init(&main_q);
73
74 create_thread(t1, s1, 1024, 0);
75 create_thread(t2, s2, 1024, 0);
76
77 while(1)
78 {
79 ev = queue_wait(&main_q);
80 debugf("Thread 0 got an event. ID: %d\n", ev->id);
81 }
82}
83
84void t1(void)
85{
86 debugf("Thread 1 started\n");
87 while(1)
88 {
89 sleep(HZ);
90 debugf("Thread 1 posting an event\n");
91 queue_post(&main_q, 1234, 0);
92 queue_post(&main_q, 5678, 0);
93 }
94}
95
96void t2(void)
97{
98 debugf("Thread 2 started\n");
99 while(1)
100 {
101 sleep(HZ*3);
102 debugf("Thread 2 awakened\n");
103 }
104}
diff --git a/firmware/test/snprintf/Makefile b/firmware/test/snprintf/Makefile
deleted file mode 100644
index 39f128ed8a..0000000000
--- a/firmware/test/snprintf/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
1
2TARGET = snprintf
3
4OBJS = snprintf.o test.o
5
6CFLAGS = -I../../include
7
8$(TARGET): $(OBJS)
9
10snprintf.o: ../../common/sprintf.c
11 $(CC) -c $< -o $@
12
13test.o: test.c
14
15clean:
16 rm -f $(OBJS) \ No newline at end of file
diff --git a/firmware/test/snprintf/test.c b/firmware/test/snprintf/test.c
deleted file mode 100644
index 049be4d257..0000000000
--- a/firmware/test/snprintf/test.c
+++ /dev/null
@@ -1,16 +0,0 @@
1
2#include <stdio.h>
3
4
5int main(int argc, char **argv)
6{
7 char buffer[256];
8 snprintf(buffer, 5, "123456789");
9 printf("%s\n", buffer);
10 snprintf(buffer, 6, "123456789");
11 printf("%s\n", buffer);
12 snprintf(buffer, 7, "123456789");
13 printf("%s\n", buffer);
14 snprintf(buffer, 7, "123%s", "mooooooooooo");
15 printf("%s\n", buffer);
16}
diff --git a/firmware/tuner.c b/firmware/tuner.c
index 565850c659..cdc1da5b79 100644
--- a/firmware/tuner.c
+++ b/firmware/tuner.c
@@ -80,11 +80,6 @@ void tuner_init(void)
80 tea5767_get, 80 tea5767_get,
81 tea5767_init()) 81 tea5767_init())
82 #endif 82 #endif
83 #if (CONFIG_TUNER & S1A0903X01)
84 TUNER_TYPE_CASE(S1A0903X01,
85 s1a0903x01_set,
86 s1a0903x01_get)
87 #endif
88 #if (CONFIG_TUNER & SI4700) 83 #if (CONFIG_TUNER & SI4700)
89 TUNER_TYPE_CASE(SI4700, 84 TUNER_TYPE_CASE(SI4700,
90 si4700_set, 85 si4700_set,
diff --git a/firmware/usb.c b/firmware/usb.c
index 375bb6d768..e20388c073 100644
--- a/firmware/usb.c
+++ b/firmware/usb.c
@@ -43,7 +43,7 @@
43#include "screendump.h" 43#include "screendump.h"
44 44
45/* Conditions under which we want the entire driver */ 45/* Conditions under which we want the entire driver */
46#if !defined(BOOTLOADER) || (CONFIG_CPU == SH7034) || \ 46#if !defined(BOOTLOADER) || \
47 (defined(HAVE_USBSTACK) && defined(HAVE_BOOTLOADER_USB_MODE)) || \ 47 (defined(HAVE_USBSTACK) && defined(HAVE_BOOTLOADER_USB_MODE)) || \
48 (defined(HAVE_USBSTACK) && defined(IPOD_NANO2G)) || \ 48 (defined(HAVE_USBSTACK) && defined(IPOD_NANO2G)) || \
49 (defined(HAVE_USBSTACK) && (defined(CREATIVE_ZVx))) || \ 49 (defined(HAVE_USBSTACK) && (defined(CREATIVE_ZVx))) || \