diff options
Diffstat (limited to 'firmware/target/sh/archos/timer-archos.c')
-rw-r--r-- | firmware/target/sh/archos/timer-archos.c | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/firmware/target/sh/archos/timer-archos.c b/firmware/target/sh/archos/timer-archos.c deleted file mode 100644 index 98a3afb4b6..0000000000 --- a/firmware/target/sh/archos/timer-archos.c +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2005 Jens Arnold | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "cpu.h" | ||
23 | #include "system.h" | ||
24 | #include "timer.h" | ||
25 | |||
26 | void IMIA4(void) __attribute__((interrupt_handler)); | ||
27 | void IMIA4(void) | ||
28 | { | ||
29 | if (pfn_timer != NULL) | ||
30 | pfn_timer(); | ||
31 | and_b(~0x01, &TSR4); /* clear the interrupt */ | ||
32 | } | ||
33 | |||
34 | bool timer_set(long cycles, bool start) | ||
35 | { | ||
36 | int phi = 0; /* bits for the prescaler */ | ||
37 | int prescale = 1; | ||
38 | |||
39 | while (cycles > 0x10000) | ||
40 | { /* work out the smallest prescaler that makes it fit */ | ||
41 | phi++; | ||
42 | prescale <<= 1; | ||
43 | cycles >>= 1; | ||
44 | } | ||
45 | |||
46 | if (prescale > 8) | ||
47 | return false; | ||
48 | |||
49 | if (start) | ||
50 | { | ||
51 | if (pfn_unregister != NULL) | ||
52 | { | ||
53 | pfn_unregister(); | ||
54 | pfn_unregister = NULL; | ||
55 | } | ||
56 | |||
57 | and_b(~0x10, &TSTR); /* Stop the timer 4 */ | ||
58 | and_b(~0x10, &TSNC); /* No synchronization */ | ||
59 | and_b(~0x10, &TMDR); /* Operate normally */ | ||
60 | |||
61 | TIER4 = 0xF9; /* Enable GRA match interrupt */ | ||
62 | } | ||
63 | |||
64 | TCR4 = 0x20 | phi; /* clear at GRA match, set prescaler */ | ||
65 | GRA4 = (unsigned short)(cycles - 1); | ||
66 | if (start || (TCNT4 >= GRA4)) | ||
67 | TCNT4 = 0; | ||
68 | and_b(~0x01, &TSR4); /* clear an eventual interrupt */ | ||
69 | |||
70 | return true; | ||
71 | } | ||
72 | |||
73 | bool timer_start(void) | ||
74 | { | ||
75 | IPRD = (IPRD & 0xFF0F) | 1 << 4; /* interrupt priority */ | ||
76 | or_b(0x10, &TSTR); /* start timer 4 */ | ||
77 | return true; | ||
78 | } | ||
79 | |||
80 | void timer_stop(void) | ||
81 | { | ||
82 | and_b(~0x10, &TSTR); /* stop the timer 4 */ | ||
83 | IPRD = (IPRD & 0xFF0F); /* disable interrupt */ | ||
84 | } | ||