diff options
author | Solomon Peachy <pizza@shaftnet.org> | 2020-09-04 23:50:38 -0400 |
---|---|---|
committer | Solomon Peachy <pizza@shaftnet.org> | 2020-09-05 22:18:26 +0000 |
commit | d015165bc546e80b1c033c23c68a0ba307b7a39f (patch) | |
tree | 3618d4af6740d353d22f2e48a3729775968176c9 /firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c | |
parent | 8188588f14849fbc80254caf073fc7c790596c0a (diff) | |
download | rockbox-d015165bc546e80b1c033c23c68a0ba307b7a39f.tar.gz rockbox-d015165bc546e80b1c033c23c68a0ba307b7a39f.zip |
mips: Convert 'nop' to 'ssnop' -- for future-proofing
Change-Id: I17625f4d56a1f5205887cb47668a2dcb628053f4
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c b/firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c index caee8982f6..a32fe45608 100644 --- a/firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c +++ b/firmware/target/mips/ingenic_jz47xx/onda_vx767/lcd-onda_vx767.c | |||
@@ -18,7 +18,7 @@ | |||
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #include "config.h" | 22 | #include "config.h" |
23 | #include "jz4740.h" | 23 | #include "jz4740.h" |
24 | #include "lcd.h" | 24 | #include "lcd.h" |
@@ -37,7 +37,7 @@ do { \ | |||
37 | } while (0) | 37 | } while (0) |
38 | 38 | ||
39 | 39 | ||
40 | #define SLEEP(x) for(i=0; i<x; i++) asm volatile("nop\n nop\n"); | 40 | #define SLEEP(x) for(i=0; i<x; i++) asm volatile("ssnop\n ssnop\n"); |
41 | #define DELAY SLEEP(700000); | 41 | #define DELAY SLEEP(700000); |
42 | static void _display_pin_init(void) | 42 | static void _display_pin_init(void) |
43 | { | 43 | { |
@@ -48,10 +48,10 @@ static void _display_pin_init(void) | |||
48 | __gpio_as_output(PIN_CS_N); | 48 | __gpio_as_output(PIN_CS_N); |
49 | __gpio_as_output(PIN_RESET_N); | 49 | __gpio_as_output(PIN_RESET_N); |
50 | DELAY; /* delay_ms(10); */ | 50 | DELAY; /* delay_ms(10); */ |
51 | 51 | ||
52 | __gpio_clear_pin(PIN_CS_N); | 52 | __gpio_clear_pin(PIN_CS_N); |
53 | DELAY; /* delay_ms(10); */ | 53 | DELAY; /* delay_ms(10); */ |
54 | 54 | ||
55 | __gpio_set_pin(PIN_RESET_N); | 55 | __gpio_set_pin(PIN_RESET_N); |
56 | DELAY; /* delay_ms(10); */ | 56 | DELAY; /* delay_ms(10); */ |
57 | __gpio_clear_pin(PIN_RESET_N); | 57 | __gpio_clear_pin(PIN_RESET_N); |
@@ -80,13 +80,13 @@ static void _display_pin_init(void) | |||
80 | static void _display_init(void) | 80 | static void _display_init(void) |
81 | { | 81 | { |
82 | int i; | 82 | int i; |
83 | 83 | ||
84 | SLCD_SEND_COMMAND(0xE3, 0x8); | 84 | SLCD_SEND_COMMAND(0xE3, 0x8); |
85 | SLCD_SEND_COMMAND(0xE4, 0x1411); | 85 | SLCD_SEND_COMMAND(0xE4, 0x1411); |
86 | SLCD_SEND_COMMAND(0xE5, 0x8000); | 86 | SLCD_SEND_COMMAND(0xE5, 0x8000); |
87 | SLCD_SEND_COMMAND(0x0, 0x1); | 87 | SLCD_SEND_COMMAND(0x0, 0x1); |
88 | DELAY; /* delay_ms(10); */ | 88 | DELAY; /* delay_ms(10); */ |
89 | 89 | ||
90 | SLCD_SEND_COMMAND(0x1, 0x100); | 90 | SLCD_SEND_COMMAND(0x1, 0x100); |
91 | SLCD_SEND_COMMAND(0x2, 0x400); | 91 | SLCD_SEND_COMMAND(0x2, 0x400); |
92 | SLCD_SEND_COMMAND(0x3, 0x1028); | 92 | SLCD_SEND_COMMAND(0x3, 0x1028); |
@@ -139,7 +139,7 @@ static void _display_init(void) | |||
139 | SLCD_SEND_COMMAND(0x97, 0); | 139 | SLCD_SEND_COMMAND(0x97, 0); |
140 | SLCD_SEND_COMMAND(0x98, 0); | 140 | SLCD_SEND_COMMAND(0x98, 0); |
141 | SLCD_SEND_COMMAND(0x7, 0x173); | 141 | SLCD_SEND_COMMAND(0x7, 0x173); |
142 | 142 | ||
143 | __gpio_clear_pin(PIN_UNK_N); | 143 | __gpio_clear_pin(PIN_UNK_N); |
144 | SLCD_SET_COMMAND(0x22); | 144 | SLCD_SET_COMMAND(0x22); |
145 | WAIT_ON_SLCD; | 145 | WAIT_ON_SLCD; |
@@ -158,7 +158,7 @@ static void _set_lcd_bus(void) | |||
158 | { | 158 | { |
159 | REG_LCD_CFG &= ~LCD_CFG_LCDPIN_MASK; | 159 | REG_LCD_CFG &= ~LCD_CFG_LCDPIN_MASK; |
160 | REG_LCD_CFG |= LCD_CFG_LCDPIN_SLCD; | 160 | REG_LCD_CFG |= LCD_CFG_LCDPIN_SLCD; |
161 | 161 | ||
162 | REG_SLCD_CFG = (SLCD_CFG_BURST_4_WORD | SLCD_CFG_DWIDTH_18 | SLCD_CFG_CWIDTH_18BIT | 162 | REG_SLCD_CFG = (SLCD_CFG_BURST_4_WORD | SLCD_CFG_DWIDTH_18 | SLCD_CFG_CWIDTH_18BIT |
163 | | SLCD_CFG_CS_ACTIVE_LOW | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING | 163 | | SLCD_CFG_CS_ACTIVE_LOW | SLCD_CFG_RS_CMD_LOW | SLCD_CFG_CLK_ACTIVE_FALLING |
164 | | SLCD_CFG_TYPE_PARALLEL); | 164 | | SLCD_CFG_TYPE_PARALLEL); |
@@ -167,15 +167,15 @@ static void _set_lcd_bus(void) | |||
167 | static void _set_lcd_clock(void) | 167 | static void _set_lcd_clock(void) |
168 | { | 168 | { |
169 | unsigned int val; | 169 | unsigned int val; |
170 | 170 | ||
171 | __cpm_stop_lcd(); | 171 | __cpm_stop_lcd(); |
172 | 172 | ||
173 | val = __cpm_get_pllout2() / LCD_PCLK; | 173 | val = __cpm_get_pllout2() / LCD_PCLK; |
174 | val--; | 174 | val--; |
175 | if ( val > 0x1ff ) | 175 | if ( val > 0x1ff ) |
176 | val = 0x1ff; /* CPM_LPCDR is too large, set it to 0x1ff */ | 176 | val = 0x1ff; /* CPM_LPCDR is too large, set it to 0x1ff */ |
177 | __cpm_set_pixdiv(val); | 177 | __cpm_set_pixdiv(val); |
178 | 178 | ||
179 | __cpm_start_lcd(); | 179 | __cpm_start_lcd(); |
180 | } | 180 | } |
181 | 181 | ||
@@ -196,7 +196,7 @@ void lcd_set_target(int x, int y, int width, int height) | |||
196 | SLCD_SEND_COMMAND(0x52, x); | 196 | SLCD_SEND_COMMAND(0x52, x); |
197 | SLCD_SEND_COMMAND(0x53, x+width-1); | 197 | SLCD_SEND_COMMAND(0x53, x+width-1); |
198 | /* TODO */ | 198 | /* TODO */ |
199 | 199 | ||
200 | __gpio_clear_pin(PIN_UNK_N); | 200 | __gpio_clear_pin(PIN_UNK_N); |
201 | SLCD_SET_COMMAND(0x22); | 201 | SLCD_SET_COMMAND(0x22); |
202 | WAIT_ON_SLCD; | 202 | WAIT_ON_SLCD; |