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author | Marcoen Hirschberg <marcoen@gmail.com> | 2008-06-27 23:24:34 +0000 |
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committer | Marcoen Hirschberg <marcoen@gmail.com> | 2008-06-27 23:24:34 +0000 |
commit | 7b10ef9a7c55764d1b6815fd0871cb51ff0205f9 (patch) | |
tree | 0b2056ef0334e45107b02118040baae49d51b142 /firmware/target/arm/s5l8700/system-s5l8700.c | |
parent | 5c763f4001c1634ea62ded26339df52494e6c718 (diff) | |
download | rockbox-7b10ef9a7c55764d1b6815fd0871cb51ff0205f9.tar.gz rockbox-7b10ef9a7c55764d1b6815fd0871cb51ff0205f9.zip |
initial Meizu M6SL port (take 2)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17819 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s5l8700/system-s5l8700.c')
-rw-r--r-- | firmware/target/arm/s5l8700/system-s5l8700.c | 168 |
1 files changed, 168 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8700/system-s5l8700.c b/firmware/target/arm/s5l8700/system-s5l8700.c new file mode 100644 index 0000000000..2d87cc8c9a --- /dev/null +++ b/firmware/target/arm/s5l8700/system-s5l8700.c | |||
@@ -0,0 +1,168 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Rob Purchase | ||
11 | * | ||
12 | * All files in this archive are subject to the GNU General Public License. | ||
13 | * See the file COPYING in the source tree root for full license agreement. | ||
14 | * | ||
15 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
16 | * KIND, either express or implied. | ||
17 | * | ||
18 | ****************************************************************************/ | ||
19 | |||
20 | #include "kernel.h" | ||
21 | #include "system.h" | ||
22 | #include "panic.h" | ||
23 | |||
24 | #define default_interrupt(name) \ | ||
25 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | ||
26 | |||
27 | void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); | ||
28 | void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); | ||
29 | |||
30 | default_interrupt(EXT0); | ||
31 | default_interrupt(EXT1); | ||
32 | default_interrupt(EXT2); | ||
33 | default_interrupt(EINT_VBUS); | ||
34 | default_interrupt(EINTG); | ||
35 | default_interrupt(INT_TIMERA); | ||
36 | default_interrupt(INT_WDT); | ||
37 | default_interrupt(INT_TIMERB); | ||
38 | default_interrupt(INT_TIMERC); | ||
39 | default_interrupt(INT_TIMERD); | ||
40 | default_interrupt(INT_DMA); | ||
41 | default_interrupt(INT_ALARM_RTC); | ||
42 | default_interrupt(INT_PRI_RTC); | ||
43 | default_interrupt(RESERVED1); | ||
44 | default_interrupt(INT_UART); | ||
45 | default_interrupt(INT_USB_HOST); | ||
46 | default_interrupt(INT_USB_FUNC); | ||
47 | default_interrupt(INT_LCDC_0); | ||
48 | default_interrupt(INT_LCDC_1); | ||
49 | default_interrupt(INT_ECC); | ||
50 | default_interrupt(INT_CALM); | ||
51 | default_interrupt(INT_ATA); | ||
52 | default_interrupt(INT_UART0); | ||
53 | default_interrupt(INT_SPDIF_OUT); | ||
54 | default_interrupt(INT_SDCI); | ||
55 | default_interrupt(INT_LCD); | ||
56 | default_interrupt(INT_SPI); | ||
57 | default_interrupt(INT_IIC); | ||
58 | default_interrupt(RESERVED2); | ||
59 | default_interrupt(INT_MSTICK); | ||
60 | default_interrupt(INT_ADC_WAKEUP); | ||
61 | default_interrupt(INT_ADC); | ||
62 | |||
63 | |||
64 | |||
65 | static void (* const irqvector[])(void) = | ||
66 | { | ||
67 | EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMERA,INT_WDT,INT_TIMERB, | ||
68 | INT_TIMERC,INT_TIMERD,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART,INT_USB_HOST, | ||
69 | INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_ECC,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT, | ||
70 | INT_SDCI,INT_LCD,INT_SPI,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC | ||
71 | }; | ||
72 | |||
73 | static const char * const irqname[] = | ||
74 | { | ||
75 | "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMERA","INT_WDT","INT_TIMERB", | ||
76 | "INT_TIMERC","INT_TIMERD","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART","INT_USB_HOST", | ||
77 | "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_ECC","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT", | ||
78 | "INT_SDCI","INT_LCD","INT_SPI","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC" | ||
79 | }; | ||
80 | |||
81 | static void UIRQ(void) | ||
82 | { | ||
83 | unsigned int offset = INTOFFSET; | ||
84 | panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); | ||
85 | } | ||
86 | |||
87 | void irq_handler(void) | ||
88 | { | ||
89 | /* | ||
90 | * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c | ||
91 | */ | ||
92 | |||
93 | asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ | ||
94 | "sub sp, sp, #8 \n"); /* Reserve stack */ | ||
95 | |||
96 | int irq_no = INTOFFSET; /* Read clears the corresponding IRQ status */ | ||
97 | |||
98 | if ((irq_no & (1<<31)) == 0) /* Ensure invalid flag is not set */ | ||
99 | { | ||
100 | irqvector[irq_no](); | ||
101 | } | ||
102 | |||
103 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ | ||
104 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ | ||
105 | "subs pc, lr, #4 \n"); /* Return from IRQ */ | ||
106 | } | ||
107 | |||
108 | void fiq_handler(void) | ||
109 | { | ||
110 | asm volatile ( | ||
111 | "subs pc, lr, #4 \r\n" | ||
112 | ); | ||
113 | } | ||
114 | |||
115 | |||
116 | static void gpio_init(void) | ||
117 | { | ||
118 | } | ||
119 | |||
120 | static void clock_init(void) | ||
121 | { | ||
122 | } | ||
123 | |||
124 | |||
125 | void system_init(void) | ||
126 | { | ||
127 | } | ||
128 | |||
129 | void system_reboot(void) | ||
130 | { | ||
131 | } | ||
132 | |||
133 | int system_memory_guard(int newmode) | ||
134 | { | ||
135 | (void)newmode; | ||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | ||
140 | |||
141 | void set_cpu_frequency(long frequency) | ||
142 | { | ||
143 | if (cpu_frequency == frequency) | ||
144 | return; | ||
145 | |||
146 | /* CPU/COP frequencies can be scaled between Fbus (min) and Fsys (max). | ||
147 | Fbus should not be set below ~32Mhz with LCD enabled or the display | ||
148 | will be garbled. */ | ||
149 | if (frequency == CPUFREQ_MAX) | ||
150 | { | ||
151 | } | ||
152 | else if (frequency == CPUFREQ_NORMAL) | ||
153 | { | ||
154 | } | ||
155 | else | ||
156 | { | ||
157 | } | ||
158 | |||
159 | asm volatile ( | ||
160 | "nop \n\t" | ||
161 | "nop \n\t" | ||
162 | "nop \n\t" | ||
163 | ); | ||
164 | |||
165 | cpu_frequency = frequency; | ||
166 | } | ||
167 | |||
168 | #endif | ||