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authorMichael Sevakis <jethead71@rockbox.org>2010-06-30 02:02:46 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-06-30 02:02:46 +0000
commite286b0bbc04a34c181978efce19c6d0814e228c0 (patch)
tree841288761e20dc9a7a25e5ba83306adf52547d65 /firmware/target/arm/s3c2440/kernel-s3c2440.c
parentf4a00174b50c209f2a23b7a73fe7cb544ef59d02 (diff)
downloadrockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.tar.gz
rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.zip
Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/kernel-s3c2440.c')
-rw-r--r--firmware/target/arm/s3c2440/kernel-s3c2440.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/s3c2440/kernel-s3c2440.c b/firmware/target/arm/s3c2440/kernel-s3c2440.c
index 6cabc8dc81..892758e147 100644
--- a/firmware/target/arm/s3c2440/kernel-s3c2440.c
+++ b/firmware/target/arm/s3c2440/kernel-s3c2440.c
@@ -62,7 +62,7 @@ void tick_start(unsigned int interval_in_ms)
62#ifdef BOOTLOADER 62#ifdef BOOTLOADER
63void tick_stop(void) 63void tick_stop(void)
64{ 64{
65 s3c_regset32(&INTMSK, TIMER4_MASK); 65 bitset32(&INTMSK, TIMER4_MASK);
66 TCON &= ~(1 << 20); 66 TCON &= ~(1 << 20);
67 SRCPND = TIMER4_MASK; 67 SRCPND = TIMER4_MASK;
68 INTPND = TIMER4_MASK; 68 INTPND = TIMER4_MASK;