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authorMichael Sevakis <jethead71@rockbox.org>2010-06-30 02:02:46 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-06-30 02:02:46 +0000
commite286b0bbc04a34c181978efce19c6d0814e228c0 (patch)
tree841288761e20dc9a7a25e5ba83306adf52547d65 /firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
parentf4a00174b50c209f2a23b7a73fe7cb544ef59d02 (diff)
downloadrockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.tar.gz
rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.zip
Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c')
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
index e9f55479c7..c1c9017fbb 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
@@ -50,14 +50,14 @@ void fiq_handler(void) __attribute__((interrupt ("FIQ")));
50void pcm_play_lock(void) 50void pcm_play_lock(void)
51{ 51{
52 if (++dma_play_lock.locked == 1) 52 if (++dma_play_lock.locked == 1)
53 s3c_regset32(&INTMSK, DMA2_MASK); 53 bitset32(&INTMSK, DMA2_MASK);
54} 54}
55 55
56/* Unmask the DMA interrupt if enabled */ 56/* Unmask the DMA interrupt if enabled */
57void pcm_play_unlock(void) 57void pcm_play_unlock(void)
58{ 58{
59 if (--dma_play_lock.locked == 0) 59 if (--dma_play_lock.locked == 0)
60 s3c_regclr32(&INTMSK, dma_play_lock.state); 60 bitclr32(&INTMSK, dma_play_lock.state);
61} 61}
62 62
63void pcm_play_dma_init(void) 63void pcm_play_dma_init(void)
@@ -65,7 +65,7 @@ void pcm_play_dma_init(void)
65 /* There seem to be problems when changing the IIS interface configuration 65 /* There seem to be problems when changing the IIS interface configuration
66 * when a clock is not present. 66 * when a clock is not present.
67 */ 67 */
68 s3c_regset32(&CLKCON, 1<<17); 68 bitset32(&CLKCON, 1<<17);
69 /* slave, transmit mode, 16 bit samples - MCLK 384fs - use 16.9344Mhz - 69 /* slave, transmit mode, 16 bit samples - MCLK 384fs - use 16.9344Mhz -
70 BCLK 32fs */ 70 BCLK 32fs */
71 IISMOD = (1<<9) | (1<<8) | (2<<6) | (1<<3) | (1<<2) | (1<<0); 71 IISMOD = (1<<9) | (1<<8) | (2<<6) | (1<<3) | (1<<2) | (1<<0);
@@ -73,7 +73,7 @@ void pcm_play_dma_init(void)
73 /* RX,TX off,on */ 73 /* RX,TX off,on */
74 IISCON |= (1<<3) | (1<<2); 74 IISCON |= (1<<3) | (1<<2);
75 75
76 s3c_regclr32(&CLKCON, 1<<17); 76 bitclr32(&CLKCON, 1<<17);
77 77
78 audiohw_init(); 78 audiohw_init();
79 79
@@ -86,11 +86,11 @@ void pcm_play_dma_init(void)
86 /* Do not service DMA requests, yet */ 86 /* Do not service DMA requests, yet */
87 87
88 /* clear any pending int and mask it */ 88 /* clear any pending int and mask it */
89 s3c_regset32(&INTMSK, DMA2_MASK); 89 bitset32(&INTMSK, DMA2_MASK);
90 SRCPND = DMA2_MASK; 90 SRCPND = DMA2_MASK;
91 91
92 /* connect to FIQ */ 92 /* connect to FIQ */
93 s3c_regset32(&INTMOD, DMA2_MASK); 93 bitset32(&INTMOD, DMA2_MASK);
94} 94}
95 95
96void pcm_postinit(void) 96void pcm_postinit(void)
@@ -132,7 +132,7 @@ static void play_start_pcm(void)
132static void play_stop_pcm(void) 132static void play_stop_pcm(void)
133{ 133{
134 /* Mask DMA interrupt */ 134 /* Mask DMA interrupt */
135 s3c_regset32(&INTMSK, DMA2_MASK); 135 bitset32(&INTMSK, DMA2_MASK);
136 136
137 /* De-Activate the DMA channel */ 137 /* De-Activate the DMA channel */
138 DMASKTRIG2 = 0x4; 138 DMASKTRIG2 = 0x4;
@@ -160,7 +160,7 @@ static void play_stop_pcm(void)
160void pcm_play_dma_start(const void *addr, size_t size) 160void pcm_play_dma_start(const void *addr, size_t size)
161{ 161{
162 /* Enable the IIS clock */ 162 /* Enable the IIS clock */
163 s3c_regset32(&CLKCON, 1<<17); 163 bitset32(&CLKCON, 1<<17);
164 164
165 /* stop any DMA in progress - idle IIS */ 165 /* stop any DMA in progress - idle IIS */
166 play_stop_pcm(); 166 play_stop_pcm();
@@ -191,7 +191,7 @@ void pcm_play_dma_stop(void)
191 play_stop_pcm(); 191 play_stop_pcm();
192 192
193 /* Disconnect the IIS clock */ 193 /* Disconnect the IIS clock */
194 s3c_regclr32(&CLKCON, 1<<17); 194 bitclr32(&CLKCON, 1<<17);
195} 195}
196 196
197void pcm_play_dma_pause(bool pause) 197void pcm_play_dma_pause(bool pause)