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| author | Michael Sevakis <jethead71@rockbox.org> | 2010-06-30 02:02:46 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2010-06-30 02:02:46 +0000 |
| commit | e286b0bbc04a34c181978efce19c6d0814e228c0 (patch) | |
| tree | 841288761e20dc9a7a25e5ba83306adf52547d65 /firmware/target/arm/imx31/ccm-imx31.c | |
| parent | f4a00174b50c209f2a23b7a73fe7cb544ef59d02 (diff) | |
| download | rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.tar.gz rockbox-e286b0bbc04a34c181978efce19c6d0814e228c0.zip | |
Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/ccm-imx31.c')
| -rw-r--r-- | firmware/target/arm/imx31/ccm-imx31.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/imx31/ccm-imx31.c b/firmware/target/arm/imx31/ccm-imx31.c index 2cf2080cf1..00a7d859b1 100644 --- a/firmware/target/arm/imx31/ccm-imx31.c +++ b/firmware/target/arm/imx31/ccm-imx31.c | |||
| @@ -43,7 +43,7 @@ void ccm_module_clock_gating(enum IMX31_CG_LIST cg, enum IMX31_CG_MODES mode) | |||
| 43 | shift = 2*(cg % 16); /* Get field shift */ | 43 | shift = 2*(cg % 16); /* Get field shift */ |
| 44 | mask = CG_MASK << shift; /* Select field */ | 44 | mask = CG_MASK << shift; /* Select field */ |
| 45 | 45 | ||
| 46 | imx31_regmod32(reg, mode << shift, mask); | 46 | bitmod32(reg, mode << shift, mask); |
| 47 | } | 47 | } |
| 48 | 48 | ||
| 49 | /* Decode PLL output frequency from register value */ | 49 | /* Decode PLL output frequency from register value */ |