diff options
author | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-13 19:03:33 +0200 |
---|---|---|
committer | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-15 22:27:34 +0200 |
commit | 017667c2dc9843eb5082e991f421c773636dcf36 (patch) | |
tree | 60432008dd3bc012ac60cbfa771305f6d894dd84 /firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h | |
parent | 97b9ade63945fd8b8261fb0cf1dd0aa225c1a319 (diff) | |
download | rockbox-017667c2dc9843eb5082e991f421c773636dcf36.tar.gz rockbox-017667c2dc9843eb5082e991f421c773636dcf36.zip |
imx233: generate register headers for stmp3600, stmp3700 and imx233
Change-Id: Ia87086f4f4f4ecbb844ffd869407b14ea2509934
Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h')
-rw-r--r-- | firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h | 405 |
1 files changed, 405 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h b/firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h new file mode 100644 index 0000000000..f255a3bc6c --- /dev/null +++ b/firmware/target/arm/imx233/regs/stmp3600/regs-usbphy.h | |||
@@ -0,0 +1,405 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 2.1.7 | ||
10 | * XML versions: stmp3600:2.3.0 | ||
11 | * | ||
12 | * Copyright (C) 2013 by Amaury Pouly | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version 2 | ||
17 | * of the License, or (at your option) any later version. | ||
18 | * | ||
19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
20 | * KIND, either express or implied. | ||
21 | * | ||
22 | ****************************************************************************/ | ||
23 | #ifndef __HEADERGEN__STMP3600__USBPHY__H__ | ||
24 | #define __HEADERGEN__STMP3600__USBPHY__H__ | ||
25 | |||
26 | #define REGS_USBPHY_BASE (0x8007c000) | ||
27 | |||
28 | #define REGS_USBPHY_VERSION "2.3.0" | ||
29 | |||
30 | /** | ||
31 | * Register: HW_USBPHY_PWD | ||
32 | * Address: 0 | ||
33 | * SCT: yes | ||
34 | */ | ||
35 | #define HW_USBPHY_PWD (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x0 + 0x0)) | ||
36 | #define HW_USBPHY_PWD_SET (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x0 + 0x4)) | ||
37 | #define HW_USBPHY_PWD_CLR (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x0 + 0x8)) | ||
38 | #define HW_USBPHY_PWD_TOG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x0 + 0xc)) | ||
39 | #define BP_USBPHY_PWD_RXPWDRX 20 | ||
40 | #define BM_USBPHY_PWD_RXPWDRX 0x100000 | ||
41 | #define BF_USBPHY_PWD_RXPWDRX(v) (((v) << 20) & 0x100000) | ||
42 | #define BP_USBPHY_PWD_RXPWDDIFF 19 | ||
43 | #define BM_USBPHY_PWD_RXPWDDIFF 0x80000 | ||
44 | #define BF_USBPHY_PWD_RXPWDDIFF(v) (((v) << 19) & 0x80000) | ||
45 | #define BP_USBPHY_PWD_RXPWD1PT1 18 | ||
46 | #define BM_USBPHY_PWD_RXPWD1PT1 0x40000 | ||
47 | #define BF_USBPHY_PWD_RXPWD1PT1(v) (((v) << 18) & 0x40000) | ||
48 | #define BP_USBPHY_PWD_RXPWDENV 17 | ||
49 | #define BM_USBPHY_PWD_RXPWDENV 0x20000 | ||
50 | #define BF_USBPHY_PWD_RXPWDENV(v) (((v) << 17) & 0x20000) | ||
51 | #define BP_USBPHY_PWD_TXPWDCOMP 14 | ||
52 | #define BM_USBPHY_PWD_TXPWDCOMP 0x4000 | ||
53 | #define BF_USBPHY_PWD_TXPWDCOMP(v) (((v) << 14) & 0x4000) | ||
54 | #define BP_USBPHY_PWD_TXPWDVBG 13 | ||
55 | #define BM_USBPHY_PWD_TXPWDVBG 0x2000 | ||
56 | #define BF_USBPHY_PWD_TXPWDVBG(v) (((v) << 13) & 0x2000) | ||
57 | #define BP_USBPHY_PWD_TXPWDV2I 12 | ||
58 | #define BM_USBPHY_PWD_TXPWDV2I 0x1000 | ||
59 | #define BF_USBPHY_PWD_TXPWDV2I(v) (((v) << 12) & 0x1000) | ||
60 | #define BP_USBPHY_PWD_TXPWDIBIAS 11 | ||
61 | #define BM_USBPHY_PWD_TXPWDIBIAS 0x800 | ||
62 | #define BF_USBPHY_PWD_TXPWDIBIAS(v) (((v) << 11) & 0x800) | ||
63 | #define BP_USBPHY_PWD_TXPWDFS 10 | ||
64 | #define BM_USBPHY_PWD_TXPWDFS 0x400 | ||
65 | #define BF_USBPHY_PWD_TXPWDFS(v) (((v) << 10) & 0x400) | ||
66 | |||
67 | /** | ||
68 | * Register: HW_USBPHY_TX | ||
69 | * Address: 0x10 | ||
70 | * SCT: yes | ||
71 | */ | ||
72 | #define HW_USBPHY_TX (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x10 + 0x0)) | ||
73 | #define HW_USBPHY_TX_SET (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x10 + 0x4)) | ||
74 | #define HW_USBPHY_TX_CLR (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x10 + 0x8)) | ||
75 | #define HW_USBPHY_TX_TOG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x10 + 0xc)) | ||
76 | #define BP_USBPHY_TX_TXCMPOUT_STATUS 23 | ||
77 | #define BM_USBPHY_TX_TXCMPOUT_STATUS 0x800000 | ||
78 | #define BF_USBPHY_TX_TXCMPOUT_STATUS(v) (((v) << 23) & 0x800000) | ||
79 | #define BP_USBPHY_TX_TXENCAL45DP 21 | ||
80 | #define BM_USBPHY_TX_TXENCAL45DP 0x200000 | ||
81 | #define BF_USBPHY_TX_TXENCAL45DP(v) (((v) << 21) & 0x200000) | ||
82 | #define BP_USBPHY_TX_TXCAL45DP 16 | ||
83 | #define BM_USBPHY_TX_TXCAL45DP 0x1f0000 | ||
84 | #define BF_USBPHY_TX_TXCAL45DP(v) (((v) << 16) & 0x1f0000) | ||
85 | #define BP_USBPHY_TX_TXENCAL45DN 13 | ||
86 | #define BM_USBPHY_TX_TXENCAL45DN 0x2000 | ||
87 | #define BF_USBPHY_TX_TXENCAL45DN(v) (((v) << 13) & 0x2000) | ||
88 | #define BP_USBPHY_TX_TXCAL45DN 8 | ||
89 | #define BM_USBPHY_TX_TXCAL45DN 0x1f00 | ||
90 | #define BF_USBPHY_TX_TXCAL45DN(v) (((v) << 8) & 0x1f00) | ||
91 | #define BP_USBPHY_TX_TXCALIBRATE 7 | ||
92 | #define BM_USBPHY_TX_TXCALIBRATE 0x80 | ||
93 | #define BF_USBPHY_TX_TXCALIBRATE(v) (((v) << 7) & 0x80) | ||
94 | |||
95 | /** | ||
96 | * Register: HW_USBPHY_RX | ||
97 | * Address: 0x20 | ||
98 | * SCT: yes | ||
99 | */ | ||
100 | #define HW_USBPHY_RX (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x20 + 0x0)) | ||
101 | #define HW_USBPHY_RX_SET (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x20 + 0x4)) | ||
102 | #define HW_USBPHY_RX_CLR (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x20 + 0x8)) | ||
103 | #define HW_USBPHY_RX_TOG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x20 + 0xc)) | ||
104 | #define BP_USBPHY_RX_RXDBYPASS 22 | ||
105 | #define BM_USBPHY_RX_RXDBYPASS 0x400000 | ||
106 | #define BF_USBPHY_RX_RXDBYPASS(v) (((v) << 22) & 0x400000) | ||
107 | #define BP_USBPHY_RX_DISCONADJ 4 | ||
108 | #define BM_USBPHY_RX_DISCONADJ 0x30 | ||
109 | #define BF_USBPHY_RX_DISCONADJ(v) (((v) << 4) & 0x30) | ||
110 | #define BP_USBPHY_RX_ENVADJ 0 | ||
111 | #define BM_USBPHY_RX_ENVADJ 0x3 | ||
112 | #define BF_USBPHY_RX_ENVADJ(v) (((v) << 0) & 0x3) | ||
113 | |||
114 | /** | ||
115 | * Register: HW_USBPHY_CTRL | ||
116 | * Address: 0x30 | ||
117 | * SCT: yes | ||
118 | */ | ||
119 | #define HW_USBPHY_CTRL (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x30 + 0x0)) | ||
120 | #define HW_USBPHY_CTRL_SET (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x30 + 0x4)) | ||
121 | #define HW_USBPHY_CTRL_CLR (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x30 + 0x8)) | ||
122 | #define HW_USBPHY_CTRL_TOG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x30 + 0xc)) | ||
123 | #define BP_USBPHY_CTRL_SFTRST 31 | ||
124 | #define BM_USBPHY_CTRL_SFTRST 0x80000000 | ||
125 | #define BF_USBPHY_CTRL_SFTRST(v) (((v) << 31) & 0x80000000) | ||
126 | #define BP_USBPHY_CTRL_CLKGATE 30 | ||
127 | #define BM_USBPHY_CTRL_CLKGATE 0x40000000 | ||
128 | #define BF_USBPHY_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000) | ||
129 | #define BP_USBPHY_CTRL_UTMI_SUSPENDM 29 | ||
130 | #define BM_USBPHY_CTRL_UTMI_SUSPENDM 0x20000000 | ||
131 | #define BF_USBPHY_CTRL_UTMI_SUSPENDM(v) (((v) << 29) & 0x20000000) | ||
132 | #define BP_USBPHY_CTRL_RESUME_IRQ 10 | ||
133 | #define BM_USBPHY_CTRL_RESUME_IRQ 0x400 | ||
134 | #define BF_USBPHY_CTRL_RESUME_IRQ(v) (((v) << 10) & 0x400) | ||
135 | #define BP_USBPHY_CTRL_ENIRQRESUMEDETECT 9 | ||
136 | #define BM_USBPHY_CTRL_ENIRQRESUMEDETECT 0x200 | ||
137 | #define BF_USBPHY_CTRL_ENIRQRESUMEDETECT(v) (((v) << 9) & 0x200) | ||
138 | #define BP_USBPHY_CTRL_ENOTGIDDETECT 7 | ||
139 | #define BM_USBPHY_CTRL_ENOTGIDDETECT 0x80 | ||
140 | #define BF_USBPHY_CTRL_ENOTGIDDETECT(v) (((v) << 7) & 0x80) | ||
141 | #define BP_USBPHY_CTRL_ENDEVPLUGINDETECT 4 | ||
142 | #define BM_USBPHY_CTRL_ENDEVPLUGINDETECT 0x10 | ||
143 | #define BF_USBPHY_CTRL_ENDEVPLUGINDETECT(v) (((v) << 4) & 0x10) | ||
144 | #define BP_USBPHY_CTRL_HOSTDISCONDETECT_IRQ 3 | ||
145 | #define BM_USBPHY_CTRL_HOSTDISCONDETECT_IRQ 0x8 | ||
146 | #define BF_USBPHY_CTRL_HOSTDISCONDETECT_IRQ(v) (((v) << 3) & 0x8) | ||
147 | #define BP_USBPHY_CTRL_ENIRQHOSTDISCON 2 | ||
148 | #define BM_USBPHY_CTRL_ENIRQHOSTDISCON 0x4 | ||
149 | #define BF_USBPHY_CTRL_ENIRQHOSTDISCON(v) (((v) << 2) & 0x4) | ||
150 | #define BP_USBPHY_CTRL_ENHOSTDISCONDETECT 1 | ||
151 | #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT 0x2 | ||
152 | #define BF_USBPHY_CTRL_ENHOSTDISCONDETECT(v) (((v) << 1) & 0x2) | ||
153 | #define BP_USBPHY_CTRL_ENHSPRECHARGEXMIT 0 | ||
154 | #define BM_USBPHY_CTRL_ENHSPRECHARGEXMIT 0x1 | ||
155 | #define BF_USBPHY_CTRL_ENHSPRECHARGEXMIT(v) (((v) << 0) & 0x1) | ||
156 | |||
157 | /** | ||
158 | * Register: HW_USBPHY_STATUS | ||
159 | * Address: 0x40 | ||
160 | * SCT: no | ||
161 | */ | ||
162 | #define HW_USBPHY_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x40)) | ||
163 | #define BP_USBPHY_STATUS_RESUME_STATUS 10 | ||
164 | #define BM_USBPHY_STATUS_RESUME_STATUS 0x400 | ||
165 | #define BF_USBPHY_STATUS_RESUME_STATUS(v) (((v) << 10) & 0x400) | ||
166 | #define BP_USBPHY_STATUS_OTGID_STATUS 8 | ||
167 | #define BM_USBPHY_STATUS_OTGID_STATUS 0x100 | ||
168 | #define BF_USBPHY_STATUS_OTGID_STATUS(v) (((v) << 8) & 0x100) | ||
169 | #define BP_USBPHY_STATUS_DEVPLUGIN_STATUS 6 | ||
170 | #define BM_USBPHY_STATUS_DEVPLUGIN_STATUS 0x40 | ||
171 | #define BF_USBPHY_STATUS_DEVPLUGIN_STATUS(v) (((v) << 6) & 0x40) | ||
172 | #define BP_USBPHY_STATUS_HOSTDISCONDETECT_STATUS 3 | ||
173 | #define BM_USBPHY_STATUS_HOSTDISCONDETECT_STATUS 0x8 | ||
174 | #define BF_USBPHY_STATUS_HOSTDISCONDETECT_STATUS(v) (((v) << 3) & 0x8) | ||
175 | |||
176 | /** | ||
177 | * Register: HW_USBPHY_DEBUG | ||
178 | * Address: 0x50 | ||
179 | * SCT: yes | ||
180 | */ | ||
181 | #define HW_USBPHY_DEBUG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x50 + 0x0)) | ||
182 | #define HW_USBPHY_DEBUG_SET (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x50 + 0x4)) | ||
183 | #define HW_USBPHY_DEBUG_CLR (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x50 + 0x8)) | ||
184 | #define HW_USBPHY_DEBUG_TOG (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x50 + 0xc)) | ||
185 | #define BP_USBPHY_DEBUG_CLKGATE 30 | ||
186 | #define BM_USBPHY_DEBUG_CLKGATE 0x40000000 | ||
187 | #define BF_USBPHY_DEBUG_CLKGATE(v) (((v) << 30) & 0x40000000) | ||
188 | #define BP_USBPHY_DEBUG_SQUELCHRESETLENGTH 25 | ||
189 | #define BM_USBPHY_DEBUG_SQUELCHRESETLENGTH 0x1e000000 | ||
190 | #define BF_USBPHY_DEBUG_SQUELCHRESETLENGTH(v) (((v) << 25) & 0x1e000000) | ||
191 | #define BP_USBPHY_DEBUG_ENSQUELCHRESET 24 | ||
192 | #define BM_USBPHY_DEBUG_ENSQUELCHRESET 0x1000000 | ||
193 | #define BF_USBPHY_DEBUG_ENSQUELCHRESET(v) (((v) << 24) & 0x1000000) | ||
194 | #define BP_USBPHY_DEBUG_SQUELCHRESETCOUNT 16 | ||
195 | #define BM_USBPHY_DEBUG_SQUELCHRESETCOUNT 0x1f0000 | ||
196 | #define BF_USBPHY_DEBUG_SQUELCHRESETCOUNT(v) (((v) << 16) & 0x1f0000) | ||
197 | #define BP_USBPHY_DEBUG_ENTX2RXCOUNT 12 | ||
198 | #define BM_USBPHY_DEBUG_ENTX2RXCOUNT 0x1000 | ||
199 | #define BF_USBPHY_DEBUG_ENTX2RXCOUNT(v) (((v) << 12) & 0x1000) | ||
200 | #define BP_USBPHY_DEBUG_TX2RXCOUNT 8 | ||
201 | #define BM_USBPHY_DEBUG_TX2RXCOUNT 0xf00 | ||
202 | #define BF_USBPHY_DEBUG_TX2RXCOUNT(v) (((v) << 8) & 0xf00) | ||
203 | #define BP_USBPHY_DEBUG_ENHSTPULLDOWN 4 | ||
204 | #define BM_USBPHY_DEBUG_ENHSTPULLDOWN 0x30 | ||
205 | #define BF_USBPHY_DEBUG_ENHSTPULLDOWN(v) (((v) << 4) & 0x30) | ||
206 | #define BP_USBPHY_DEBUG_HSTPULLDOWN 2 | ||
207 | #define BM_USBPHY_DEBUG_HSTPULLDOWN 0xc | ||
208 | #define BF_USBPHY_DEBUG_HSTPULLDOWN(v) (((v) << 2) & 0xc) | ||
209 | #define BP_USBPHY_DEBUG_DEBUG_INTERFACE_HOLD 1 | ||
210 | #define BM_USBPHY_DEBUG_DEBUG_INTERFACE_HOLD 0x2 | ||
211 | #define BF_USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(v) (((v) << 1) & 0x2) | ||
212 | #define BP_USBPHY_DEBUG_OTGIDPIOLOCK 0 | ||
213 | #define BM_USBPHY_DEBUG_OTGIDPIOLOCK 0x1 | ||
214 | #define BF_USBPHY_DEBUG_OTGIDPIOLOCK(v) (((v) << 0) & 0x1) | ||
215 | |||
216 | /** | ||
217 | * Register: HW_USBPHY_DEBUG0_STATUS | ||
218 | * Address: 0x60 | ||
219 | * SCT: no | ||
220 | */ | ||
221 | #define HW_USBPHY_DEBUG0_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x60)) | ||
222 | #define BP_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 26 | ||
223 | #define BM_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT 0xfc000000 | ||
224 | #define BF_USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(v) (((v) << 26) & 0xfc000000) | ||
225 | #define BP_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT 16 | ||
226 | #define BM_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT 0x3ff0000 | ||
227 | #define BF_USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(v) (((v) << 16) & 0x3ff0000) | ||
228 | #define BP_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT 0 | ||
229 | #define BM_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT 0xffff | ||
230 | #define BF_USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(v) (((v) << 0) & 0xffff) | ||
231 | |||
232 | /** | ||
233 | * Register: HW_USBPHY_DEBUG1_STATUS | ||
234 | * Address: 0x70 | ||
235 | * SCT: no | ||
236 | */ | ||
237 | #define HW_USBPHY_DEBUG1_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x70)) | ||
238 | #define BP_USBPHY_DEBUG1_STATUS_UTMI_TX_DATA 16 | ||
239 | #define BM_USBPHY_DEBUG1_STATUS_UTMI_TX_DATA 0xffff0000 | ||
240 | #define BF_USBPHY_DEBUG1_STATUS_UTMI_TX_DATA(v) (((v) << 16) & 0xffff0000) | ||
241 | #define BP_USBPHY_DEBUG1_STATUS_UTMI_RX_DATA 0 | ||
242 | #define BM_USBPHY_DEBUG1_STATUS_UTMI_RX_DATA 0xffff | ||
243 | #define BF_USBPHY_DEBUG1_STATUS_UTMI_RX_DATA(v) (((v) << 0) & 0xffff) | ||
244 | |||
245 | /** | ||
246 | * Register: HW_USBPHY_DEBUG2_STATUS | ||
247 | * Address: 0x80 | ||
248 | * SCT: no | ||
249 | */ | ||
250 | #define HW_USBPHY_DEBUG2_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x80)) | ||
251 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_TXVALIDH 22 | ||
252 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_TXVALIDH 0x400000 | ||
253 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_TXVALIDH(v) (((v) << 22) & 0x400000) | ||
254 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_TXVALID 21 | ||
255 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_TXVALID 0x200000 | ||
256 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_TXVALID(v) (((v) << 21) & 0x200000) | ||
257 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_TERMSELECT 20 | ||
258 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_TERMSELECT 0x100000 | ||
259 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_TERMSELECT(v) (((v) << 20) & 0x100000) | ||
260 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_XCVRSELECT 18 | ||
261 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_XCVRSELECT 0xc0000 | ||
262 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_XCVRSELECT(v) (((v) << 18) & 0xc0000) | ||
263 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_OPMODE 16 | ||
264 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_OPMODE 0x30000 | ||
265 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_OPMODE(v) (((v) << 16) & 0x30000) | ||
266 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_LINESTATE 6 | ||
267 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_LINESTATE 0xc0 | ||
268 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_LINESTATE(v) (((v) << 6) & 0xc0) | ||
269 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_SUSPENDM 5 | ||
270 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_SUSPENDM 0x20 | ||
271 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_SUSPENDM(v) (((v) << 5) & 0x20) | ||
272 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_RXVALIDH 4 | ||
273 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_RXVALIDH 0x10 | ||
274 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_RXVALIDH(v) (((v) << 4) & 0x10) | ||
275 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_RXVALID 3 | ||
276 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_RXVALID 0x8 | ||
277 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_RXVALID(v) (((v) << 3) & 0x8) | ||
278 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_RXACTIVE 2 | ||
279 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_RXACTIVE 0x4 | ||
280 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_RXACTIVE(v) (((v) << 2) & 0x4) | ||
281 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_RXERROR 1 | ||
282 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_RXERROR 0x2 | ||
283 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_RXERROR(v) (((v) << 1) & 0x2) | ||
284 | #define BP_USBPHY_DEBUG2_STATUS_UTMI_TXREADY 0 | ||
285 | #define BM_USBPHY_DEBUG2_STATUS_UTMI_TXREADY 0x1 | ||
286 | #define BF_USBPHY_DEBUG2_STATUS_UTMI_TXREADY(v) (((v) << 0) & 0x1) | ||
287 | |||
288 | /** | ||
289 | * Register: HW_USBPHY_DEBUG3_STATUS | ||
290 | * Address: 0x90 | ||
291 | * SCT: no | ||
292 | */ | ||
293 | #define HW_USBPHY_DEBUG3_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0x90)) | ||
294 | #define BP_USBPHY_DEBUG3_STATUS_B_CNT_FSM 28 | ||
295 | #define BM_USBPHY_DEBUG3_STATUS_B_CNT_FSM 0x70000000 | ||
296 | #define BF_USBPHY_DEBUG3_STATUS_B_CNT_FSM(v) (((v) << 28) & 0x70000000) | ||
297 | #define BP_USBPHY_DEBUG3_STATUS_SQ_UNLOCK_FSM 23 | ||
298 | #define BM_USBPHY_DEBUG3_STATUS_SQ_UNLOCK_FSM 0x3800000 | ||
299 | #define BF_USBPHY_DEBUG3_STATUS_SQ_UNLOCK_FSM(v) (((v) << 23) & 0x3800000) | ||
300 | #define BP_USBPHY_DEBUG3_STATUS_BIT_CNT 12 | ||
301 | #define BM_USBPHY_DEBUG3_STATUS_BIT_CNT 0x3ff000 | ||
302 | #define BF_USBPHY_DEBUG3_STATUS_BIT_CNT(v) (((v) << 12) & 0x3ff000) | ||
303 | #define BP_USBPHY_DEBUG3_STATUS_MAIN_HS_RX_FSM 8 | ||
304 | #define BM_USBPHY_DEBUG3_STATUS_MAIN_HS_RX_FSM 0xf00 | ||
305 | #define BF_USBPHY_DEBUG3_STATUS_MAIN_HS_RX_FSM(v) (((v) << 8) & 0xf00) | ||
306 | #define BP_USBPHY_DEBUG3_STATUS_UNSTUFF_BIT_CNT 0 | ||
307 | #define BM_USBPHY_DEBUG3_STATUS_UNSTUFF_BIT_CNT 0xff | ||
308 | #define BF_USBPHY_DEBUG3_STATUS_UNSTUFF_BIT_CNT(v) (((v) << 0) & 0xff) | ||
309 | |||
310 | /** | ||
311 | * Register: HW_USBPHY_DEBUG4_STATUS | ||
312 | * Address: 0xa0 | ||
313 | * SCT: no | ||
314 | */ | ||
315 | #define HW_USBPHY_DEBUG4_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0xa0)) | ||
316 | #define BP_USBPHY_DEBUG4_STATUS_BYTE_FSM 16 | ||
317 | #define BM_USBPHY_DEBUG4_STATUS_BYTE_FSM 0x1fff0000 | ||
318 | #define BF_USBPHY_DEBUG4_STATUS_BYTE_FSM(v) (((v) << 16) & 0x1fff0000) | ||
319 | #define BP_USBPHY_DEBUG4_STATUS_SND_FSM 0 | ||
320 | #define BM_USBPHY_DEBUG4_STATUS_SND_FSM 0x3fff | ||
321 | #define BF_USBPHY_DEBUG4_STATUS_SND_FSM(v) (((v) << 0) & 0x3fff) | ||
322 | |||
323 | /** | ||
324 | * Register: HW_USBPHY_DEBUG5_STATUS | ||
325 | * Address: 0xb0 | ||
326 | * SCT: no | ||
327 | */ | ||
328 | #define HW_USBPHY_DEBUG5_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0xb0)) | ||
329 | #define BP_USBPHY_DEBUG5_STATUS_MAIN_FSM 24 | ||
330 | #define BM_USBPHY_DEBUG5_STATUS_MAIN_FSM 0xf000000 | ||
331 | #define BF_USBPHY_DEBUG5_STATUS_MAIN_FSM(v) (((v) << 24) & 0xf000000) | ||
332 | #define BP_USBPHY_DEBUG5_STATUS_SYNC_FSM 16 | ||
333 | #define BM_USBPHY_DEBUG5_STATUS_SYNC_FSM 0x3f0000 | ||
334 | #define BF_USBPHY_DEBUG5_STATUS_SYNC_FSM(v) (((v) << 16) & 0x3f0000) | ||
335 | #define BP_USBPHY_DEBUG5_STATUS_PRECHARGE_FSM 12 | ||
336 | #define BM_USBPHY_DEBUG5_STATUS_PRECHARGE_FSM 0x7000 | ||
337 | #define BF_USBPHY_DEBUG5_STATUS_PRECHARGE_FSM(v) (((v) << 12) & 0x7000) | ||
338 | #define BP_USBPHY_DEBUG5_STATUS_SHIFT_FSM 8 | ||
339 | #define BM_USBPHY_DEBUG5_STATUS_SHIFT_FSM 0x700 | ||
340 | #define BF_USBPHY_DEBUG5_STATUS_SHIFT_FSM(v) (((v) << 8) & 0x700) | ||
341 | #define BP_USBPHY_DEBUG5_STATUS_SOF_FSM 0 | ||
342 | #define BM_USBPHY_DEBUG5_STATUS_SOF_FSM 0x1f | ||
343 | #define BF_USBPHY_DEBUG5_STATUS_SOF_FSM(v) (((v) << 0) & 0x1f) | ||
344 | |||
345 | /** | ||
346 | * Register: HW_USBPHY_DEBUG6_STATUS | ||
347 | * Address: 0xc0 | ||
348 | * SCT: no | ||
349 | */ | ||
350 | #define HW_USBPHY_DEBUG6_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0xc0)) | ||
351 | #define BP_USBPHY_DEBUG6_STATUS_FIRST_EOP_FSM 8 | ||
352 | #define BM_USBPHY_DEBUG6_STATUS_FIRST_EOP_FSM 0x700 | ||
353 | #define BF_USBPHY_DEBUG6_STATUS_FIRST_EOP_FSM(v) (((v) << 8) & 0x700) | ||
354 | #define BP_USBPHY_DEBUG6_STATUS_EOP_FSM 0 | ||
355 | #define BM_USBPHY_DEBUG6_STATUS_EOP_FSM 0xff | ||
356 | #define BF_USBPHY_DEBUG6_STATUS_EOP_FSM(v) (((v) << 0) & 0xff) | ||
357 | |||
358 | /** | ||
359 | * Register: HW_USBPHY_DEBUG7_STATUS | ||
360 | * Address: 0xd0 | ||
361 | * SCT: no | ||
362 | */ | ||
363 | #define HW_USBPHY_DEBUG7_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0xd0)) | ||
364 | #define BP_USBPHY_DEBUG7_STATUS_FIRST_DATA_FSM 28 | ||
365 | #define BM_USBPHY_DEBUG7_STATUS_FIRST_DATA_FSM 0x30000000 | ||
366 | #define BF_USBPHY_DEBUG7_STATUS_FIRST_DATA_FSM(v) (((v) << 28) & 0x30000000) | ||
367 | #define BP_USBPHY_DEBUG7_STATUS_BIT_CNT 24 | ||
368 | #define BM_USBPHY_DEBUG7_STATUS_BIT_CNT 0xf000000 | ||
369 | #define BF_USBPHY_DEBUG7_STATUS_BIT_CNT(v) (((v) << 24) & 0xf000000) | ||
370 | #define BP_USBPHY_DEBUG7_STATUS_UNSTUFF_CNT 20 | ||
371 | #define BM_USBPHY_DEBUG7_STATUS_UNSTUFF_CNT 0x700000 | ||
372 | #define BF_USBPHY_DEBUG7_STATUS_UNSTUFF_CNT(v) (((v) << 20) & 0x700000) | ||
373 | #define BP_USBPHY_DEBUG7_STATUS_LD_FSM 16 | ||
374 | #define BM_USBPHY_DEBUG7_STATUS_LD_FSM 0x30000 | ||
375 | #define BF_USBPHY_DEBUG7_STATUS_LD_FSM(v) (((v) << 16) & 0x30000) | ||
376 | #define BP_USBPHY_DEBUG7_STATUS_FIFO_FSM 8 | ||
377 | #define BM_USBPHY_DEBUG7_STATUS_FIFO_FSM 0x3f00 | ||
378 | #define BF_USBPHY_DEBUG7_STATUS_FIFO_FSM(v) (((v) << 8) & 0x3f00) | ||
379 | #define BP_USBPHY_DEBUG7_STATUS_MAIN_FSM 4 | ||
380 | #define BM_USBPHY_DEBUG7_STATUS_MAIN_FSM 0xf0 | ||
381 | #define BF_USBPHY_DEBUG7_STATUS_MAIN_FSM(v) (((v) << 4) & 0xf0) | ||
382 | #define BP_USBPHY_DEBUG7_STATUS_EOP_FSM 0 | ||
383 | #define BM_USBPHY_DEBUG7_STATUS_EOP_FSM 0xf | ||
384 | #define BF_USBPHY_DEBUG7_STATUS_EOP_FSM(v) (((v) << 0) & 0xf) | ||
385 | |||
386 | /** | ||
387 | * Register: HW_USBPHY_DEBUG8_STATUS | ||
388 | * Address: 0xe0 | ||
389 | * SCT: no | ||
390 | */ | ||
391 | #define HW_USBPHY_DEBUG8_STATUS (*(volatile unsigned long *)(REGS_USBPHY_BASE + 0xe0)) | ||
392 | #define BP_USBPHY_DEBUG8_STATUS_RX_SIE_FSM 28 | ||
393 | #define BM_USBPHY_DEBUG8_STATUS_RX_SIE_FSM 0xf0000000 | ||
394 | #define BF_USBPHY_DEBUG8_STATUS_RX_SIE_FSM(v) (((v) << 28) & 0xf0000000) | ||
395 | #define BP_USBPHY_DEBUG8_STATUS_TX_SIE_FSM 24 | ||
396 | #define BM_USBPHY_DEBUG8_STATUS_TX_SIE_FSM 0xf000000 | ||
397 | #define BF_USBPHY_DEBUG8_STATUS_TX_SIE_FSM(v) (((v) << 24) & 0xf000000) | ||
398 | #define BP_USBPHY_DEBUG8_STATUS_SHIFT_FSM 8 | ||
399 | #define BM_USBPHY_DEBUG8_STATUS_SHIFT_FSM 0x300 | ||
400 | #define BF_USBPHY_DEBUG8_STATUS_SHIFT_FSM(v) (((v) << 8) & 0x300) | ||
401 | #define BP_USBPHY_DEBUG8_STATUS_FS_TX_MAIN_FSM 0 | ||
402 | #define BM_USBPHY_DEBUG8_STATUS_FS_TX_MAIN_FSM 0x7f | ||
403 | #define BF_USBPHY_DEBUG8_STATUS_FS_TX_MAIN_FSM(v) (((v) << 0) & 0x7f) | ||
404 | |||
405 | #endif /* __HEADERGEN__STMP3600__USBPHY__H__ */ | ||