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authorJens Arnold <amiconn@rockbox.org>2007-07-03 00:42:42 +0000
committerJens Arnold <amiconn@rockbox.org>2007-07-03 00:42:42 +0000
commit7b861eca95b54f4132e2ed6a8f9c0edbf0a65ab8 (patch)
tree244f49047baface22ef7a39dea7501f9a8271d42 /firmware/export/pp5020.h
parentede373108adbd3bfb54f93c3c9841179fd581f21 (diff)
downloadrockbox-7b861eca95b54f4132e2ed6a8f9c0edbf0a65ab8.tar.gz
rockbox-7b861eca95b54f4132e2ed6a8f9c0edbf0a65ab8.zip
More PP502x clock setup rework. This should fix the freezes on PP5020 once and for all. Enabled clock scaling for H10. * CPUFREQ_MAX changed to 78MHz * To be cleaned up soon.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13767 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/pp5020.h')
-rw-r--r--firmware/export/pp5020.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 7475cc7b61..f35b4c4d27 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -131,6 +131,11 @@
131#define DEV_IDE0 0x2000000 131#define DEV_IDE0 0x2000000
132#define DEV_LCD 0x4000000 132#define DEV_LCD 0x4000000
133 133
134/* clock control */
135#define CLOCK_SOURCE (*(volatile unsigned long *)(0x60006020))
136#define PLL_CONTROL (*(volatile unsigned long *)(0x60006034))
137#define PLL_STATUS (*(volatile unsigned long *)(0x6000603c))
138
134/* Processors Control */ 139/* Processors Control */
135#define CPU_CTL (*(volatile unsigned long *)(0x60007000)) 140#define CPU_CTL (*(volatile unsigned long *)(0x60007000))
136#define COP_CTL (*(volatile unsigned long *)(0x60007004)) 141#define COP_CTL (*(volatile unsigned long *)(0x60007004))