diff options
-rw-r--r-- | apps/debug_menu.c | 7 | ||||
-rw-r--r-- | firmware/export/config-h10.h | 2 | ||||
-rw-r--r-- | firmware/export/config-h10_5gb.h | 2 | ||||
-rw-r--r-- | firmware/export/pp5020.h | 5 | ||||
-rw-r--r-- | firmware/target/arm/system-arm.h | 8 | ||||
-rw-r--r-- | firmware/target/arm/system-pp502x.c | 25 |
6 files changed, 34 insertions, 15 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c index 086ca9e3a7..eec0dc3c61 100644 --- a/apps/debug_menu.c +++ b/apps/debug_menu.c | |||
@@ -1082,7 +1082,6 @@ bool dbg_ports(void) | |||
1082 | lcd_puts(0, line++, buf); | 1082 | lcd_puts(0, line++, buf); |
1083 | snprintf(buf, sizeof(buf), "GPIO_C: %02x GPIO_I: %02x", gpio_c, gpio_i); | 1083 | snprintf(buf, sizeof(buf), "GPIO_C: %02x GPIO_I: %02x", gpio_c, gpio_i); |
1084 | lcd_puts(0, line++, buf); | 1084 | lcd_puts(0, line++, buf); |
1085 | line++; | ||
1086 | 1085 | ||
1087 | gpio_d = GPIOD_INPUT_VAL; | 1086 | gpio_d = GPIOD_INPUT_VAL; |
1088 | gpio_e = GPIOE_INPUT_VAL; | 1087 | gpio_e = GPIOE_INPUT_VAL; |
@@ -1102,11 +1101,15 @@ bool dbg_ports(void) | |||
1102 | 1101 | ||
1103 | snprintf(buf, sizeof(buf), "CLOCK_SRC: %08lx", inl(0x60006020)); | 1102 | snprintf(buf, sizeof(buf), "CLOCK_SRC: %08lx", inl(0x60006020)); |
1104 | lcd_puts(0, line++, buf); | 1103 | lcd_puts(0, line++, buf); |
1104 | snprintf(buf, sizeof(buf), "CLOCK_0x2C: %08lx", inl(0x6000602c)); | ||
1105 | lcd_puts(0, line++, buf); | ||
1106 | snprintf(buf, sizeof(buf), "CLOCK_0xA0: %08lx", inl(0x600060a0)); | ||
1107 | lcd_puts(0, line++, buf); | ||
1105 | snprintf(buf, sizeof(buf), "PLL_CONTROL: %08lx", inl(0x60006034)); | 1108 | snprintf(buf, sizeof(buf), "PLL_CONTROL: %08lx", inl(0x60006034)); |
1106 | lcd_puts(0, line++, buf); | 1109 | lcd_puts(0, line++, buf); |
1107 | snprintf(buf, sizeof(buf), "PLL_STATUS: %08lx", inl(0x6000603c)); | 1110 | snprintf(buf, sizeof(buf), "PLL_STATUS: %08lx", inl(0x6000603c)); |
1108 | lcd_puts(0, line++, buf); | 1111 | lcd_puts(0, line++, buf); |
1109 | snprintf(buf, sizeof(buf), "DEV_PLL: %08lx", inl(0x70000020)); | 1112 | snprintf(buf, sizeof(buf), "DEV_0x34: %08lx", inl(0x70000034)); |
1110 | lcd_puts(0, line++, buf); | 1113 | lcd_puts(0, line++, buf); |
1111 | 1114 | ||
1112 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) | 1115 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) |
diff --git a/firmware/export/config-h10.h b/firmware/export/config-h10.h index b0617eb71e..7a97f4c9bd 100644 --- a/firmware/export/config-h10.h +++ b/firmware/export/config-h10.h | |||
@@ -156,7 +156,7 @@ | |||
156 | #define CONFIG_LED LED_VIRTUAL | 156 | #define CONFIG_LED LED_VIRTUAL |
157 | 157 | ||
158 | /* Define this if you have adjustable CPU frequency */ | 158 | /* Define this if you have adjustable CPU frequency */ |
159 | /*#define HAVE_ADJUSTABLE_CPU_FREQ*/ | 159 | #define HAVE_ADJUSTABLE_CPU_FREQ |
160 | 160 | ||
161 | #define MI4_FORMAT | 161 | #define MI4_FORMAT |
162 | #define BOOTFILE_EXT "mi4" | 162 | #define BOOTFILE_EXT "mi4" |
diff --git a/firmware/export/config-h10_5gb.h b/firmware/export/config-h10_5gb.h index 37a1a47c7f..add682cbe3 100644 --- a/firmware/export/config-h10_5gb.h +++ b/firmware/export/config-h10_5gb.h | |||
@@ -139,7 +139,7 @@ | |||
139 | #define CONFIG_LED LED_VIRTUAL | 139 | #define CONFIG_LED LED_VIRTUAL |
140 | 140 | ||
141 | /* Define this if you have adjustable CPU frequency */ | 141 | /* Define this if you have adjustable CPU frequency */ |
142 | /*#define HAVE_ADJUSTABLE_CPU_FREQ*/ | 142 | #define HAVE_ADJUSTABLE_CPU_FREQ |
143 | 143 | ||
144 | #define MI4_FORMAT | 144 | #define MI4_FORMAT |
145 | #define BOOTFILE_EXT "mi4" | 145 | #define BOOTFILE_EXT "mi4" |
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 7475cc7b61..f35b4c4d27 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h | |||
@@ -131,6 +131,11 @@ | |||
131 | #define DEV_IDE0 0x2000000 | 131 | #define DEV_IDE0 0x2000000 |
132 | #define DEV_LCD 0x4000000 | 132 | #define DEV_LCD 0x4000000 |
133 | 133 | ||
134 | /* clock control */ | ||
135 | #define CLOCK_SOURCE (*(volatile unsigned long *)(0x60006020)) | ||
136 | #define PLL_CONTROL (*(volatile unsigned long *)(0x60006034)) | ||
137 | #define PLL_STATUS (*(volatile unsigned long *)(0x6000603c)) | ||
138 | |||
134 | /* Processors Control */ | 139 | /* Processors Control */ |
135 | #define CPU_CTL (*(volatile unsigned long *)(0x60007000)) | 140 | #define CPU_CTL (*(volatile unsigned long *)(0x60007000)) |
136 | #define COP_CTL (*(volatile unsigned long *)(0x60007004)) | 141 | #define COP_CTL (*(volatile unsigned long *)(0x60007004)) |
diff --git a/firmware/target/arm/system-arm.h b/firmware/target/arm/system-arm.h index 26b8ac3513..99cab9e1a3 100644 --- a/firmware/target/arm/system-arm.h +++ b/firmware/target/arm/system-arm.h | |||
@@ -31,12 +31,12 @@ | |||
31 | #if CONFIG_CPU != S3C2440 && CONFIG_CPU != PNX0101 | 31 | #if CONFIG_CPU != S3C2440 && CONFIG_CPU != PNX0101 |
32 | 32 | ||
33 | /* TODO: Finish targeting this stuff */ | 33 | /* TODO: Finish targeting this stuff */ |
34 | #define CPUFREQ_DEFAULT_MULT 8 | 34 | #define CPUFREQ_DEFAULT_MULT 4 |
35 | #define CPUFREQ_DEFAULT 24000000 | 35 | #define CPUFREQ_DEFAULT 24000000 |
36 | #define CPUFREQ_NORMAL_MULT 10 | 36 | #define CPUFREQ_NORMAL_MULT 5 |
37 | #define CPUFREQ_NORMAL 30000000 | 37 | #define CPUFREQ_NORMAL 30000000 |
38 | #define CPUFREQ_MAX_MULT 25 | 38 | #define CPUFREQ_MAX_MULT 13 |
39 | #define CPUFREQ_MAX 75000000 | 39 | #define CPUFREQ_MAX 78000000 |
40 | 40 | ||
41 | #endif | 41 | #endif |
42 | 42 | ||
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c index 658ea0eeb3..4542913d53 100644 --- a/firmware/target/arm/system-pp502x.c +++ b/firmware/target/arm/system-pp502x.c | |||
@@ -152,6 +152,7 @@ static void ipod_init_cache(void) | |||
152 | void set_cpu_frequency(long frequency) | 152 | void set_cpu_frequency(long frequency) |
153 | { | 153 | { |
154 | unsigned long postmult, pll_control; | 154 | unsigned long postmult, pll_control; |
155 | unsigned long unknown1, unknown2; | ||
155 | 156 | ||
156 | # if NUM_CORES > 1 | 157 | # if NUM_CORES > 1 |
157 | /* Using mutex or spinlock isn't safe here. */ | 158 | /* Using mutex or spinlock isn't safe here. */ |
@@ -166,17 +167,25 @@ void set_cpu_frequency(long frequency) | |||
166 | postmult = CPUFREQ_DEFAULT_MULT; | 167 | postmult = CPUFREQ_DEFAULT_MULT; |
167 | cpu_frequency = frequency; | 168 | cpu_frequency = frequency; |
168 | 169 | ||
169 | /* Enable PLL? */ | 170 | unknown2 = inl(0x600060a0); |
170 | outl(inl(0x70000020) | (1<<30), 0x70000020); | ||
171 | 171 | ||
172 | /* Select 24MHz crystal as clock source? */ | 172 | outl(inl(0x70000020) | (1<<30), 0x70000020); /* Enable PLL power */ |
173 | |||
174 | /* Set clock source #1 to 24MHz and select it */ | ||
173 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); | 175 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); |
176 | |||
177 | outl(unknown2 & 0x3fffffff, 0x600060a0); | ||
178 | |||
179 | unknown1 = (138 * postmult + 255) >> 8; | ||
180 | if (unknown1 > 15) | ||
181 | unknown1 = 15; | ||
182 | outl((unknown1 << 8) | unknown1, 0x70000034); | ||
174 | 183 | ||
175 | /* Clock frequency = (24/8)*postmult */ | 184 | /* PLL frequency = (24/4)*postmult */ |
176 | pll_control = 0x8a020000 | 8 | (postmult << 8); | 185 | pll_control = 0x8a020000 | 4 | (postmult << 8); |
177 | outl(pll_control, 0x60006034); | 186 | outl(pll_control, 0x60006034); |
178 | # if CONFIG_CPU == PP5020 | 187 | # if CONFIG_CPU == PP5020 |
179 | outl(0xd198, 0x6000603c); /* magic sequence */ | 188 | outl(0xd19b, 0x6000603c); /* magic sequence */ |
180 | outl(pll_control, 0x60006034); | 189 | outl(pll_control, 0x60006034); |
181 | udelay(500); /* wait for relock */ | 190 | udelay(500); /* wait for relock */ |
182 | # else /* PP5022, PP5024 */ | 191 | # else /* PP5022, PP5024 */ |
@@ -186,6 +195,8 @@ void set_cpu_frequency(long frequency) | |||
186 | /* Select PLL as clock source? */ | 195 | /* Select PLL as clock source? */ |
187 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); | 196 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); |
188 | 197 | ||
198 | outl(unknown2, 0x600060a0); | ||
199 | |||
189 | # if NUM_CORES > 1 | 200 | # if NUM_CORES > 1 |
190 | boostctrl_mtx.locked = 0; | 201 | boostctrl_mtx.locked = 0; |
191 | # endif | 202 | # endif |
@@ -199,7 +210,7 @@ void ipod_set_cpu_frequency(void) | |||
199 | outl(inl(0x70000020) | (1<<30), 0x70000020); | 210 | outl(inl(0x70000020) | (1<<30), 0x70000020); |
200 | 211 | ||
201 | /* Select 24MHz crystal as clock source? */ | 212 | /* Select 24MHz crystal as clock source? */ |
202 | outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); | 213 | outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); |
203 | 214 | ||
204 | /* Clock frequency = (24/8)*25 = 75MHz */ | 215 | /* Clock frequency = (24/8)*25 = 75MHz */ |
205 | outl(0x8a020000 | 8 | (25 << 8), 0x60006034); | 216 | outl(0x8a020000 | 8 | (25 << 8), 0x60006034); |