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author | Solomon Peachy <pizza@shaftnet.org> | 2020-07-15 19:40:55 -0400 |
---|---|---|
committer | Solomon Peachy <pizza@shaftnet.org> | 2020-07-24 21:20:13 +0000 |
commit | 092c340a2062fa98b7387fc5fd63578ddae7d0b6 (patch) | |
tree | 98ec96946eeb2ae709cb0528cc6998e21bb9b290 /firmware/export/config.h | |
parent | 17f7cc92c258bc456a27c3e7c5a19c9409851879 (diff) | |
download | rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.tar.gz rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.zip |
[1/4] Remove SH support and all archos targets
This removes all code specific to SH targets
Change-Id: I7980523785d2596e65c06430f4638eec74a06061
Diffstat (limited to 'firmware/export/config.h')
-rw-r--r-- | firmware/export/config.h | 48 |
1 files changed, 6 insertions, 42 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index 4f9cd02097..6ce9bede41 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -44,7 +44,6 @@ | |||
44 | #define STORAGE_HOSTFS (1 << STORAGE_HOSTFS_NUM) | 44 | #define STORAGE_HOSTFS (1 << STORAGE_HOSTFS_NUM) |
45 | 45 | ||
46 | /* CONFIG_TUNER (note these are combineable bit-flags) */ | 46 | /* CONFIG_TUNER (note these are combineable bit-flags) */ |
47 | #define S1A0903X01 0x01 /* Samsung */ | ||
48 | #define TEA5767 0x02 /* Philips */ | 47 | #define TEA5767 0x02 /* Philips */ |
49 | #define LV24020LP 0x04 /* Sanyo */ | 48 | #define LV24020LP 0x04 /* Sanyo */ |
50 | #define SI4700 0x08 /* Silicon Labs */ | 49 | #define SI4700 0x08 /* Silicon Labs */ |
@@ -55,13 +54,9 @@ | |||
55 | #define STFM1000 0x100 /* Sigmatel */ | 54 | #define STFM1000 0x100 /* Sigmatel */ |
56 | 55 | ||
57 | /* CONFIG_CODEC */ | 56 | /* CONFIG_CODEC */ |
58 | #define MAS3587F 3587 | ||
59 | #define MAS3507D 3507 | ||
60 | #define MAS3539F 3539 | ||
61 | #define SWCODEC 1 /* if codec is done by SW */ | 57 | #define SWCODEC 1 /* if codec is done by SW */ |
62 | 58 | ||
63 | /* CONFIG_CPU */ | 59 | /* CONFIG_CPU */ |
64 | #define SH7034 7034 | ||
65 | #define MCF5249 5249 | 60 | #define MCF5249 5249 |
66 | #define MCF5250 5250 | 61 | #define MCF5250 5250 |
67 | #define PP5002 5002 | 62 | #define PP5002 5002 |
@@ -103,9 +98,6 @@ | |||
103 | #define PLATFORM_PANDORA (1<<6) | 98 | #define PLATFORM_PANDORA (1<<6) |
104 | 99 | ||
105 | /* CONFIG_KEYPAD */ | 100 | /* CONFIG_KEYPAD */ |
106 | #define PLAYER_PAD 1 | ||
107 | #define RECORDER_PAD 2 | ||
108 | #define ONDIO_PAD 3 | ||
109 | #define IRIVER_H100_PAD 4 | 101 | #define IRIVER_H100_PAD 4 |
110 | #define IRIVER_H300_PAD 5 | 102 | #define IRIVER_H300_PAD 5 |
111 | #define IAUDIO_X5M5_PAD 6 | 103 | #define IAUDIO_X5M5_PAD 6 |
@@ -222,8 +214,7 @@ | |||
222 | if the estimation is better that ours | 214 | if the estimation is better that ours |
223 | (which it probably is) */ | 215 | (which it probably is) */ |
224 | /* CONFIG_LCD */ | 216 | /* CONFIG_LCD */ |
225 | #define LCD_SSD1815 1 /* as used by Archos Recorders and Ondios */ | 217 | #define LCD_SSD1815 1 /* as used by Sansa M200 and others */ |
226 | #define LCD_SSD1801 2 /* as used by Archos Player/Studio */ | ||
227 | #define LCD_S1D15E06 3 /* as used by iRiver H100 series */ | 218 | #define LCD_S1D15E06 3 /* as used by iRiver H100 series */ |
228 | #define LCD_H300 4 /* as used by iRiver H300 series, exact model name is | 219 | #define LCD_H300 4 /* as used by iRiver H300 series, exact model name is |
229 | unknown at the time of this writing */ | 220 | unknown at the time of this writing */ |
@@ -312,8 +303,6 @@ | |||
312 | /* CONFIG_I2C */ | 303 | /* CONFIG_I2C */ |
313 | #define I2C_NONE 0 /* For targets that do not use I2C - as the | 304 | #define I2C_NONE 0 /* For targets that do not use I2C - as the |
314 | Lyre prototype 1 */ | 305 | Lyre prototype 1 */ |
315 | #define I2C_PLAYREC 1 /* Archos Player/Recorder style */ | ||
316 | #define I2C_ONDIO 2 /* Ondio style */ | ||
317 | #define I2C_COLDFIRE 3 /* Coldfire style */ | 306 | #define I2C_COLDFIRE 3 /* Coldfire style */ |
318 | #define I2C_PP5002 4 /* PP5002 style */ | 307 | #define I2C_PP5002 4 /* PP5002 style */ |
319 | #define I2C_PP5020 5 /* PP5020 style */ | 308 | #define I2C_PP5020 5 /* PP5020 style */ |
@@ -345,7 +334,6 @@ Lyre prototype 1 */ | |||
345 | #define NAND_IMX233 6 | 334 | #define NAND_IMX233 6 |
346 | 335 | ||
347 | /* CONFIG_RTC */ | 336 | /* CONFIG_RTC */ |
348 | #define RTC_M41ST84W 1 /* Archos Recorder */ | ||
349 | #define RTC_PCF50605 2 /* iPod 3G, 4G & Mini */ | 337 | #define RTC_PCF50605 2 /* iPod 3G, 4G & Mini */ |
350 | #define RTC_PCF50606 3 /* iriver H300 */ | 338 | #define RTC_PCF50606 3 /* iriver H300 */ |
351 | #define RTC_S3C2440 4 | 339 | #define RTC_S3C2440 4 |
@@ -398,19 +386,7 @@ Lyre prototype 1 */ | |||
398 | #define IMX233_CREATIVE (1 << 1) /* Creative MBLK windowing */ | 386 | #define IMX233_CREATIVE (1 << 1) /* Creative MBLK windowing */ |
399 | 387 | ||
400 | /* now go and pick yours */ | 388 | /* now go and pick yours */ |
401 | #if defined(ARCHOS_PLAYER) | 389 | #if defined(IRIVER_H100) |
402 | #include "config/archosplayer.h" | ||
403 | #elif defined(ARCHOS_RECORDER) | ||
404 | #include "config/archosrecorder.h" | ||
405 | #elif defined(ARCHOS_FMRECORDER) | ||
406 | #include "config/archosfmrecorder.h" | ||
407 | #elif defined(ARCHOS_RECORDERV2) | ||
408 | #include "config/archosrecorderv2.h" | ||
409 | #elif defined(ARCHOS_ONDIOSP) | ||
410 | #include "config/archosondiosp.h" | ||
411 | #elif defined(ARCHOS_ONDIOFM) | ||
412 | #include "config/archosondiofm.h" | ||
413 | #elif defined(IRIVER_H100) | ||
414 | #include "config/iriverh100.h" | 390 | #include "config/iriverh100.h" |
415 | #elif defined(IRIVER_H120) | 391 | #elif defined(IRIVER_H120) |
416 | #include "config/iriverh120.h" | 392 | #include "config/iriverh120.h" |
@@ -659,11 +635,6 @@ Lyre prototype 1 */ | |||
659 | 635 | ||
660 | #ifndef __PCTOOL__ | 636 | #ifndef __PCTOOL__ |
661 | 637 | ||
662 | /* define for all cpus from SH family */ | ||
663 | #if (ARCH == ARCH_SH) && (CONFIG_CPU == SH7034) | ||
664 | #define CPU_SH | ||
665 | #endif | ||
666 | |||
667 | /* define for all cpus from coldfire family */ | 638 | /* define for all cpus from coldfire family */ |
668 | #if (ARCH == ARCH_M68K) && ((CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)) | 639 | #if (ARCH == ARCH_M68K) && ((CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)) |
669 | #define CPU_COLDFIRE | 640 | #define CPU_COLDFIRE |
@@ -932,11 +903,6 @@ Lyre prototype 1 */ | |||
932 | #define HAVE_PICTUREFLOW_INTEGRATION | 903 | #define HAVE_PICTUREFLOW_INTEGRATION |
933 | #endif | 904 | #endif |
934 | 905 | ||
935 | /* Add one HAVE_ define for all mas35xx targets */ | ||
936 | #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3507D) || (CONFIG_CODEC == MAS3539F) | ||
937 | #define HAVE_MAS35XX | ||
938 | #endif | ||
939 | |||
940 | #if (CONFIG_CODEC == SWCODEC) | 906 | #if (CONFIG_CODEC == SWCODEC) |
941 | #ifdef BOOTLOADER | 907 | #ifdef BOOTLOADER |
942 | 908 | ||
@@ -1012,7 +978,7 @@ Lyre prototype 1 */ | |||
1012 | #endif /* (CONFIG_CODEC == SWCODEC) */ | 978 | #endif /* (CONFIG_CODEC == SWCODEC) */ |
1013 | 979 | ||
1014 | /* Determine if accesses should be strictly long aligned. */ | 980 | /* Determine if accesses should be strictly long aligned. */ |
1015 | #if (CONFIG_CPU == SH7034) || defined(CPU_ARM) || defined(CPU_MIPS) | 981 | #if defined(CPU_ARM) || defined(CPU_MIPS) |
1016 | #define ROCKBOX_STRICT_ALIGN 1 | 982 | #define ROCKBOX_STRICT_ALIGN 1 |
1017 | #endif | 983 | #endif |
1018 | 984 | ||
@@ -1061,8 +1027,7 @@ Lyre prototype 1 */ | |||
1061 | 1027 | ||
1062 | /* IRAM usage */ | 1028 | /* IRAM usage */ |
1063 | #if (CONFIG_PLATFORM & PLATFORM_NATIVE) && /* Not for hosted environments */ \ | 1029 | #if (CONFIG_PLATFORM & PLATFORM_NATIVE) && /* Not for hosted environments */ \ |
1064 | (((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \ | 1030 | (defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ |
1065 | defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ | ||
1066 | defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ | 1031 | defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ |
1067 | (CONFIG_CPU == AS3525 && MEMORYSIZE > 2 && !defined(BOOTLOADER)) || /* AS3525 +2MB: core, plugins, codecs */ \ | 1032 | (CONFIG_CPU == AS3525 && MEMORYSIZE > 2 && !defined(BOOTLOADER)) || /* AS3525 +2MB: core, plugins, codecs */ \ |
1068 | (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525 2MB: core only */ \ | 1033 | (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525 2MB: core only */ \ |
@@ -1077,7 +1042,7 @@ Lyre prototype 1 */ | |||
1077 | #define IDATA_ATTR __attribute__ ((section(".idata"))) | 1042 | #define IDATA_ATTR __attribute__ ((section(".idata"))) |
1078 | #define IBSS_ATTR __attribute__ ((section(".ibss"))) | 1043 | #define IBSS_ATTR __attribute__ ((section(".ibss"))) |
1079 | #define USE_IRAM | 1044 | #define USE_IRAM |
1080 | #if CONFIG_CPU != SH7034 && (CONFIG_CPU != AS3525 || MEMORYSIZE > 2) \ | 1045 | #if (CONFIG_CPU != AS3525 || MEMORYSIZE > 2) \ |
1081 | && CONFIG_CPU != JZ4732 && CONFIG_CPU != JZ4760B && CONFIG_CPU != AS3525v2 && CONFIG_CPU != IMX233 | 1046 | && CONFIG_CPU != JZ4732 && CONFIG_CPU != JZ4760B && CONFIG_CPU != AS3525v2 && CONFIG_CPU != IMX233 |
1082 | #define PLUGIN_USE_IRAM | 1047 | #define PLUGIN_USE_IRAM |
1083 | #endif | 1048 | #endif |
@@ -1283,8 +1248,7 @@ Lyre prototype 1 */ | |||
1283 | #define HAVE_PCM_FULL_DUPLEX | 1248 | #define HAVE_PCM_FULL_DUPLEX |
1284 | #endif | 1249 | #endif |
1285 | 1250 | ||
1286 | #if (CONFIG_CODEC == SWCODEC) || (CONFIG_CODEC == MAS3587F) || \ | 1251 | #if (CONFIG_CODEC == SWCODEC) |
1287 | (CONFIG_CODEC == MAS3539F) | ||
1288 | #define HAVE_PITCHCONTROL | 1252 | #define HAVE_PITCHCONTROL |
1289 | #endif | 1253 | #endif |
1290 | 1254 | ||