diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/imx233/debug-imx233.c | 46 | ||||
-rw-r--r-- | firmware/target/arm/imx233/power-imx233.c | 149 | ||||
-rw-r--r-- | firmware/target/arm/imx233/power-imx233.h | 45 |
3 files changed, 184 insertions, 56 deletions
diff --git a/firmware/target/arm/imx233/debug-imx233.c b/firmware/target/arm/imx233/debug-imx233.c index 8553fd8509..fdad03ea78 100644 --- a/firmware/target/arm/imx233/debug-imx233.c +++ b/firmware/target/arm/imx233/debug-imx233.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include "pinctrl-imx233.h" | 34 | #include "pinctrl-imx233.h" |
35 | #include "ocotp-imx233.h" | 35 | #include "ocotp-imx233.h" |
36 | #include "string.h" | 36 | #include "string.h" |
37 | #include "stdio.h" | ||
37 | 38 | ||
38 | #define DEBUG_CANCEL BUTTON_BACK | 39 | #define DEBUG_CANCEL BUTTON_BACK |
39 | 40 | ||
@@ -150,21 +151,33 @@ bool dbg_hw_info_power(void) | |||
150 | lcd_clear_display(); | 151 | lcd_clear_display(); |
151 | 152 | ||
152 | struct imx233_power_info_t info = imx233_power_get_info(POWER_INFO_ALL); | 153 | struct imx233_power_info_t info = imx233_power_get_info(POWER_INFO_ALL); |
153 | lcd_putsf(0, 0, "VDDD: %d mV linreg: %d offset: %d", info.vddd, info.vddd_linreg, | 154 | int line = 0; |
154 | info.vddd_linreg_offset); | 155 | unsigned trg, bo; |
155 | lcd_putsf(0, 1, "VDDA: %d mV linreg: %d offset: %d", info.vdda, info.vdda_linreg, | 156 | bool en; |
156 | info.vdda_linreg_offset); | 157 | int linreg; |
157 | lcd_putsf(0, 2, "VDDIO: %d mV offset: %d", info.vddio, info.vddio_linreg_offset); | 158 | char buf[16]; |
158 | lcd_putsf(0, 3, "VDDMEM: %d mV linreg: %d", info.vddmem, info.vddmem_linreg); | 159 | |
159 | lcd_putsf(0, 4, "DC-DC: pll: %d freq: %d", info.dcdc_sel_pllclk, info.dcdc_freqsel); | 160 | lcd_putsf(0, line++, "name value bo linreg"); |
160 | lcd_putsf(0, 5, "charge: %d mA stop: %d mA", info.charge_current, info.stop_current); | 161 | #define DISP_REGULATOR(name) \ |
161 | lcd_putsf(0, 6, "charging: %d bat_adj: %d", info.charging, info.batt_adj); | 162 | imx233_power_get_regulator(REGULATOR_##name, &trg, &bo); \ |
162 | lcd_putsf(0, 7, "4.2: en: %d dcdc: %d", info._4p2_enable, info._4p2_dcdc); | 163 | imx233_power_get_regulator_linreg(REGULATOR_##name, &en, &linreg); \ |
163 | lcd_putsf(0, 8, "4.2: cmptrip: %d dropout: %d", info._4p2_cmptrip, info._4p2_dropout); | 164 | if(en) snprintf(buf, sizeof(buf), "%d", linreg); \ |
164 | lcd_putsf(0, 9, "5V: pwd_4.2_charge: %d", info._5v_pwd_charge_4p2); | 165 | else snprintf(buf, sizeof(buf), " "); \ |
165 | lcd_putsf(0, 10, "5V: chargelim: %d mA", info._5v_charge_4p2_limit); | 166 | lcd_putsf(0, line++, "%6s %4d %4d %s", #name, trg, bo, buf); \ |
166 | lcd_putsf(0, 11, "5V: dcdc: %d xfer: %d", info._5v_enable_dcdc, info._5v_dcdc_xfer); | 167 | |
167 | lcd_putsf(0, 12, "5V: thr: %d mV use: %d cmps: %d", info._5v_vbusvalid_thr, | 168 | DISP_REGULATOR(VDDD); |
169 | DISP_REGULATOR(VDDA); | ||
170 | DISP_REGULATOR(VDDIO); | ||
171 | DISP_REGULATOR(VDDMEM); | ||
172 | lcd_putsf(0, line++, "DC-DC: pll: %d freq: %d", info.dcdc_sel_pllclk, info.dcdc_freqsel); | ||
173 | lcd_putsf(0, line++, "charge: %d mA stop: %d mA", info.charge_current, info.stop_current); | ||
174 | lcd_putsf(0, line++, "charging: %d bat_adj: %d", info.charging, info.batt_adj); | ||
175 | lcd_putsf(0, line++, "4.2: en: %d dcdc: %d", info._4p2_enable, info._4p2_dcdc); | ||
176 | lcd_putsf(0, line++, "4.2: cmptrip: %d dropout: %d", info._4p2_cmptrip, info._4p2_dropout); | ||
177 | lcd_putsf(0, line++, "5V: pwd_4.2_charge: %d", info._5v_pwd_charge_4p2); | ||
178 | lcd_putsf(0, line++, "5V: chargelim: %d mA", info._5v_charge_4p2_limit); | ||
179 | lcd_putsf(0, line++, "5V: dcdc: %d xfer: %d", info._5v_enable_dcdc, info._5v_dcdc_xfer); | ||
180 | lcd_putsf(0, line++, "5V: thr: %d mV use: %d cmps: %d", info._5v_vbusvalid_thr, | ||
168 | info._5v_vbusvalid_detect, info._5v_vbus_cmps); | 181 | info._5v_vbusvalid_detect, info._5v_vbus_cmps); |
169 | 182 | ||
170 | lcd_update(); | 183 | lcd_update(); |
@@ -286,7 +299,8 @@ bool dbg_hw_info_clkctrl(void) | |||
286 | #undef c | 299 | #undef c |
287 | } | 300 | } |
288 | int line = ARRAYLEN(dbg_clk) + 1; | 301 | int line = ARRAYLEN(dbg_clk) + 1; |
289 | lcd_putsf(0, line, "auto slow: %d", imx233_clkctrl_is_auto_slow_enabled()); | 302 | lcd_putsf(0, line, "auto slow: %d emi sync: %d", imx233_clkctrl_is_auto_slow_enabled(), |
303 | imx233_clkctrl_is_emi_sync_enabled()); | ||
290 | line++; | 304 | line++; |
291 | lcd_putsf(0, line, "as monitor: "); | 305 | lcd_putsf(0, line, "as monitor: "); |
292 | int x_off = 12; | 306 | int x_off = 12; |
diff --git a/firmware/target/arm/imx233/power-imx233.c b/firmware/target/arm/imx233/power-imx233.c index 6ba08ae394..c02d6ddb77 100644 --- a/firmware/target/arm/imx233/power-imx233.c +++ b/firmware/target/arm/imx233/power-imx233.c | |||
@@ -165,6 +165,130 @@ void imx233_power_set_stop_current(unsigned current) | |||
165 | } | 165 | } |
166 | } | 166 | } |
167 | 167 | ||
168 | /* regulator info */ | ||
169 | #define HAS_BO (1 << 0) | ||
170 | #define HAS_LINREG (1 << 1) | ||
171 | #define HAS_LINREG_OFFSET (1 << 2) | ||
172 | |||
173 | static struct | ||
174 | { | ||
175 | unsigned min, step; | ||
176 | volatile uint32_t *reg; | ||
177 | uint32_t trg_bm, trg_bp; // bitmask and bitpos | ||
178 | unsigned flags; | ||
179 | uint32_t bo_bm, bo_bp; // bitmask and bitpos | ||
180 | uint32_t linreg_bm; | ||
181 | uint32_t linreg_offset_bm, linreg_offset_bp; // bitmask and bitpos | ||
182 | } regulator_info[] = | ||
183 | { | ||
184 | #define ADD_REGULATOR(name, mask) \ | ||
185 | .min = HW_POWER_##name##CTRL__TRG_MIN, \ | ||
186 | .step = HW_POWER_##name##CTRL__TRG_STEP, \ | ||
187 | .reg = &HW_POWER_##name##CTRL, \ | ||
188 | .trg_bm = HW_POWER_##name##CTRL__TRG_BM, \ | ||
189 | .trg_bp = HW_POWER_##name##CTRL__TRG_BP, \ | ||
190 | .flags = mask | ||
191 | #define ADD_REGULATOR_BO(name) \ | ||
192 | .bo_bm = HW_POWER_##name##CTRL__BO_OFFSET_BM, \ | ||
193 | .bo_bp = HW_POWER_##name##CTRL__BO_OFFSET_BP | ||
194 | #define ADD_REGULATOR_LINREG(name) \ | ||
195 | .linreg_bm = HW_POWER_##name##CTRL__ENABLE_LINREG | ||
196 | #define ADD_REGULATOR_LINREG_OFFSET(name) \ | ||
197 | .linreg_offset_bm = HW_POWER_##name##CTRL__LINREG_OFFSET_BM, \ | ||
198 | .linreg_offset_bp = HW_POWER_##name##CTRL__LINREG_OFFSET_BP | ||
199 | [REGULATOR_VDDD] = | ||
200 | { | ||
201 | ADD_REGULATOR(VDDD, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET), | ||
202 | ADD_REGULATOR_BO(VDDD), | ||
203 | ADD_REGULATOR_LINREG(VDDD), | ||
204 | ADD_REGULATOR_LINREG_OFFSET(VDDD) | ||
205 | }, | ||
206 | [REGULATOR_VDDA] = | ||
207 | { | ||
208 | ADD_REGULATOR(VDDA, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET), | ||
209 | ADD_REGULATOR_BO(VDDA), | ||
210 | ADD_REGULATOR_LINREG(VDDA), | ||
211 | ADD_REGULATOR_LINREG_OFFSET(VDDA) | ||
212 | }, | ||
213 | [REGULATOR_VDDIO] = | ||
214 | { | ||
215 | ADD_REGULATOR(VDDIO, HAS_BO|HAS_LINREG_OFFSET), | ||
216 | ADD_REGULATOR_BO(VDDIO), | ||
217 | ADD_REGULATOR_LINREG_OFFSET(VDDIO) | ||
218 | }, | ||
219 | [REGULATOR_VDDMEM] = | ||
220 | { | ||
221 | ADD_REGULATOR(VDDMEM, HAS_LINREG), | ||
222 | ADD_REGULATOR_LINREG(VDDMEM), | ||
223 | }, | ||
224 | }; | ||
225 | |||
226 | void imx233_power_get_regulator(enum imx233_regulator_t reg, unsigned *value_mv, | ||
227 | unsigned *brownout_mv) | ||
228 | { | ||
229 | uint32_t reg_val = *regulator_info[reg].reg; | ||
230 | /* read target value */ | ||
231 | unsigned raw_val = (reg_val & regulator_info[reg].trg_bm) >> regulator_info[reg].trg_bp; | ||
232 | /* convert it to mv */ | ||
233 | if(value_mv) | ||
234 | *value_mv = regulator_info[reg].min + regulator_info[reg].step * raw_val; | ||
235 | if(regulator_info[reg].flags & HAS_BO) | ||
236 | { | ||
237 | /* read brownout offset */ | ||
238 | unsigned raw_bo = (reg_val & regulator_info[reg].bo_bm) >> regulator_info[reg].bo_bp; | ||
239 | /* convert it to mv */ | ||
240 | if(brownout_mv) | ||
241 | *brownout_mv = regulator_info[reg].min + regulator_info[reg].step * (raw_val - raw_bo); | ||
242 | } | ||
243 | else if(brownout_mv) | ||
244 | *brownout_mv = 0; | ||
245 | } | ||
246 | |||
247 | void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned value_mv, | ||
248 | unsigned brownout_mv) | ||
249 | { | ||
250 | // compute raw values | ||
251 | unsigned raw_val = (value_mv - regulator_info[reg].min) / regulator_info[reg].step; | ||
252 | unsigned raw_bo_offset = (value_mv - brownout_mv) / regulator_info[reg].step; | ||
253 | // update | ||
254 | uint32_t reg_val = (*regulator_info[reg].reg) & ~regulator_info[reg].trg_bm; | ||
255 | reg_val |= raw_val << regulator_info[reg].trg_bp; | ||
256 | if(regulator_info[reg].flags & HAS_BO) | ||
257 | { | ||
258 | reg_val &= ~regulator_info[reg].bo_bm; | ||
259 | reg_val |= raw_bo_offset << regulator_info[reg].bo_bp; | ||
260 | } | ||
261 | *regulator_info[reg].reg = reg_val; | ||
262 | } | ||
263 | |||
264 | // offset is -1,0 or 1 | ||
265 | void imx233_power_get_regulator_linreg(enum imx233_regulator_t reg, | ||
266 | bool *enabled, int *linreg_offset) | ||
267 | { | ||
268 | if(enabled && regulator_info[reg].flags & HAS_LINREG) | ||
269 | *enabled = !!(*regulator_info[reg].reg & regulator_info[reg].linreg_bm); | ||
270 | else if(enabled) | ||
271 | *enabled = true; | ||
272 | if(regulator_info[reg].flags & HAS_LINREG_OFFSET) | ||
273 | { | ||
274 | unsigned v = (*regulator_info[reg].reg & regulator_info[reg].linreg_offset_bm); | ||
275 | v >>= regulator_info[reg].linreg_offset_bp; | ||
276 | if(linreg_offset) | ||
277 | *linreg_offset = (v == 0) ? 0 : (v == 1) ? 1 : -1; | ||
278 | } | ||
279 | else if(linreg_offset) | ||
280 | *linreg_offset = 0; | ||
281 | } | ||
282 | |||
283 | // offset is -1,0 or 1 | ||
284 | /* | ||
285 | void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg, | ||
286 | bool enabled, int linreg_offset) | ||
287 | { | ||
288 | } | ||
289 | */ | ||
290 | |||
291 | |||
168 | struct imx233_power_info_t imx233_power_get_info(unsigned flags) | 292 | struct imx233_power_info_t imx233_power_get_info(unsigned flags) |
169 | { | 293 | { |
170 | static int dcdc_freqsel[8] = { | 294 | static int dcdc_freqsel[8] = { |
@@ -180,31 +304,6 @@ struct imx233_power_info_t imx233_power_get_info(unsigned flags) | |||
180 | 304 | ||
181 | struct imx233_power_info_t s; | 305 | struct imx233_power_info_t s; |
182 | memset(&s, 0, sizeof(s)); | 306 | memset(&s, 0, sizeof(s)); |
183 | if(flags & POWER_INFO_VDDD) | ||
184 | { | ||
185 | s.vddd = HW_POWER_VDDDCTRL__TRG_MIN + HW_POWER_VDDDCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDDCTRL, TRG); | ||
186 | s.vddd_linreg = HW_POWER_VDDDCTRL & HW_POWER_VDDDCTRL__ENABLE_LINREG; | ||
187 | s.vddd_linreg_offset = __XTRACT(HW_POWER_VDDDCTRL, LINREG_OFFSET) == 0 ? 0 : | ||
188 | __XTRACT(HW_POWER_VDDDCTRL, LINREG_OFFSET) == 1 ? 25 : -25; | ||
189 | } | ||
190 | if(flags & POWER_INFO_VDDA) | ||
191 | { | ||
192 | s.vdda = HW_POWER_VDDACTRL__TRG_MIN + HW_POWER_VDDACTRL__TRG_STEP * __XTRACT(HW_POWER_VDDACTRL, TRG); | ||
193 | s.vdda_linreg = HW_POWER_VDDACTRL & HW_POWER_VDDACTRL__ENABLE_LINREG; | ||
194 | s.vdda_linreg_offset = __XTRACT(HW_POWER_VDDACTRL, LINREG_OFFSET) == 0 ? 0 : | ||
195 | __XTRACT(HW_POWER_VDDACTRL, LINREG_OFFSET) == 1 ? 25 : -25; | ||
196 | } | ||
197 | if(flags & POWER_INFO_VDDIO) | ||
198 | { | ||
199 | s.vddio = HW_POWER_VDDIOCTRL__TRG_MIN + HW_POWER_VDDIOCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDIOCTRL, TRG); | ||
200 | s.vddio_linreg_offset = __XTRACT(HW_POWER_VDDIOCTRL, LINREG_OFFSET) == 0 ? 0 : | ||
201 | __XTRACT(HW_POWER_VDDIOCTRL, LINREG_OFFSET) == 1 ? 25 : -25; | ||
202 | } | ||
203 | if(flags & POWER_INFO_VDDMEM) | ||
204 | { | ||
205 | s.vddmem = HW_POWER_VDDMEMCTRL__TRG_MIN + HW_POWER_VDDMEMCTRL__TRG_STEP * __XTRACT(HW_POWER_VDDMEMCTRL, TRG); | ||
206 | s.vddmem_linreg = HW_POWER_VDDMEMCTRL & HW_POWER_VDDMEMCTRL__ENABLE_LINREG; | ||
207 | } | ||
208 | if(flags & POWER_INFO_DCDC) | 307 | if(flags & POWER_INFO_DCDC) |
209 | { | 308 | { |
210 | s.dcdc_sel_pllclk = HW_POWER_MISC & HW_POWER_MISC__SEL_PLLCLK; | 309 | s.dcdc_sel_pllclk = HW_POWER_MISC & HW_POWER_MISC__SEL_PLLCLK; |
diff --git a/firmware/target/arm/imx233/power-imx233.h b/firmware/target/arm/imx233/power-imx233.h index b38f9e576b..6991fde7b2 100644 --- a/firmware/target/arm/imx233/power-imx233.h +++ b/firmware/target/arm/imx233/power-imx233.h | |||
@@ -77,6 +77,8 @@ | |||
77 | #define HW_POWER_VDDDCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x40)) | 77 | #define HW_POWER_VDDDCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x40)) |
78 | #define HW_POWER_VDDDCTRL__TRG_BP 0 | 78 | #define HW_POWER_VDDDCTRL__TRG_BP 0 |
79 | #define HW_POWER_VDDDCTRL__TRG_BM 0x1f | 79 | #define HW_POWER_VDDDCTRL__TRG_BM 0x1f |
80 | #define HW_POWER_VDDDCTRL__BO_OFFSET_BP 8 | ||
81 | #define HW_POWER_VDDDCTRL__BO_OFFSET_BM (0x7 << 8) | ||
80 | #define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */ | 82 | #define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */ |
81 | #define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */ | 83 | #define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */ |
82 | #define HW_POWER_VDDDCTRL__LINREG_OFFSET_BP 16 | 84 | #define HW_POWER_VDDDCTRL__LINREG_OFFSET_BP 16 |
@@ -86,6 +88,8 @@ | |||
86 | #define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50)) | 88 | #define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50)) |
87 | #define HW_POWER_VDDACTRL__TRG_BP 0 | 89 | #define HW_POWER_VDDACTRL__TRG_BP 0 |
88 | #define HW_POWER_VDDACTRL__TRG_BM 0x1f | 90 | #define HW_POWER_VDDACTRL__TRG_BM 0x1f |
91 | #define HW_POWER_VDDACTRL__BO_OFFSET_BP 8 | ||
92 | #define HW_POWER_VDDACTRL__BO_OFFSET_BM (0x7 << 8) | ||
89 | #define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */ | 93 | #define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */ |
90 | #define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */ | 94 | #define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */ |
91 | #define HW_POWER_VDDACTRL__LINREG_OFFSET_BP 12 | 95 | #define HW_POWER_VDDACTRL__LINREG_OFFSET_BP 12 |
@@ -95,6 +99,8 @@ | |||
95 | #define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60)) | 99 | #define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60)) |
96 | #define HW_POWER_VDDIOCTRL__TRG_BP 0 | 100 | #define HW_POWER_VDDIOCTRL__TRG_BP 0 |
97 | #define HW_POWER_VDDIOCTRL__TRG_BM 0x1f | 101 | #define HW_POWER_VDDIOCTRL__TRG_BM 0x1f |
102 | #define HW_POWER_VDDIOCTRL__BO_OFFSET_BP 8 | ||
103 | #define HW_POWER_VDDIOCTRL__BO_OFFSET_BM (0x7 << 8) | ||
98 | #define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */ | 104 | #define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */ |
99 | #define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */ | 105 | #define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */ |
100 | #define HW_POWER_VDDIOCTRL__LINREG_OFFSET_BP 12 | 106 | #define HW_POWER_VDDIOCTRL__LINREG_OFFSET_BP 12 |
@@ -173,10 +179,33 @@ void imx233_power_set_charge_current(unsigned current); /* in mA */ | |||
173 | void imx233_power_set_stop_current(unsigned current); /* in mA */ | 179 | void imx233_power_set_stop_current(unsigned current); /* in mA */ |
174 | void imx233_power_enable_batadj(bool enable); | 180 | void imx233_power_enable_batadj(bool enable); |
175 | 181 | ||
182 | enum imx233_regulator_t | ||
183 | { | ||
184 | REGULATOR_VDDD, /* target, brownout, linreg, linreg offset */ | ||
185 | REGULATOR_VDDA, /* target, brownout, linreg, linreg offset */ | ||
186 | REGULATOR_VDDIO, /* target, brownout, linreg offset */ | ||
187 | REGULATOR_VDDMEM, /* target, linreg */ | ||
188 | REGULATOR_COUNT, | ||
189 | }; | ||
190 | |||
191 | void imx233_power_get_regulator(enum imx233_regulator_t reg, unsigned *target_mv, | ||
192 | unsigned *brownout_mv); | ||
193 | |||
194 | void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned target_mv, | ||
195 | unsigned brownout_mv); | ||
196 | |||
197 | // offset is -1,0 or 1 | ||
198 | void imx233_power_get_regulator_linreg(enum imx233_regulator_t reg, | ||
199 | bool *enabled, int *linreg_offset); | ||
200 | |||
201 | // offset is -1,0 or 1 | ||
202 | void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg, | ||
203 | bool enabled, int linreg_offset); | ||
204 | |||
176 | static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq) | 205 | static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq) |
177 | { | 206 | { |
178 | HW_POWER_MISC &= ~(HW_POWER_MISC__SEL_PLLCLK | HW_POWER_MISC__FREQSEL_BM); | 207 | HW_POWER_MISC &= ~(HW_POWER_MISC__SEL_PLLCLK | HW_POWER_MISC__FREQSEL_BM); |
179 | /* WARNING: HW_POWER_MISC does have a SET/CLR variant ! */ | 208 | /* WARNING: HW_POWER_MISC does not have a SET/CLR variant ! */ |
180 | if(pll) | 209 | if(pll) |
181 | { | 210 | { |
182 | HW_POWER_MISC |= freq << HW_POWER_MISC__FREQSEL_BP; | 211 | HW_POWER_MISC |= freq << HW_POWER_MISC__FREQSEL_BP; |
@@ -186,16 +215,6 @@ static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq) | |||
186 | 215 | ||
187 | struct imx233_power_info_t | 216 | struct imx233_power_info_t |
188 | { | 217 | { |
189 | int vddd; /* in mV */ | ||
190 | bool vddd_linreg; /* VDDD source: linreg from VDDA or DC-DC */ | ||
191 | int vddd_linreg_offset; | ||
192 | int vdda; /* in mV */ | ||
193 | bool vdda_linreg; /* VDDA source: linreg from VDDIO or DC-DC */ | ||
194 | int vdda_linreg_offset; | ||
195 | int vddio; /* in mV */ | ||
196 | int vddio_linreg_offset; | ||
197 | int vddmem; /* in mV */ | ||
198 | bool vddmem_linreg; /* VDDMEM source: linreg from VDDIO or off */ | ||
199 | bool dcdc_sel_pllclk; /* clock source of DC-DC: pll or 24MHz xtal */ | 218 | bool dcdc_sel_pllclk; /* clock source of DC-DC: pll or 24MHz xtal */ |
200 | int dcdc_freqsel; | 219 | int dcdc_freqsel; |
201 | int charge_current; | 220 | int charge_current; |
@@ -215,10 +234,6 @@ struct imx233_power_info_t | |||
215 | bool _5v_vbus_cmps; | 234 | bool _5v_vbus_cmps; |
216 | }; | 235 | }; |
217 | 236 | ||
218 | #define POWER_INFO_VDDD (1 << 0) | ||
219 | #define POWER_INFO_VDDA (1 << 1) | ||
220 | #define POWER_INFO_VDDIO (1 << 2) | ||
221 | #define POWER_INFO_VDDMEM (1 << 3) | ||
222 | #define POWER_INFO_DCDC (1 << 4) | 237 | #define POWER_INFO_DCDC (1 << 4) |
223 | #define POWER_INFO_CHARGE (1 << 5) | 238 | #define POWER_INFO_CHARGE (1 << 5) |
224 | #define POWER_INFO_4P2 (1 << 6) | 239 | #define POWER_INFO_4P2 (1 << 6) |