diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/x1000/i2c.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/x1000/i2c.h | 625 |
1 files changed, 625 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/x1000/i2c.h b/firmware/target/mips/ingenic_x1000/x1000/i2c.h new file mode 100644 index 0000000000..29f24bf82e --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/x1000/i2c.h | |||
@@ -0,0 +1,625 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 3.0.0 | ||
10 | * x1000 version: 1.0 | ||
11 | * x1000 authors: Aidan MacDonald | ||
12 | * | ||
13 | * Copyright (C) 2015 by the authors | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or | ||
16 | * modify it under the terms of the GNU General Public License | ||
17 | * as published by the Free Software Foundation; either version 2 | ||
18 | * of the License, or (at your option) any later version. | ||
19 | * | ||
20 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
21 | * KIND, either express or implied. | ||
22 | * | ||
23 | ****************************************************************************/ | ||
24 | #ifndef __HEADERGEN_I2C_H__ | ||
25 | #define __HEADERGEN_I2C_H__ | ||
26 | |||
27 | #include "macro.h" | ||
28 | |||
29 | #define REG_I2C_CON(_n1) jz_reg(I2C_CON(_n1)) | ||
30 | #define JA_I2C_CON(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x0) | ||
31 | #define JT_I2C_CON(_n1) JIO_32_RW | ||
32 | #define JN_I2C_CON(_n1) I2C_CON | ||
33 | #define JI_I2C_CON(_n1) (_n1) | ||
34 | #define BP_I2C_CON_SPEED 1 | ||
35 | #define BM_I2C_CON_SPEED 0x6 | ||
36 | #define BV_I2C_CON_SPEED__100K 0x1 | ||
37 | #define BV_I2C_CON_SPEED__400K 0x2 | ||
38 | #define BF_I2C_CON_SPEED(v) (((v) & 0x3) << 1) | ||
39 | #define BFM_I2C_CON_SPEED(v) BM_I2C_CON_SPEED | ||
40 | #define BF_I2C_CON_SPEED_V(e) BF_I2C_CON_SPEED(BV_I2C_CON_SPEED__##e) | ||
41 | #define BFM_I2C_CON_SPEED_V(v) BM_I2C_CON_SPEED | ||
42 | #define BP_I2C_CON_SLVDIS 6 | ||
43 | #define BM_I2C_CON_SLVDIS 0x40 | ||
44 | #define BF_I2C_CON_SLVDIS(v) (((v) & 0x1) << 6) | ||
45 | #define BFM_I2C_CON_SLVDIS(v) BM_I2C_CON_SLVDIS | ||
46 | #define BF_I2C_CON_SLVDIS_V(e) BF_I2C_CON_SLVDIS(BV_I2C_CON_SLVDIS__##e) | ||
47 | #define BFM_I2C_CON_SLVDIS_V(v) BM_I2C_CON_SLVDIS | ||
48 | #define BP_I2C_CON_RESTART 5 | ||
49 | #define BM_I2C_CON_RESTART 0x20 | ||
50 | #define BF_I2C_CON_RESTART(v) (((v) & 0x1) << 5) | ||
51 | #define BFM_I2C_CON_RESTART(v) BM_I2C_CON_RESTART | ||
52 | #define BF_I2C_CON_RESTART_V(e) BF_I2C_CON_RESTART(BV_I2C_CON_RESTART__##e) | ||
53 | #define BFM_I2C_CON_RESTART_V(v) BM_I2C_CON_RESTART | ||
54 | #define BP_I2C_CON_MATP 4 | ||
55 | #define BM_I2C_CON_MATP 0x10 | ||
56 | #define BF_I2C_CON_MATP(v) (((v) & 0x1) << 4) | ||
57 | #define BFM_I2C_CON_MATP(v) BM_I2C_CON_MATP | ||
58 | #define BF_I2C_CON_MATP_V(e) BF_I2C_CON_MATP(BV_I2C_CON_MATP__##e) | ||
59 | #define BFM_I2C_CON_MATP_V(v) BM_I2C_CON_MATP | ||
60 | #define BP_I2C_CON_SATP 3 | ||
61 | #define BM_I2C_CON_SATP 0x8 | ||
62 | #define BF_I2C_CON_SATP(v) (((v) & 0x1) << 3) | ||
63 | #define BFM_I2C_CON_SATP(v) BM_I2C_CON_SATP | ||
64 | #define BF_I2C_CON_SATP_V(e) BF_I2C_CON_SATP(BV_I2C_CON_SATP__##e) | ||
65 | #define BFM_I2C_CON_SATP_V(v) BM_I2C_CON_SATP | ||
66 | #define BP_I2C_CON_MD 0 | ||
67 | #define BM_I2C_CON_MD 0x1 | ||
68 | #define BF_I2C_CON_MD(v) (((v) & 0x1) << 0) | ||
69 | #define BFM_I2C_CON_MD(v) BM_I2C_CON_MD | ||
70 | #define BF_I2C_CON_MD_V(e) BF_I2C_CON_MD(BV_I2C_CON_MD__##e) | ||
71 | #define BFM_I2C_CON_MD_V(v) BM_I2C_CON_MD | ||
72 | |||
73 | #define REG_I2C_DC(_n1) jz_reg(I2C_DC(_n1)) | ||
74 | #define JA_I2C_DC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x10) | ||
75 | #define JT_I2C_DC(_n1) JIO_32_RW | ||
76 | #define JN_I2C_DC(_n1) I2C_DC | ||
77 | #define JI_I2C_DC(_n1) (_n1) | ||
78 | #define BP_I2C_DC_DAT 0 | ||
79 | #define BM_I2C_DC_DAT 0xff | ||
80 | #define BF_I2C_DC_DAT(v) (((v) & 0xff) << 0) | ||
81 | #define BFM_I2C_DC_DAT(v) BM_I2C_DC_DAT | ||
82 | #define BF_I2C_DC_DAT_V(e) BF_I2C_DC_DAT(BV_I2C_DC_DAT__##e) | ||
83 | #define BFM_I2C_DC_DAT_V(v) BM_I2C_DC_DAT | ||
84 | #define BP_I2C_DC_RESTART 10 | ||
85 | #define BM_I2C_DC_RESTART 0x400 | ||
86 | #define BF_I2C_DC_RESTART(v) (((v) & 0x1) << 10) | ||
87 | #define BFM_I2C_DC_RESTART(v) BM_I2C_DC_RESTART | ||
88 | #define BF_I2C_DC_RESTART_V(e) BF_I2C_DC_RESTART(BV_I2C_DC_RESTART__##e) | ||
89 | #define BFM_I2C_DC_RESTART_V(v) BM_I2C_DC_RESTART | ||
90 | #define BP_I2C_DC_STOP 9 | ||
91 | #define BM_I2C_DC_STOP 0x200 | ||
92 | #define BF_I2C_DC_STOP(v) (((v) & 0x1) << 9) | ||
93 | #define BFM_I2C_DC_STOP(v) BM_I2C_DC_STOP | ||
94 | #define BF_I2C_DC_STOP_V(e) BF_I2C_DC_STOP(BV_I2C_DC_STOP__##e) | ||
95 | #define BFM_I2C_DC_STOP_V(v) BM_I2C_DC_STOP | ||
96 | #define BP_I2C_DC_CMD 8 | ||
97 | #define BM_I2C_DC_CMD 0x100 | ||
98 | #define BF_I2C_DC_CMD(v) (((v) & 0x1) << 8) | ||
99 | #define BFM_I2C_DC_CMD(v) BM_I2C_DC_CMD | ||
100 | #define BF_I2C_DC_CMD_V(e) BF_I2C_DC_CMD(BV_I2C_DC_CMD__##e) | ||
101 | #define BFM_I2C_DC_CMD_V(v) BM_I2C_DC_CMD | ||
102 | |||
103 | #define REG_I2C_INTST(_n1) jz_reg(I2C_INTST(_n1)) | ||
104 | #define JA_I2C_INTST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x2c) | ||
105 | #define JT_I2C_INTST(_n1) JIO_32_RW | ||
106 | #define JN_I2C_INTST(_n1) I2C_INTST | ||
107 | #define JI_I2C_INTST(_n1) (_n1) | ||
108 | #define BP_I2C_INTST_GC 11 | ||
109 | #define BM_I2C_INTST_GC 0x800 | ||
110 | #define BF_I2C_INTST_GC(v) (((v) & 0x1) << 11) | ||
111 | #define BFM_I2C_INTST_GC(v) BM_I2C_INTST_GC | ||
112 | #define BF_I2C_INTST_GC_V(e) BF_I2C_INTST_GC(BV_I2C_INTST_GC__##e) | ||
113 | #define BFM_I2C_INTST_GC_V(v) BM_I2C_INTST_GC | ||
114 | #define BP_I2C_INTST_STT 10 | ||
115 | #define BM_I2C_INTST_STT 0x400 | ||
116 | #define BF_I2C_INTST_STT(v) (((v) & 0x1) << 10) | ||
117 | #define BFM_I2C_INTST_STT(v) BM_I2C_INTST_STT | ||
118 | #define BF_I2C_INTST_STT_V(e) BF_I2C_INTST_STT(BV_I2C_INTST_STT__##e) | ||
119 | #define BFM_I2C_INTST_STT_V(v) BM_I2C_INTST_STT | ||
120 | #define BP_I2C_INTST_STP 9 | ||
121 | #define BM_I2C_INTST_STP 0x200 | ||
122 | #define BF_I2C_INTST_STP(v) (((v) & 0x1) << 9) | ||
123 | #define BFM_I2C_INTST_STP(v) BM_I2C_INTST_STP | ||
124 | #define BF_I2C_INTST_STP_V(e) BF_I2C_INTST_STP(BV_I2C_INTST_STP__##e) | ||
125 | #define BFM_I2C_INTST_STP_V(v) BM_I2C_INTST_STP | ||
126 | #define BP_I2C_INTST_ACT 8 | ||
127 | #define BM_I2C_INTST_ACT 0x100 | ||
128 | #define BF_I2C_INTST_ACT(v) (((v) & 0x1) << 8) | ||
129 | #define BFM_I2C_INTST_ACT(v) BM_I2C_INTST_ACT | ||
130 | #define BF_I2C_INTST_ACT_V(e) BF_I2C_INTST_ACT(BV_I2C_INTST_ACT__##e) | ||
131 | #define BFM_I2C_INTST_ACT_V(v) BM_I2C_INTST_ACT | ||
132 | #define BP_I2C_INTST_RXDN 7 | ||
133 | #define BM_I2C_INTST_RXDN 0x80 | ||
134 | #define BF_I2C_INTST_RXDN(v) (((v) & 0x1) << 7) | ||
135 | #define BFM_I2C_INTST_RXDN(v) BM_I2C_INTST_RXDN | ||
136 | #define BF_I2C_INTST_RXDN_V(e) BF_I2C_INTST_RXDN(BV_I2C_INTST_RXDN__##e) | ||
137 | #define BFM_I2C_INTST_RXDN_V(v) BM_I2C_INTST_RXDN | ||
138 | #define BP_I2C_INTST_TXABT 6 | ||
139 | #define BM_I2C_INTST_TXABT 0x40 | ||
140 | #define BF_I2C_INTST_TXABT(v) (((v) & 0x1) << 6) | ||
141 | #define BFM_I2C_INTST_TXABT(v) BM_I2C_INTST_TXABT | ||
142 | #define BF_I2C_INTST_TXABT_V(e) BF_I2C_INTST_TXABT(BV_I2C_INTST_TXABT__##e) | ||
143 | #define BFM_I2C_INTST_TXABT_V(v) BM_I2C_INTST_TXABT | ||
144 | #define BP_I2C_INTST_RDREQ 5 | ||
145 | #define BM_I2C_INTST_RDREQ 0x20 | ||
146 | #define BF_I2C_INTST_RDREQ(v) (((v) & 0x1) << 5) | ||
147 | #define BFM_I2C_INTST_RDREQ(v) BM_I2C_INTST_RDREQ | ||
148 | #define BF_I2C_INTST_RDREQ_V(e) BF_I2C_INTST_RDREQ(BV_I2C_INTST_RDREQ__##e) | ||
149 | #define BFM_I2C_INTST_RDREQ_V(v) BM_I2C_INTST_RDREQ | ||
150 | #define BP_I2C_INTST_TXEMP 4 | ||
151 | #define BM_I2C_INTST_TXEMP 0x10 | ||
152 | #define BF_I2C_INTST_TXEMP(v) (((v) & 0x1) << 4) | ||
153 | #define BFM_I2C_INTST_TXEMP(v) BM_I2C_INTST_TXEMP | ||
154 | #define BF_I2C_INTST_TXEMP_V(e) BF_I2C_INTST_TXEMP(BV_I2C_INTST_TXEMP__##e) | ||
155 | #define BFM_I2C_INTST_TXEMP_V(v) BM_I2C_INTST_TXEMP | ||
156 | #define BP_I2C_INTST_TXOF 3 | ||
157 | #define BM_I2C_INTST_TXOF 0x8 | ||
158 | #define BF_I2C_INTST_TXOF(v) (((v) & 0x1) << 3) | ||
159 | #define BFM_I2C_INTST_TXOF(v) BM_I2C_INTST_TXOF | ||
160 | #define BF_I2C_INTST_TXOF_V(e) BF_I2C_INTST_TXOF(BV_I2C_INTST_TXOF__##e) | ||
161 | #define BFM_I2C_INTST_TXOF_V(v) BM_I2C_INTST_TXOF | ||
162 | #define BP_I2C_INTST_RXFL 2 | ||
163 | #define BM_I2C_INTST_RXFL 0x4 | ||
164 | #define BF_I2C_INTST_RXFL(v) (((v) & 0x1) << 2) | ||
165 | #define BFM_I2C_INTST_RXFL(v) BM_I2C_INTST_RXFL | ||
166 | #define BF_I2C_INTST_RXFL_V(e) BF_I2C_INTST_RXFL(BV_I2C_INTST_RXFL__##e) | ||
167 | #define BFM_I2C_INTST_RXFL_V(v) BM_I2C_INTST_RXFL | ||
168 | #define BP_I2C_INTST_RXOF 1 | ||
169 | #define BM_I2C_INTST_RXOF 0x2 | ||
170 | #define BF_I2C_INTST_RXOF(v) (((v) & 0x1) << 1) | ||
171 | #define BFM_I2C_INTST_RXOF(v) BM_I2C_INTST_RXOF | ||
172 | #define BF_I2C_INTST_RXOF_V(e) BF_I2C_INTST_RXOF(BV_I2C_INTST_RXOF__##e) | ||
173 | #define BFM_I2C_INTST_RXOF_V(v) BM_I2C_INTST_RXOF | ||
174 | #define BP_I2C_INTST_RXUF 0 | ||
175 | #define BM_I2C_INTST_RXUF 0x1 | ||
176 | #define BF_I2C_INTST_RXUF(v) (((v) & 0x1) << 0) | ||
177 | #define BFM_I2C_INTST_RXUF(v) BM_I2C_INTST_RXUF | ||
178 | #define BF_I2C_INTST_RXUF_V(e) BF_I2C_INTST_RXUF(BV_I2C_INTST_RXUF__##e) | ||
179 | #define BFM_I2C_INTST_RXUF_V(v) BM_I2C_INTST_RXUF | ||
180 | |||
181 | #define REG_I2C_INTMSK(_n1) jz_reg(I2C_INTMSK(_n1)) | ||
182 | #define JA_I2C_INTMSK(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x30) | ||
183 | #define JT_I2C_INTMSK(_n1) JIO_32_RW | ||
184 | #define JN_I2C_INTMSK(_n1) I2C_INTMSK | ||
185 | #define JI_I2C_INTMSK(_n1) (_n1) | ||
186 | #define BP_I2C_INTMSK_GC 11 | ||
187 | #define BM_I2C_INTMSK_GC 0x800 | ||
188 | #define BF_I2C_INTMSK_GC(v) (((v) & 0x1) << 11) | ||
189 | #define BFM_I2C_INTMSK_GC(v) BM_I2C_INTMSK_GC | ||
190 | #define BF_I2C_INTMSK_GC_V(e) BF_I2C_INTMSK_GC(BV_I2C_INTMSK_GC__##e) | ||
191 | #define BFM_I2C_INTMSK_GC_V(v) BM_I2C_INTMSK_GC | ||
192 | #define BP_I2C_INTMSK_STT 10 | ||
193 | #define BM_I2C_INTMSK_STT 0x400 | ||
194 | #define BF_I2C_INTMSK_STT(v) (((v) & 0x1) << 10) | ||
195 | #define BFM_I2C_INTMSK_STT(v) BM_I2C_INTMSK_STT | ||
196 | #define BF_I2C_INTMSK_STT_V(e) BF_I2C_INTMSK_STT(BV_I2C_INTMSK_STT__##e) | ||
197 | #define BFM_I2C_INTMSK_STT_V(v) BM_I2C_INTMSK_STT | ||
198 | #define BP_I2C_INTMSK_STP 9 | ||
199 | #define BM_I2C_INTMSK_STP 0x200 | ||
200 | #define BF_I2C_INTMSK_STP(v) (((v) & 0x1) << 9) | ||
201 | #define BFM_I2C_INTMSK_STP(v) BM_I2C_INTMSK_STP | ||
202 | #define BF_I2C_INTMSK_STP_V(e) BF_I2C_INTMSK_STP(BV_I2C_INTMSK_STP__##e) | ||
203 | #define BFM_I2C_INTMSK_STP_V(v) BM_I2C_INTMSK_STP | ||
204 | #define BP_I2C_INTMSK_ACT 8 | ||
205 | #define BM_I2C_INTMSK_ACT 0x100 | ||
206 | #define BF_I2C_INTMSK_ACT(v) (((v) & 0x1) << 8) | ||
207 | #define BFM_I2C_INTMSK_ACT(v) BM_I2C_INTMSK_ACT | ||
208 | #define BF_I2C_INTMSK_ACT_V(e) BF_I2C_INTMSK_ACT(BV_I2C_INTMSK_ACT__##e) | ||
209 | #define BFM_I2C_INTMSK_ACT_V(v) BM_I2C_INTMSK_ACT | ||
210 | #define BP_I2C_INTMSK_RXDN 7 | ||
211 | #define BM_I2C_INTMSK_RXDN 0x80 | ||
212 | #define BF_I2C_INTMSK_RXDN(v) (((v) & 0x1) << 7) | ||
213 | #define BFM_I2C_INTMSK_RXDN(v) BM_I2C_INTMSK_RXDN | ||
214 | #define BF_I2C_INTMSK_RXDN_V(e) BF_I2C_INTMSK_RXDN(BV_I2C_INTMSK_RXDN__##e) | ||
215 | #define BFM_I2C_INTMSK_RXDN_V(v) BM_I2C_INTMSK_RXDN | ||
216 | #define BP_I2C_INTMSK_TXABT 6 | ||
217 | #define BM_I2C_INTMSK_TXABT 0x40 | ||
218 | #define BF_I2C_INTMSK_TXABT(v) (((v) & 0x1) << 6) | ||
219 | #define BFM_I2C_INTMSK_TXABT(v) BM_I2C_INTMSK_TXABT | ||
220 | #define BF_I2C_INTMSK_TXABT_V(e) BF_I2C_INTMSK_TXABT(BV_I2C_INTMSK_TXABT__##e) | ||
221 | #define BFM_I2C_INTMSK_TXABT_V(v) BM_I2C_INTMSK_TXABT | ||
222 | #define BP_I2C_INTMSK_RDREQ 5 | ||
223 | #define BM_I2C_INTMSK_RDREQ 0x20 | ||
224 | #define BF_I2C_INTMSK_RDREQ(v) (((v) & 0x1) << 5) | ||
225 | #define BFM_I2C_INTMSK_RDREQ(v) BM_I2C_INTMSK_RDREQ | ||
226 | #define BF_I2C_INTMSK_RDREQ_V(e) BF_I2C_INTMSK_RDREQ(BV_I2C_INTMSK_RDREQ__##e) | ||
227 | #define BFM_I2C_INTMSK_RDREQ_V(v) BM_I2C_INTMSK_RDREQ | ||
228 | #define BP_I2C_INTMSK_TXEMP 4 | ||
229 | #define BM_I2C_INTMSK_TXEMP 0x10 | ||
230 | #define BF_I2C_INTMSK_TXEMP(v) (((v) & 0x1) << 4) | ||
231 | #define BFM_I2C_INTMSK_TXEMP(v) BM_I2C_INTMSK_TXEMP | ||
232 | #define BF_I2C_INTMSK_TXEMP_V(e) BF_I2C_INTMSK_TXEMP(BV_I2C_INTMSK_TXEMP__##e) | ||
233 | #define BFM_I2C_INTMSK_TXEMP_V(v) BM_I2C_INTMSK_TXEMP | ||
234 | #define BP_I2C_INTMSK_TXOF 3 | ||
235 | #define BM_I2C_INTMSK_TXOF 0x8 | ||
236 | #define BF_I2C_INTMSK_TXOF(v) (((v) & 0x1) << 3) | ||
237 | #define BFM_I2C_INTMSK_TXOF(v) BM_I2C_INTMSK_TXOF | ||
238 | #define BF_I2C_INTMSK_TXOF_V(e) BF_I2C_INTMSK_TXOF(BV_I2C_INTMSK_TXOF__##e) | ||
239 | #define BFM_I2C_INTMSK_TXOF_V(v) BM_I2C_INTMSK_TXOF | ||
240 | #define BP_I2C_INTMSK_RXFL 2 | ||
241 | #define BM_I2C_INTMSK_RXFL 0x4 | ||
242 | #define BF_I2C_INTMSK_RXFL(v) (((v) & 0x1) << 2) | ||
243 | #define BFM_I2C_INTMSK_RXFL(v) BM_I2C_INTMSK_RXFL | ||
244 | #define BF_I2C_INTMSK_RXFL_V(e) BF_I2C_INTMSK_RXFL(BV_I2C_INTMSK_RXFL__##e) | ||
245 | #define BFM_I2C_INTMSK_RXFL_V(v) BM_I2C_INTMSK_RXFL | ||
246 | #define BP_I2C_INTMSK_RXOF 1 | ||
247 | #define BM_I2C_INTMSK_RXOF 0x2 | ||
248 | #define BF_I2C_INTMSK_RXOF(v) (((v) & 0x1) << 1) | ||
249 | #define BFM_I2C_INTMSK_RXOF(v) BM_I2C_INTMSK_RXOF | ||
250 | #define BF_I2C_INTMSK_RXOF_V(e) BF_I2C_INTMSK_RXOF(BV_I2C_INTMSK_RXOF__##e) | ||
251 | #define BFM_I2C_INTMSK_RXOF_V(v) BM_I2C_INTMSK_RXOF | ||
252 | #define BP_I2C_INTMSK_RXUF 0 | ||
253 | #define BM_I2C_INTMSK_RXUF 0x1 | ||
254 | #define BF_I2C_INTMSK_RXUF(v) (((v) & 0x1) << 0) | ||
255 | #define BFM_I2C_INTMSK_RXUF(v) BM_I2C_INTMSK_RXUF | ||
256 | #define BF_I2C_INTMSK_RXUF_V(e) BF_I2C_INTMSK_RXUF(BV_I2C_INTMSK_RXUF__##e) | ||
257 | #define BFM_I2C_INTMSK_RXUF_V(v) BM_I2C_INTMSK_RXUF | ||
258 | |||
259 | #define REG_I2C_RINTST(_n1) jz_reg(I2C_RINTST(_n1)) | ||
260 | #define JA_I2C_RINTST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x34) | ||
261 | #define JT_I2C_RINTST(_n1) JIO_32_RW | ||
262 | #define JN_I2C_RINTST(_n1) I2C_RINTST | ||
263 | #define JI_I2C_RINTST(_n1) (_n1) | ||
264 | #define BP_I2C_RINTST_GC 11 | ||
265 | #define BM_I2C_RINTST_GC 0x800 | ||
266 | #define BF_I2C_RINTST_GC(v) (((v) & 0x1) << 11) | ||
267 | #define BFM_I2C_RINTST_GC(v) BM_I2C_RINTST_GC | ||
268 | #define BF_I2C_RINTST_GC_V(e) BF_I2C_RINTST_GC(BV_I2C_RINTST_GC__##e) | ||
269 | #define BFM_I2C_RINTST_GC_V(v) BM_I2C_RINTST_GC | ||
270 | #define BP_I2C_RINTST_STT 10 | ||
271 | #define BM_I2C_RINTST_STT 0x400 | ||
272 | #define BF_I2C_RINTST_STT(v) (((v) & 0x1) << 10) | ||
273 | #define BFM_I2C_RINTST_STT(v) BM_I2C_RINTST_STT | ||
274 | #define BF_I2C_RINTST_STT_V(e) BF_I2C_RINTST_STT(BV_I2C_RINTST_STT__##e) | ||
275 | #define BFM_I2C_RINTST_STT_V(v) BM_I2C_RINTST_STT | ||
276 | #define BP_I2C_RINTST_STP 9 | ||
277 | #define BM_I2C_RINTST_STP 0x200 | ||
278 | #define BF_I2C_RINTST_STP(v) (((v) & 0x1) << 9) | ||
279 | #define BFM_I2C_RINTST_STP(v) BM_I2C_RINTST_STP | ||
280 | #define BF_I2C_RINTST_STP_V(e) BF_I2C_RINTST_STP(BV_I2C_RINTST_STP__##e) | ||
281 | #define BFM_I2C_RINTST_STP_V(v) BM_I2C_RINTST_STP | ||
282 | #define BP_I2C_RINTST_ACT 8 | ||
283 | #define BM_I2C_RINTST_ACT 0x100 | ||
284 | #define BF_I2C_RINTST_ACT(v) (((v) & 0x1) << 8) | ||
285 | #define BFM_I2C_RINTST_ACT(v) BM_I2C_RINTST_ACT | ||
286 | #define BF_I2C_RINTST_ACT_V(e) BF_I2C_RINTST_ACT(BV_I2C_RINTST_ACT__##e) | ||
287 | #define BFM_I2C_RINTST_ACT_V(v) BM_I2C_RINTST_ACT | ||
288 | #define BP_I2C_RINTST_RXDN 7 | ||
289 | #define BM_I2C_RINTST_RXDN 0x80 | ||
290 | #define BF_I2C_RINTST_RXDN(v) (((v) & 0x1) << 7) | ||
291 | #define BFM_I2C_RINTST_RXDN(v) BM_I2C_RINTST_RXDN | ||
292 | #define BF_I2C_RINTST_RXDN_V(e) BF_I2C_RINTST_RXDN(BV_I2C_RINTST_RXDN__##e) | ||
293 | #define BFM_I2C_RINTST_RXDN_V(v) BM_I2C_RINTST_RXDN | ||
294 | #define BP_I2C_RINTST_TXABT 6 | ||
295 | #define BM_I2C_RINTST_TXABT 0x40 | ||
296 | #define BF_I2C_RINTST_TXABT(v) (((v) & 0x1) << 6) | ||
297 | #define BFM_I2C_RINTST_TXABT(v) BM_I2C_RINTST_TXABT | ||
298 | #define BF_I2C_RINTST_TXABT_V(e) BF_I2C_RINTST_TXABT(BV_I2C_RINTST_TXABT__##e) | ||
299 | #define BFM_I2C_RINTST_TXABT_V(v) BM_I2C_RINTST_TXABT | ||
300 | #define BP_I2C_RINTST_RDREQ 5 | ||
301 | #define BM_I2C_RINTST_RDREQ 0x20 | ||
302 | #define BF_I2C_RINTST_RDREQ(v) (((v) & 0x1) << 5) | ||
303 | #define BFM_I2C_RINTST_RDREQ(v) BM_I2C_RINTST_RDREQ | ||
304 | #define BF_I2C_RINTST_RDREQ_V(e) BF_I2C_RINTST_RDREQ(BV_I2C_RINTST_RDREQ__##e) | ||
305 | #define BFM_I2C_RINTST_RDREQ_V(v) BM_I2C_RINTST_RDREQ | ||
306 | #define BP_I2C_RINTST_TXEMP 4 | ||
307 | #define BM_I2C_RINTST_TXEMP 0x10 | ||
308 | #define BF_I2C_RINTST_TXEMP(v) (((v) & 0x1) << 4) | ||
309 | #define BFM_I2C_RINTST_TXEMP(v) BM_I2C_RINTST_TXEMP | ||
310 | #define BF_I2C_RINTST_TXEMP_V(e) BF_I2C_RINTST_TXEMP(BV_I2C_RINTST_TXEMP__##e) | ||
311 | #define BFM_I2C_RINTST_TXEMP_V(v) BM_I2C_RINTST_TXEMP | ||
312 | #define BP_I2C_RINTST_TXOF 3 | ||
313 | #define BM_I2C_RINTST_TXOF 0x8 | ||
314 | #define BF_I2C_RINTST_TXOF(v) (((v) & 0x1) << 3) | ||
315 | #define BFM_I2C_RINTST_TXOF(v) BM_I2C_RINTST_TXOF | ||
316 | #define BF_I2C_RINTST_TXOF_V(e) BF_I2C_RINTST_TXOF(BV_I2C_RINTST_TXOF__##e) | ||
317 | #define BFM_I2C_RINTST_TXOF_V(v) BM_I2C_RINTST_TXOF | ||
318 | #define BP_I2C_RINTST_RXFL 2 | ||
319 | #define BM_I2C_RINTST_RXFL 0x4 | ||
320 | #define BF_I2C_RINTST_RXFL(v) (((v) & 0x1) << 2) | ||
321 | #define BFM_I2C_RINTST_RXFL(v) BM_I2C_RINTST_RXFL | ||
322 | #define BF_I2C_RINTST_RXFL_V(e) BF_I2C_RINTST_RXFL(BV_I2C_RINTST_RXFL__##e) | ||
323 | #define BFM_I2C_RINTST_RXFL_V(v) BM_I2C_RINTST_RXFL | ||
324 | #define BP_I2C_RINTST_RXOF 1 | ||
325 | #define BM_I2C_RINTST_RXOF 0x2 | ||
326 | #define BF_I2C_RINTST_RXOF(v) (((v) & 0x1) << 1) | ||
327 | #define BFM_I2C_RINTST_RXOF(v) BM_I2C_RINTST_RXOF | ||
328 | #define BF_I2C_RINTST_RXOF_V(e) BF_I2C_RINTST_RXOF(BV_I2C_RINTST_RXOF__##e) | ||
329 | #define BFM_I2C_RINTST_RXOF_V(v) BM_I2C_RINTST_RXOF | ||
330 | #define BP_I2C_RINTST_RXUF 0 | ||
331 | #define BM_I2C_RINTST_RXUF 0x1 | ||
332 | #define BF_I2C_RINTST_RXUF(v) (((v) & 0x1) << 0) | ||
333 | #define BFM_I2C_RINTST_RXUF(v) BM_I2C_RINTST_RXUF | ||
334 | #define BF_I2C_RINTST_RXUF_V(e) BF_I2C_RINTST_RXUF(BV_I2C_RINTST_RXUF__##e) | ||
335 | #define BFM_I2C_RINTST_RXUF_V(v) BM_I2C_RINTST_RXUF | ||
336 | |||
337 | #define REG_I2C_ENABLE(_n1) jz_reg(I2C_ENABLE(_n1)) | ||
338 | #define JA_I2C_ENABLE(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x6c) | ||
339 | #define JT_I2C_ENABLE(_n1) JIO_32_RW | ||
340 | #define JN_I2C_ENABLE(_n1) I2C_ENABLE | ||
341 | #define JI_I2C_ENABLE(_n1) (_n1) | ||
342 | #define BP_I2C_ENABLE_ABORT 1 | ||
343 | #define BM_I2C_ENABLE_ABORT 0x2 | ||
344 | #define BF_I2C_ENABLE_ABORT(v) (((v) & 0x1) << 1) | ||
345 | #define BFM_I2C_ENABLE_ABORT(v) BM_I2C_ENABLE_ABORT | ||
346 | #define BF_I2C_ENABLE_ABORT_V(e) BF_I2C_ENABLE_ABORT(BV_I2C_ENABLE_ABORT__##e) | ||
347 | #define BFM_I2C_ENABLE_ABORT_V(v) BM_I2C_ENABLE_ABORT | ||
348 | #define BP_I2C_ENABLE_ACTIVE 0 | ||
349 | #define BM_I2C_ENABLE_ACTIVE 0x1 | ||
350 | #define BF_I2C_ENABLE_ACTIVE(v) (((v) & 0x1) << 0) | ||
351 | #define BFM_I2C_ENABLE_ACTIVE(v) BM_I2C_ENABLE_ACTIVE | ||
352 | #define BF_I2C_ENABLE_ACTIVE_V(e) BF_I2C_ENABLE_ACTIVE(BV_I2C_ENABLE_ACTIVE__##e) | ||
353 | #define BFM_I2C_ENABLE_ACTIVE_V(v) BM_I2C_ENABLE_ACTIVE | ||
354 | |||
355 | #define REG_I2C_STATUS(_n1) jz_reg(I2C_STATUS(_n1)) | ||
356 | #define JA_I2C_STATUS(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x70) | ||
357 | #define JT_I2C_STATUS(_n1) JIO_32_RW | ||
358 | #define JN_I2C_STATUS(_n1) I2C_STATUS | ||
359 | #define JI_I2C_STATUS(_n1) (_n1) | ||
360 | #define BP_I2C_STATUS_SLVACT 6 | ||
361 | #define BM_I2C_STATUS_SLVACT 0x40 | ||
362 | #define BF_I2C_STATUS_SLVACT(v) (((v) & 0x1) << 6) | ||
363 | #define BFM_I2C_STATUS_SLVACT(v) BM_I2C_STATUS_SLVACT | ||
364 | #define BF_I2C_STATUS_SLVACT_V(e) BF_I2C_STATUS_SLVACT(BV_I2C_STATUS_SLVACT__##e) | ||
365 | #define BFM_I2C_STATUS_SLVACT_V(v) BM_I2C_STATUS_SLVACT | ||
366 | #define BP_I2C_STATUS_MSTACT 5 | ||
367 | #define BM_I2C_STATUS_MSTACT 0x20 | ||
368 | #define BF_I2C_STATUS_MSTACT(v) (((v) & 0x1) << 5) | ||
369 | #define BFM_I2C_STATUS_MSTACT(v) BM_I2C_STATUS_MSTACT | ||
370 | #define BF_I2C_STATUS_MSTACT_V(e) BF_I2C_STATUS_MSTACT(BV_I2C_STATUS_MSTACT__##e) | ||
371 | #define BFM_I2C_STATUS_MSTACT_V(v) BM_I2C_STATUS_MSTACT | ||
372 | #define BP_I2C_STATUS_RFF 4 | ||
373 | #define BM_I2C_STATUS_RFF 0x10 | ||
374 | #define BF_I2C_STATUS_RFF(v) (((v) & 0x1) << 4) | ||
375 | #define BFM_I2C_STATUS_RFF(v) BM_I2C_STATUS_RFF | ||
376 | #define BF_I2C_STATUS_RFF_V(e) BF_I2C_STATUS_RFF(BV_I2C_STATUS_RFF__##e) | ||
377 | #define BFM_I2C_STATUS_RFF_V(v) BM_I2C_STATUS_RFF | ||
378 | #define BP_I2C_STATUS_RFNE 3 | ||
379 | #define BM_I2C_STATUS_RFNE 0x8 | ||
380 | #define BF_I2C_STATUS_RFNE(v) (((v) & 0x1) << 3) | ||
381 | #define BFM_I2C_STATUS_RFNE(v) BM_I2C_STATUS_RFNE | ||
382 | #define BF_I2C_STATUS_RFNE_V(e) BF_I2C_STATUS_RFNE(BV_I2C_STATUS_RFNE__##e) | ||
383 | #define BFM_I2C_STATUS_RFNE_V(v) BM_I2C_STATUS_RFNE | ||
384 | #define BP_I2C_STATUS_TFE 2 | ||
385 | #define BM_I2C_STATUS_TFE 0x4 | ||
386 | #define BF_I2C_STATUS_TFE(v) (((v) & 0x1) << 2) | ||
387 | #define BFM_I2C_STATUS_TFE(v) BM_I2C_STATUS_TFE | ||
388 | #define BF_I2C_STATUS_TFE_V(e) BF_I2C_STATUS_TFE(BV_I2C_STATUS_TFE__##e) | ||
389 | #define BFM_I2C_STATUS_TFE_V(v) BM_I2C_STATUS_TFE | ||
390 | #define BP_I2C_STATUS_TFNF 1 | ||
391 | #define BM_I2C_STATUS_TFNF 0x2 | ||
392 | #define BF_I2C_STATUS_TFNF(v) (((v) & 0x1) << 1) | ||
393 | #define BFM_I2C_STATUS_TFNF(v) BM_I2C_STATUS_TFNF | ||
394 | #define BF_I2C_STATUS_TFNF_V(e) BF_I2C_STATUS_TFNF(BV_I2C_STATUS_TFNF__##e) | ||
395 | #define BFM_I2C_STATUS_TFNF_V(v) BM_I2C_STATUS_TFNF | ||
396 | #define BP_I2C_STATUS_ACT 0 | ||
397 | #define BM_I2C_STATUS_ACT 0x1 | ||
398 | #define BF_I2C_STATUS_ACT(v) (((v) & 0x1) << 0) | ||
399 | #define BFM_I2C_STATUS_ACT(v) BM_I2C_STATUS_ACT | ||
400 | #define BF_I2C_STATUS_ACT_V(e) BF_I2C_STATUS_ACT(BV_I2C_STATUS_ACT__##e) | ||
401 | #define BFM_I2C_STATUS_ACT_V(v) BM_I2C_STATUS_ACT | ||
402 | |||
403 | #define REG_I2C_ENBST(_n1) jz_reg(I2C_ENBST(_n1)) | ||
404 | #define JA_I2C_ENBST(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x9c) | ||
405 | #define JT_I2C_ENBST(_n1) JIO_32_RW | ||
406 | #define JN_I2C_ENBST(_n1) I2C_ENBST | ||
407 | #define JI_I2C_ENBST(_n1) (_n1) | ||
408 | #define BP_I2C_ENBST_SLVRDLST 2 | ||
409 | #define BM_I2C_ENBST_SLVRDLST 0x4 | ||
410 | #define BF_I2C_ENBST_SLVRDLST(v) (((v) & 0x1) << 2) | ||
411 | #define BFM_I2C_ENBST_SLVRDLST(v) BM_I2C_ENBST_SLVRDLST | ||
412 | #define BF_I2C_ENBST_SLVRDLST_V(e) BF_I2C_ENBST_SLVRDLST(BV_I2C_ENBST_SLVRDLST__##e) | ||
413 | #define BFM_I2C_ENBST_SLVRDLST_V(v) BM_I2C_ENBST_SLVRDLST | ||
414 | #define BP_I2C_ENBST_SLVDISB 1 | ||
415 | #define BM_I2C_ENBST_SLVDISB 0x2 | ||
416 | #define BF_I2C_ENBST_SLVDISB(v) (((v) & 0x1) << 1) | ||
417 | #define BFM_I2C_ENBST_SLVDISB(v) BM_I2C_ENBST_SLVDISB | ||
418 | #define BF_I2C_ENBST_SLVDISB_V(e) BF_I2C_ENBST_SLVDISB(BV_I2C_ENBST_SLVDISB__##e) | ||
419 | #define BFM_I2C_ENBST_SLVDISB_V(v) BM_I2C_ENBST_SLVDISB | ||
420 | #define BP_I2C_ENBST_ACTIVE 0 | ||
421 | #define BM_I2C_ENBST_ACTIVE 0x1 | ||
422 | #define BF_I2C_ENBST_ACTIVE(v) (((v) & 0x1) << 0) | ||
423 | #define BFM_I2C_ENBST_ACTIVE(v) BM_I2C_ENBST_ACTIVE | ||
424 | #define BF_I2C_ENBST_ACTIVE_V(e) BF_I2C_ENBST_ACTIVE(BV_I2C_ENBST_ACTIVE__##e) | ||
425 | #define BFM_I2C_ENBST_ACTIVE_V(v) BM_I2C_ENBST_ACTIVE | ||
426 | |||
427 | #define REG_I2C_TAR(_n1) jz_reg(I2C_TAR(_n1)) | ||
428 | #define JA_I2C_TAR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x4) | ||
429 | #define JT_I2C_TAR(_n1) JIO_32_RW | ||
430 | #define JN_I2C_TAR(_n1) I2C_TAR | ||
431 | #define JI_I2C_TAR(_n1) (_n1) | ||
432 | #define BP_I2C_TAR_ADDR 0 | ||
433 | #define BM_I2C_TAR_ADDR 0x3ff | ||
434 | #define BF_I2C_TAR_ADDR(v) (((v) & 0x3ff) << 0) | ||
435 | #define BFM_I2C_TAR_ADDR(v) BM_I2C_TAR_ADDR | ||
436 | #define BF_I2C_TAR_ADDR_V(e) BF_I2C_TAR_ADDR(BV_I2C_TAR_ADDR__##e) | ||
437 | #define BFM_I2C_TAR_ADDR_V(v) BM_I2C_TAR_ADDR | ||
438 | #define BP_I2C_TAR_10BITS 12 | ||
439 | #define BM_I2C_TAR_10BITS 0x1000 | ||
440 | #define BF_I2C_TAR_10BITS(v) (((v) & 0x1) << 12) | ||
441 | #define BFM_I2C_TAR_10BITS(v) BM_I2C_TAR_10BITS | ||
442 | #define BF_I2C_TAR_10BITS_V(e) BF_I2C_TAR_10BITS(BV_I2C_TAR_10BITS__##e) | ||
443 | #define BFM_I2C_TAR_10BITS_V(v) BM_I2C_TAR_10BITS | ||
444 | #define BP_I2C_TAR_SPECIAL 11 | ||
445 | #define BM_I2C_TAR_SPECIAL 0x800 | ||
446 | #define BF_I2C_TAR_SPECIAL(v) (((v) & 0x1) << 11) | ||
447 | #define BFM_I2C_TAR_SPECIAL(v) BM_I2C_TAR_SPECIAL | ||
448 | #define BF_I2C_TAR_SPECIAL_V(e) BF_I2C_TAR_SPECIAL(BV_I2C_TAR_SPECIAL__##e) | ||
449 | #define BFM_I2C_TAR_SPECIAL_V(v) BM_I2C_TAR_SPECIAL | ||
450 | #define BP_I2C_TAR_GC_OR_START 10 | ||
451 | #define BM_I2C_TAR_GC_OR_START 0x400 | ||
452 | #define BF_I2C_TAR_GC_OR_START(v) (((v) & 0x1) << 10) | ||
453 | #define BFM_I2C_TAR_GC_OR_START(v) BM_I2C_TAR_GC_OR_START | ||
454 | #define BF_I2C_TAR_GC_OR_START_V(e) BF_I2C_TAR_GC_OR_START(BV_I2C_TAR_GC_OR_START__##e) | ||
455 | #define BFM_I2C_TAR_GC_OR_START_V(v) BM_I2C_TAR_GC_OR_START | ||
456 | |||
457 | #define REG_I2C_SAR(_n1) jz_reg(I2C_SAR(_n1)) | ||
458 | #define JA_I2C_SAR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x8) | ||
459 | #define JT_I2C_SAR(_n1) JIO_32_RW | ||
460 | #define JN_I2C_SAR(_n1) I2C_SAR | ||
461 | #define JI_I2C_SAR(_n1) (_n1) | ||
462 | |||
463 | #define REG_I2C_SHCNT(_n1) jz_reg(I2C_SHCNT(_n1)) | ||
464 | #define JA_I2C_SHCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x14) | ||
465 | #define JT_I2C_SHCNT(_n1) JIO_32_RW | ||
466 | #define JN_I2C_SHCNT(_n1) I2C_SHCNT | ||
467 | #define JI_I2C_SHCNT(_n1) (_n1) | ||
468 | |||
469 | #define REG_I2C_SLCNT(_n1) jz_reg(I2C_SLCNT(_n1)) | ||
470 | #define JA_I2C_SLCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x18) | ||
471 | #define JT_I2C_SLCNT(_n1) JIO_32_RW | ||
472 | #define JN_I2C_SLCNT(_n1) I2C_SLCNT | ||
473 | #define JI_I2C_SLCNT(_n1) (_n1) | ||
474 | |||
475 | #define REG_I2C_FHCNT(_n1) jz_reg(I2C_FHCNT(_n1)) | ||
476 | #define JA_I2C_FHCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x1c) | ||
477 | #define JT_I2C_FHCNT(_n1) JIO_32_RW | ||
478 | #define JN_I2C_FHCNT(_n1) I2C_FHCNT | ||
479 | #define JI_I2C_FHCNT(_n1) (_n1) | ||
480 | |||
481 | #define REG_I2C_FLCNT(_n1) jz_reg(I2C_FLCNT(_n1)) | ||
482 | #define JA_I2C_FLCNT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x20) | ||
483 | #define JT_I2C_FLCNT(_n1) JIO_32_RW | ||
484 | #define JN_I2C_FLCNT(_n1) I2C_FLCNT | ||
485 | #define JI_I2C_FLCNT(_n1) (_n1) | ||
486 | |||
487 | #define REG_I2C_RXTL(_n1) jz_reg(I2C_RXTL(_n1)) | ||
488 | #define JA_I2C_RXTL(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x38) | ||
489 | #define JT_I2C_RXTL(_n1) JIO_32_RW | ||
490 | #define JN_I2C_RXTL(_n1) I2C_RXTL | ||
491 | #define JI_I2C_RXTL(_n1) (_n1) | ||
492 | |||
493 | #define REG_I2C_TXTL(_n1) jz_reg(I2C_TXTL(_n1)) | ||
494 | #define JA_I2C_TXTL(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x3c) | ||
495 | #define JT_I2C_TXTL(_n1) JIO_32_RW | ||
496 | #define JN_I2C_TXTL(_n1) I2C_TXTL | ||
497 | #define JI_I2C_TXTL(_n1) (_n1) | ||
498 | |||
499 | #define REG_I2C_TXFLR(_n1) jz_reg(I2C_TXFLR(_n1)) | ||
500 | #define JA_I2C_TXFLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x74) | ||
501 | #define JT_I2C_TXFLR(_n1) JIO_32_RW | ||
502 | #define JN_I2C_TXFLR(_n1) I2C_TXFLR | ||
503 | #define JI_I2C_TXFLR(_n1) (_n1) | ||
504 | |||
505 | #define REG_I2C_RXFLR(_n1) jz_reg(I2C_RXFLR(_n1)) | ||
506 | #define JA_I2C_RXFLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x78) | ||
507 | #define JT_I2C_RXFLR(_n1) JIO_32_RW | ||
508 | #define JN_I2C_RXFLR(_n1) I2C_RXFLR | ||
509 | #define JI_I2C_RXFLR(_n1) (_n1) | ||
510 | |||
511 | #define REG_I2C_SDAHD(_n1) jz_reg(I2C_SDAHD(_n1)) | ||
512 | #define JA_I2C_SDAHD(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x7c) | ||
513 | #define JT_I2C_SDAHD(_n1) JIO_32_RW | ||
514 | #define JN_I2C_SDAHD(_n1) I2C_SDAHD | ||
515 | #define JI_I2C_SDAHD(_n1) (_n1) | ||
516 | |||
517 | #define REG_I2C_ABTSRC(_n1) jz_reg(I2C_ABTSRC(_n1)) | ||
518 | #define JA_I2C_ABTSRC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x80) | ||
519 | #define JT_I2C_ABTSRC(_n1) JIO_32_RW | ||
520 | #define JN_I2C_ABTSRC(_n1) I2C_ABTSRC | ||
521 | #define JI_I2C_ABTSRC(_n1) (_n1) | ||
522 | |||
523 | #define REG_I2C_DMACR(_n1) jz_reg(I2C_DMACR(_n1)) | ||
524 | #define JA_I2C_DMACR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x88) | ||
525 | #define JT_I2C_DMACR(_n1) JIO_32_RW | ||
526 | #define JN_I2C_DMACR(_n1) I2C_DMACR | ||
527 | #define JI_I2C_DMACR(_n1) (_n1) | ||
528 | |||
529 | #define REG_I2C_DMATDLR(_n1) jz_reg(I2C_DMATDLR(_n1)) | ||
530 | #define JA_I2C_DMATDLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x8c) | ||
531 | #define JT_I2C_DMATDLR(_n1) JIO_32_RW | ||
532 | #define JN_I2C_DMATDLR(_n1) I2C_DMATDLR | ||
533 | #define JI_I2C_DMATDLR(_n1) (_n1) | ||
534 | |||
535 | #define REG_I2C_DMARDLR(_n1) jz_reg(I2C_DMARDLR(_n1)) | ||
536 | #define JA_I2C_DMARDLR(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x90) | ||
537 | #define JT_I2C_DMARDLR(_n1) JIO_32_RW | ||
538 | #define JN_I2C_DMARDLR(_n1) I2C_DMARDLR | ||
539 | #define JI_I2C_DMARDLR(_n1) (_n1) | ||
540 | |||
541 | #define REG_I2C_SDASU(_n1) jz_reg(I2C_SDASU(_n1)) | ||
542 | #define JA_I2C_SDASU(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x94) | ||
543 | #define JT_I2C_SDASU(_n1) JIO_32_RW | ||
544 | #define JN_I2C_SDASU(_n1) I2C_SDASU | ||
545 | #define JI_I2C_SDASU(_n1) (_n1) | ||
546 | |||
547 | #define REG_I2C_ACKGC(_n1) jz_reg(I2C_ACKGC(_n1)) | ||
548 | #define JA_I2C_ACKGC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x98) | ||
549 | #define JT_I2C_ACKGC(_n1) JIO_32_RW | ||
550 | #define JN_I2C_ACKGC(_n1) I2C_ACKGC | ||
551 | #define JI_I2C_ACKGC(_n1) (_n1) | ||
552 | |||
553 | #define REG_I2C_FLT(_n1) jz_reg(I2C_FLT(_n1)) | ||
554 | #define JA_I2C_FLT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0xa0) | ||
555 | #define JT_I2C_FLT(_n1) JIO_32_RW | ||
556 | #define JN_I2C_FLT(_n1) I2C_FLT | ||
557 | #define JI_I2C_FLT(_n1) (_n1) | ||
558 | |||
559 | #define REG_I2C_CINT(_n1) jz_reg(I2C_CINT(_n1)) | ||
560 | #define JA_I2C_CINT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x40) | ||
561 | #define JT_I2C_CINT(_n1) JIO_32_RW | ||
562 | #define JN_I2C_CINT(_n1) I2C_CINT | ||
563 | #define JI_I2C_CINT(_n1) (_n1) | ||
564 | |||
565 | #define REG_I2C_CRXUF(_n1) jz_reg(I2C_CRXUF(_n1)) | ||
566 | #define JA_I2C_CRXUF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x44) | ||
567 | #define JT_I2C_CRXUF(_n1) JIO_32_RW | ||
568 | #define JN_I2C_CRXUF(_n1) I2C_CRXUF | ||
569 | #define JI_I2C_CRXUF(_n1) (_n1) | ||
570 | |||
571 | #define REG_I2C_CRXOF(_n1) jz_reg(I2C_CRXOF(_n1)) | ||
572 | #define JA_I2C_CRXOF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x48) | ||
573 | #define JT_I2C_CRXOF(_n1) JIO_32_RW | ||
574 | #define JN_I2C_CRXOF(_n1) I2C_CRXOF | ||
575 | #define JI_I2C_CRXOF(_n1) (_n1) | ||
576 | |||
577 | #define REG_I2C_CTXOF(_n1) jz_reg(I2C_CTXOF(_n1)) | ||
578 | #define JA_I2C_CTXOF(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x4c) | ||
579 | #define JT_I2C_CTXOF(_n1) JIO_32_RW | ||
580 | #define JN_I2C_CTXOF(_n1) I2C_CTXOF | ||
581 | #define JI_I2C_CTXOF(_n1) (_n1) | ||
582 | |||
583 | #define REG_I2C_CRXREQ(_n1) jz_reg(I2C_CRXREQ(_n1)) | ||
584 | #define JA_I2C_CRXREQ(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x50) | ||
585 | #define JT_I2C_CRXREQ(_n1) JIO_32_RW | ||
586 | #define JN_I2C_CRXREQ(_n1) I2C_CRXREQ | ||
587 | #define JI_I2C_CRXREQ(_n1) (_n1) | ||
588 | |||
589 | #define REG_I2C_CTXABT(_n1) jz_reg(I2C_CTXABT(_n1)) | ||
590 | #define JA_I2C_CTXABT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x54) | ||
591 | #define JT_I2C_CTXABT(_n1) JIO_32_RW | ||
592 | #define JN_I2C_CTXABT(_n1) I2C_CTXABT | ||
593 | #define JI_I2C_CTXABT(_n1) (_n1) | ||
594 | |||
595 | #define REG_I2C_CRXDN(_n1) jz_reg(I2C_CRXDN(_n1)) | ||
596 | #define JA_I2C_CRXDN(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x58) | ||
597 | #define JT_I2C_CRXDN(_n1) JIO_32_RW | ||
598 | #define JN_I2C_CRXDN(_n1) I2C_CRXDN | ||
599 | #define JI_I2C_CRXDN(_n1) (_n1) | ||
600 | |||
601 | #define REG_I2C_CACT(_n1) jz_reg(I2C_CACT(_n1)) | ||
602 | #define JA_I2C_CACT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x5c) | ||
603 | #define JT_I2C_CACT(_n1) JIO_32_RW | ||
604 | #define JN_I2C_CACT(_n1) I2C_CACT | ||
605 | #define JI_I2C_CACT(_n1) (_n1) | ||
606 | |||
607 | #define REG_I2C_CSTP(_n1) jz_reg(I2C_CSTP(_n1)) | ||
608 | #define JA_I2C_CSTP(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x60) | ||
609 | #define JT_I2C_CSTP(_n1) JIO_32_RW | ||
610 | #define JN_I2C_CSTP(_n1) I2C_CSTP | ||
611 | #define JI_I2C_CSTP(_n1) (_n1) | ||
612 | |||
613 | #define REG_I2C_CSTT(_n1) jz_reg(I2C_CSTT(_n1)) | ||
614 | #define JA_I2C_CSTT(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x64) | ||
615 | #define JT_I2C_CSTT(_n1) JIO_32_RW | ||
616 | #define JN_I2C_CSTT(_n1) I2C_CSTT | ||
617 | #define JI_I2C_CSTT(_n1) (_n1) | ||
618 | |||
619 | #define REG_I2C_CGC(_n1) jz_reg(I2C_CGC(_n1)) | ||
620 | #define JA_I2C_CGC(_n1) (0xb0050000 + (_n1) * 0x1000 + 0x68) | ||
621 | #define JT_I2C_CGC(_n1) JIO_32_RW | ||
622 | #define JN_I2C_CGC(_n1) I2C_CGC | ||
623 | #define JI_I2C_CGC(_n1) (_n1) | ||
624 | |||
625 | #endif /* __HEADERGEN_I2C_H__*/ | ||