diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/x1000/ddrc_apb.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/x1000/ddrc_apb.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/x1000/ddrc_apb.h b/firmware/target/mips/ingenic_x1000/x1000/ddrc_apb.h new file mode 100644 index 0000000000..bcb880624f --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/x1000/ddrc_apb.h | |||
@@ -0,0 +1,41 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 3.0.0 | ||
10 | * x1000 version: 1.0 | ||
11 | * x1000 authors: Aidan MacDonald | ||
12 | * | ||
13 | * Copyright (C) 2015 by the authors | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or | ||
16 | * modify it under the terms of the GNU General Public License | ||
17 | * as published by the Free Software Foundation; either version 2 | ||
18 | * of the License, or (at your option) any later version. | ||
19 | * | ||
20 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
21 | * KIND, either express or implied. | ||
22 | * | ||
23 | ****************************************************************************/ | ||
24 | #ifndef __HEADERGEN_DDRC_APB_H__ | ||
25 | #define __HEADERGEN_DDRC_APB_H__ | ||
26 | |||
27 | #include "macro.h" | ||
28 | |||
29 | #define REG_DDRC_APB_CLKSTP_CFG jz_reg(DDRC_APB_CLKSTP_CFG) | ||
30 | #define JA_DDRC_APB_CLKSTP_CFG (0xb3012000 + 0x68) | ||
31 | #define JT_DDRC_APB_CLKSTP_CFG JIO_32_RW | ||
32 | #define JN_DDRC_APB_CLKSTP_CFG DDRC_APB_CLKSTP_CFG | ||
33 | #define JI_DDRC_APB_CLKSTP_CFG | ||
34 | |||
35 | #define REG_DDRC_APB_PHYRST_CFG jz_reg(DDRC_APB_PHYRST_CFG) | ||
36 | #define JA_DDRC_APB_PHYRST_CFG (0xb3012000 + 0x80) | ||
37 | #define JT_DDRC_APB_PHYRST_CFG JIO_32_RW | ||
38 | #define JN_DDRC_APB_PHYRST_CFG DDRC_APB_PHYRST_CFG | ||
39 | #define JI_DDRC_APB_PHYRST_CFG | ||
40 | |||
41 | #endif /* __HEADERGEN_DDRC_APB_H__*/ | ||