2 files changed, 4 insertions, 4 deletions

diff --git a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
index c973dc2c40..4a88dc92b0 100644
--- a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
+++ b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S
@@ -70,13 +70,13 @@ lcd_write_data:
 
     lea     0xf0008002, %a1
 .loop:
-    /* When running in IRAM, this loop takes 7 cycles plus the LCD write.
-       The 7 cycles are necessary to follow the LCD timing specs
+    /* When running in IRAM, this loop takes 10 cycles plus the LCD write.
+       The 10 cycles are necessary to follow the LCD timing specs
        at 140MHz */
+    nop                     /* 3(0/0) */
     move.b  (%a0)+, %d1     /* 3(1/0) */
     move.w  %d1, (%a1)      /* 1(0/1) */
     subq.l  #1, %d0         /* 1(0/0) */
-    nop                     /* 1(0/0) */
     bne     .loop           /* 2(0/0) */
     rts
 .wd_end:
diff --git a/firmware/target/coldfire/iaudio/system-iaudio.c b/firmware/target/coldfire/iaudio/system-iaudio.c
index 4e32d360fa..c04d4ffc2d 100644
--- a/firmware/target/coldfire/iaudio/system-iaudio.c
+++ b/firmware/target/coldfire/iaudio/system-iaudio.c
@@ -71,7 +71,7 @@ void cf_set_cpu_frequency(long frequency)
         RECALC_DELAYS(CPUFREQ_MAX);
         PLLCR = 0x0102c049 | (PLLCR & 0x70C00000);
         CSCR0 = 0x00001180; /* Flash: 4 wait states */
-        CSCR1 = 0x00000980; /* LCD: 2 wait states */
+        CSCR1 = 0x00001180; /* LCD: 4 wait states */
         while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
                                             This may take up to 10ms! */
         timers_adjust_prescale(CPUFREQ_MAX_MULT, true);