diff options
author | Jens Arnold <amiconn@rockbox.org> | 2007-10-15 21:16:50 +0000 |
---|---|---|
committer | Jens Arnold <amiconn@rockbox.org> | 2007-10-15 21:16:50 +0000 |
commit | b85b6be3aa05510a1aca173a6f5a762c4448fdae (patch) | |
tree | 7d6b3571c1f0572c4ae6e99fce885493b5664e37 /firmware/target/coldfire/iaudio | |
parent | c08c081211d1eba8115569af9eaeae60e7cf4a9b (diff) | |
download | rockbox-b85b6be3aa05510a1aca173a6f5a762c4448fdae.tar.gz rockbox-b85b6be3aa05510a1aca173a6f5a762c4448fdae.zip |
Coldfire targets: enable buffered writes by default. Speeds up all sorts of I/O that writes to ports: LCD update (except the functions using DMA on H300), ATA writes, .... Some timings had to be adjusted for the new configuration.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15129 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/coldfire/iaudio')
-rw-r--r-- | firmware/target/coldfire/iaudio/m5/lcd-as-m5.S | 6 | ||||
-rw-r--r-- | firmware/target/coldfire/iaudio/system-iaudio.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S index c973dc2c40..4a88dc92b0 100644 --- a/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S +++ b/firmware/target/coldfire/iaudio/m5/lcd-as-m5.S | |||
@@ -70,13 +70,13 @@ lcd_write_data: | |||
70 | 70 | ||
71 | lea 0xf0008002, %a1 | 71 | lea 0xf0008002, %a1 |
72 | .loop: | 72 | .loop: |
73 | /* When running in IRAM, this loop takes 7 cycles plus the LCD write. | 73 | /* When running in IRAM, this loop takes 10 cycles plus the LCD write. |
74 | The 7 cycles are necessary to follow the LCD timing specs | 74 | The 10 cycles are necessary to follow the LCD timing specs |
75 | at 140MHz */ | 75 | at 140MHz */ |
76 | nop /* 3(0/0) */ | ||
76 | move.b (%a0)+, %d1 /* 3(1/0) */ | 77 | move.b (%a0)+, %d1 /* 3(1/0) */ |
77 | move.w %d1, (%a1) /* 1(0/1) */ | 78 | move.w %d1, (%a1) /* 1(0/1) */ |
78 | subq.l #1, %d0 /* 1(0/0) */ | 79 | subq.l #1, %d0 /* 1(0/0) */ |
79 | nop /* 1(0/0) */ | ||
80 | bne .loop /* 2(0/0) */ | 80 | bne .loop /* 2(0/0) */ |
81 | rts | 81 | rts |
82 | .wd_end: | 82 | .wd_end: |
diff --git a/firmware/target/coldfire/iaudio/system-iaudio.c b/firmware/target/coldfire/iaudio/system-iaudio.c index 4e32d360fa..c04d4ffc2d 100644 --- a/firmware/target/coldfire/iaudio/system-iaudio.c +++ b/firmware/target/coldfire/iaudio/system-iaudio.c | |||
@@ -71,7 +71,7 @@ void cf_set_cpu_frequency(long frequency) | |||
71 | RECALC_DELAYS(CPUFREQ_MAX); | 71 | RECALC_DELAYS(CPUFREQ_MAX); |
72 | PLLCR = 0x0102c049 | (PLLCR & 0x70C00000); | 72 | PLLCR = 0x0102c049 | (PLLCR & 0x70C00000); |
73 | CSCR0 = 0x00001180; /* Flash: 4 wait states */ | 73 | CSCR0 = 0x00001180; /* Flash: 4 wait states */ |
74 | CSCR1 = 0x00000980; /* LCD: 2 wait states */ | 74 | CSCR1 = 0x00001180; /* LCD: 4 wait states */ |
75 | while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. | 75 | while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. |
76 | This may take up to 10ms! */ | 76 | This may take up to 10ms! */ |
77 | timers_adjust_prescale(CPUFREQ_MAX_MULT, true); | 77 | timers_adjust_prescale(CPUFREQ_MAX_MULT, true); |