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Diffstat (limited to 'firmware/target/arm/tms320dm320/system-dm320.c')
-rw-r--r--firmware/target/arm/tms320dm320/system-dm320.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/firmware/target/arm/tms320dm320/system-dm320.c b/firmware/target/arm/tms320dm320/system-dm320.c
index d1f2ff1684..434b0065a5 100644
--- a/firmware/target/arm/tms320dm320/system-dm320.c
+++ b/firmware/target/arm/tms320dm320/system-dm320.c
@@ -102,7 +102,7 @@ static const unsigned short const irqpriority[] =
102 IRQ_ICE,IRQ_ARMCOM_RX,IRQ_ARMCOM_TX,IRQ_RESERVED 102 IRQ_ICE,IRQ_ARMCOM_RX,IRQ_ARMCOM_TX,IRQ_RESERVED
103}; /* IRQ priorities, ranging from highest to lowest */ 103}; /* IRQ priorities, ranging from highest to lowest */
104 104
105static void (* const irqvector[])(void) = 105static void (* const irqvector[])(void) __attribute__ ((section(".idata"))) =
106{ 106{
107 TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1, 107 TIMER0,TIMER1,TIMER2,TIMER3,CCD_VD0,CCD_VD1,
108 CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT, 108 CCD_WEN,VENC,SERIAL0,SERIAL1,EXT_HOST,DSPHINT,
@@ -222,11 +222,16 @@ void system_init(void)
222 222
223 /* setup the clocks */ 223 /* setup the clocks */
224 IO_CLK_DIV0=0x0003; 224 IO_CLK_DIV0=0x0003;
225
226 /* SDRAM Divide by 3 */
225 IO_CLK_DIV1=0x0102; 227 IO_CLK_DIV1=0x0102;
226 IO_CLK_DIV2=0x021F; 228 IO_CLK_DIV2=0x021F;
227 IO_CLK_DIV3=0x1FFF; 229 IO_CLK_DIV3=0x1FFF;
228 IO_CLK_DIV4=0x1F00; 230 IO_CLK_DIV4=0x1F00;
229 231
232 /* 27 MHz input clock:
233 * PLLA = 27*11/1
234 */
230 IO_CLK_PLLA=0x80A0; 235 IO_CLK_PLLA=0x80A0;
231 IO_CLK_PLLB=0x80C0; 236 IO_CLK_PLLB=0x80C0;
232 237
@@ -286,6 +291,7 @@ void system_init(void)
286 ttb_init(); 291 ttb_init();
287 /* Make sure everything is mapped on itself */ 292 /* Make sure everything is mapped on itself */
288 map_section(0, 0, 0x1000, CACHE_NONE); 293 map_section(0, 0, 0x1000, CACHE_NONE);
294
289 /* Enable caching for RAM */ 295 /* Enable caching for RAM */
290 map_section(CONFIG_SDRAM_START, CONFIG_SDRAM_START, MEM, CACHE_ALL); 296 map_section(CONFIG_SDRAM_START, CONFIG_SDRAM_START, MEM, CACHE_ALL);
291 /* enable buffered writing for the framebuffer */ 297 /* enable buffered writing for the framebuffer */