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Diffstat (limited to 'firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c')
-rw-r--r--firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c38
1 files changed, 25 insertions, 13 deletions
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
index 1fbc1ce60f..06a501179d 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/usb-mr500.c
@@ -30,32 +30,44 @@
30void usb_init_device(void) { 30void usb_init_device(void) {
31 logf("mxx: SOC Init"); 31 logf("mxx: SOC Init");
32 32
33 /* The EMIF timing that is currently used may not be apropriate when the 33 /* The following EMIF timing values are from the OF:
34 * device is boosted. The following values were used with sucess too:
35 * IO_EMIF_CS4CTRL1 = 0x66AB; 34 * IO_EMIF_CS4CTRL1 = 0x66AB;
36 * IO_EMIF_CS4CTRL2 = 0x4220; 35 * IO_EMIF_CS4CTRL2 = 0x4220;
36 *
37 * These EMIF timing values are more agressive, but appear to work as long
38 * as USB_TRANS_BLOCK is defined in the USB driver:
39 * IO_EMIF_CS4CTRL1 = 0x2245;
40 * IO_EMIF_CS4CTRL2 = 0x4110;
41 *
42 * When USB_TRANS_BLOCK is not defined the USB driver does not work unless
43 * the values from the OF are used.
37 */ 44 */
45
38 IO_EMIF_CS4CTRL1 = 0x2245; 46 IO_EMIF_CS4CTRL1 = 0x2245;
39 IO_EMIF_CS4CTRL2 = 0x4110; 47 IO_EMIF_CS4CTRL2 = 0x4110;
40 48
41 IO_GIO_DIR0 &= ~(1<<2); 49 /* Setup the m66591 reset signal */
42 IO_GIO_INV0 &= ~(1<<2); 50 IO_GIO_DIR0 &= ~(1<<2); /* output */
43 IO_GIO_FSEL0 &= ~(0x03); 51 IO_GIO_INV0 &= ~(1<<2); /* non-inverted */
52 IO_GIO_FSEL0 &= ~(0x03); /* normal pins */
53
54 /* Setup the m66591 interrupt signal */
55 IO_GIO_DIR0 |= 1<<3; /* input */
56 IO_GIO_INV0 &= ~(1<<3); /* non-inverted */
57 IO_GIO_IRQPORT |= 1<<3; /* enable EIRQ */
58
59 udelay(100);
44 60
45 /* Drive the reset pin low */ 61 /* Drive the reset pin low */
46 IO_GIO_BITCLR0 = 1<<2; 62 IO_GIO_BITCLR0 = 1<<2;
47 63
48 /* Wait a bit */ 64 /* Wait a bit */
49 udelay(3); 65 udelay(100);
50 66
51 /* Release the reset (drive it high) */ 67 /* Release the reset (drive it high) */
52 IO_GIO_BITSET0 = 1<<2; 68 IO_GIO_BITSET0 = 1<<2;
53
54 udelay(300);
55 69
56 IO_GIO_DIR0 |= 1<<3; 70 udelay(500);
57 IO_GIO_INV0 &= ~(1<<3);
58 IO_GIO_IRQPORT |= 1<<3;
59 71
60 /* Enable the MXX interrupt */ 72 /* Enable the MXX interrupt */
61 IO_INTC_EINT1 |= (1<<8); /* IRQ_GIO3 */ 73 IO_INTC_EINT1 |= (1<<8); /* IRQ_GIO3 */