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path: root/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
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Diffstat (limited to 'firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c')
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c106
1 files changed, 52 insertions, 54 deletions
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
index 2d75b1ffa6..a2634f0de7 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
@@ -27,6 +27,7 @@
27#include "spi.h" 27#include "spi.h"
28#include "spi-target.h" 28#include "spi-target.h"
29#include "lcd-target.h" 29#include "lcd-target.h"
30#include "ltv350qv.h"
30 31
31/* Power and display status */ 32/* Power and display status */
32static bool display_on = false; /* Is the display turned on? */ 33static bool display_on = false; /* Is the display turned on? */
@@ -85,13 +86,10 @@ static void enable_venc(bool enable)
85/* LTV250QV panel functions */ 86/* LTV250QV panel functions */
86static void lcd_write_reg(unsigned char reg, unsigned short val) 87static void lcd_write_reg(unsigned char reg, unsigned short val)
87{ 88{
88 unsigned char block[3]; 89 unsigned char block[3] = {LTV_OPC_INDEX, 0, reg | 0xFF};
89 block[0] = 0x74;
90 block[1] = 0;
91 block[2] = reg | 0xFF;
92 spi_block_transfer(SPI_target_LTV250QV, block, sizeof(block), NULL, 0); 90 spi_block_transfer(SPI_target_LTV250QV, block, sizeof(block), NULL, 0);
93 block[0] = 0x76; 91 block[0] = LTV_OPC_DATA;
94 block[1] = (val >> 8) & 0xFF; 92 block[1] = val >> 8;
95 block[2] = val & 0xFF; 93 block[2] = val & 0xFF;
96 spi_block_transfer(SPI_target_LTV250QV, block, sizeof(block), NULL, 0); 94 spi_block_transfer(SPI_target_LTV250QV, block, sizeof(block), NULL, 0);
97} 95}
@@ -128,57 +126,57 @@ static void lcd_display_on(bool reset)
128 IO_GIO_BITSET2 = (1 << 8); 126 IO_GIO_BITSET2 = (1 << 8);
129 sleep_ms(1); 127 sleep_ms(1);
130 128
131 lcd_write_reg(1, 0x1D); 129 lcd_write_reg(LTV_IFCTL, LTV_NL(29));
132 lcd_write_reg(2, 0x0); 130 lcd_write_reg(LTV_DATACTL, 0);
133 lcd_write_reg(3, 0x0); 131 lcd_write_reg(LTV_ENTRY_MODE,0);
134 lcd_write_reg(4, 0x0); 132 lcd_write_reg(LTV_GATECTL1, 0);
135 lcd_write_reg(5, 0x40A3); 133 lcd_write_reg(LTV_GATECTL2, (LTV_NW_INV_1LINE | LTV_FHN | LTV_FTI(2) | LTV_FWI(3)));
136 lcd_write_reg(6, 0x0); 134 lcd_write_reg(LTV_VBP, 0);
137 lcd_write_reg(7, 0x0); 135 lcd_write_reg(LTV_HBP, 0);
138 lcd_write_reg(8, 0x0); 136 lcd_write_reg(LTV_SOTCTL, 0);
139 lcd_write_reg(9, 0x0); 137 lcd_write_reg(LTV_PWRCTL1, 0);
140 lcd_write_reg(10, 0x0); 138 lcd_write_reg(LTV_PWRCTL2, 0);
141 lcd_write_reg(16, 0x0); 139 lcd_write_reg(LTV_GAMMA(0), 0);
142 lcd_write_reg(17, 0x0); 140 lcd_write_reg(LTV_GAMMA(1), 0);
143 lcd_write_reg(18, 0x0); 141 lcd_write_reg(LTV_GAMMA(2), 0);
144 lcd_write_reg(19, 0x0); 142 lcd_write_reg(LTV_GAMMA(3), 0);
145 lcd_write_reg(20, 0x0); 143 lcd_write_reg(LTV_GAMMA(4), 0);
146 lcd_write_reg(21, 0x0); 144 lcd_write_reg(LTV_GAMMA(5), 0);
147 lcd_write_reg(22, 0x0); 145 lcd_write_reg(LTV_GAMMA(6), 0);
148 lcd_write_reg(23, 0x0); 146 lcd_write_reg(LTV_GAMMA(7), 0);
149 lcd_write_reg(24, 0x0); 147 lcd_write_reg(LTV_GAMMA(8), 0);
150 lcd_write_reg(25, 0x0); 148 lcd_write_reg(LTV_GAMMA(9), 0);
151 sleep_ms(10); 149 sleep_ms(10);
152 150
153 lcd_write_reg(9, 0x4055); 151 lcd_write_reg(LTV_PWRCTL1, (LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) | LTV_SUPPLY_CURRENT(5)));
154 lcd_write_reg(10, 0x0); 152 lcd_write_reg(LTV_PWRCTL2, 0);
155 sleep_ms(40); 153 sleep_ms(40);
156 154
157 lcd_write_reg(10, 0x2000); 155 lcd_write_reg(LTV_PWRCTL2, LTV_VCOML_ENABLE);
158 sleep_ms(40); 156 sleep_ms(40);
159 157
160 lcd_write_reg(1, 0x401D); 158 lcd_write_reg(LTV_IFCTL, (LTV_NMD | LTV_NL(29)));
161 lcd_write_reg(2, 0x204); 159 lcd_write_reg(LTV_DATACTL, (LTV_DS_SAME | LTV_CHS_480 | LTV_DF_RGB | LTV_RGB_BGR));
162 lcd_write_reg(3, 0x100); 160 lcd_write_reg(LTV_ENTRY_MODE,(LTV_VSPL_ACTIVE_LOW | LTV_HSPL_ACTIVE_LOW | LTV_DPL_SAMPLE_RISING | LTV_EPL_ACTIVE_LOW | LTV_SS_RIGHT_TO_LEFT));
163 lcd_write_reg(4, 0x1000); 161 lcd_write_reg(LTV_GATECTL1, LTV_CLW(1));
164 lcd_write_reg(5, 0x5033); 162 lcd_write_reg(LTV_GATECTL2, (LTV_NW_INV_1LINE | LTV_DSC | LTV_FTI(3) | LTV_FWI(3)));
165 lcd_write_reg(6, 0x5); 163 lcd_write_reg(LTV_VBP, 0x5);
166 lcd_write_reg(7, 0x1B); 164 lcd_write_reg(LTV_HBP, 0x1B);
167 lcd_write_reg(8, 0x800); 165 lcd_write_reg(LTV_SOTCTL, LTV_SDT(2));
168 lcd_write_reg(16, 0x203); 166 lcd_write_reg(LTV_GAMMA(0), 0x203);
169 lcd_write_reg(17, 0x302); 167 lcd_write_reg(LTV_GAMMA(1), 0x302);
170 lcd_write_reg(18, 0xC08); 168 lcd_write_reg(LTV_GAMMA(2), 0xC08);
171 lcd_write_reg(19, 0xC08); 169 lcd_write_reg(LTV_GAMMA(3), 0xC08);
172 lcd_write_reg(20, 0x707); 170 lcd_write_reg(LTV_GAMMA(4), 0x707);
173 lcd_write_reg(21, 0x707); 171 lcd_write_reg(LTV_GAMMA(5), 0x707);
174 lcd_write_reg(22, 0x104); 172 lcd_write_reg(LTV_GAMMA(6), 0x104);
175 lcd_write_reg(23, 0x306); 173 lcd_write_reg(LTV_GAMMA(7), 0x306);
176 lcd_write_reg(24, 0x0); 174 lcd_write_reg(LTV_GAMMA(8), 0);
177 lcd_write_reg(25, 0x0); 175 lcd_write_reg(LTV_GAMMA(9), 0);
178 sleep_ms(60); 176 sleep_ms(60);
179 177
180 lcd_write_reg(9, 0xA55); 178 lcd_write_reg(LTV_PWRCTL1, (LTV_VCOMOUT_ENABLE | LTV_POWER_ON | LTV_DRIVE_CURRENT(5) | LTV_SUPPLY_CURRENT(5)));
181 lcd_write_reg(10, 0x111A); 179 lcd_write_reg(LTV_PWRCTL2, (LTV_VCOML_VOLTAGE(17) | LTV_VCOMH_VOLTAGE(26))); /* VCOML=0,0625V VCOMH=1,21875V */
182 sleep_ms(10); 180 sleep_ms(10);
183 181
184 if(!reset) 182 if(!reset)
@@ -194,15 +192,15 @@ static void lcd_display_on(bool reset)
194static void lcd_display_off(void) 192static void lcd_display_off(void)
195{ 193{
196 /* LQV shutdown sequence */ 194 /* LQV shutdown sequence */
197 lcd_write_reg(9, 0x855); 195 lcd_write_reg(LTV_PWRCTL1, (LTV_VCOMOUT_ENABLE | LTV_DRIVE_CURRENT(5) | LTV_SUPPLY_CURRENT(5)));
198 sleep_ms(20); 196 sleep_ms(20);
199 197
200 lcd_write_reg(9, 0x55); 198 lcd_write_reg(LTV_PWRCTL1, (LTV_DRIVE_CURRENT(5) | LTV_SUPPLY_CURRENT(5)));
201 lcd_write_reg(5, 0x4033); 199 lcd_write_reg(LTV_GATECTL2, (LTV_NW_INV_1LINE | LTV_FTI(3) | LTV_FWI(3)));
202 lcd_write_reg(10, 0x0); 200 lcd_write_reg(LTV_PWRCTL2, 0);
203 sleep_ms(20); 201 sleep_ms(20);
204 202
205 lcd_write_reg(9, 0x0); 203 lcd_write_reg(LTV_PWRCTL1, 0);
206 sleep_ms(10); 204 sleep_ms(10);
207 unsigned char temp[1]; 205 unsigned char temp[1];
208 temp[0] = 0; 206 temp[0] = 0;