diff options
Diffstat (limited to 'firmware/target/arm/system-pp5002.c')
-rw-r--r-- | firmware/target/arm/system-pp5002.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/firmware/target/arm/system-pp5002.c b/firmware/target/arm/system-pp5002.c index 746441113e..04e052fa83 100644 --- a/firmware/target/arm/system-pp5002.c +++ b/firmware/target/arm/system-pp5002.c | |||
@@ -62,7 +62,7 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void) | |||
62 | some other CPU frequency scaling. */ | 62 | some other CPU frequency scaling. */ |
63 | 63 | ||
64 | #ifndef BOOTLOADER | 64 | #ifndef BOOTLOADER |
65 | void ICODE_ATTR __attribute__((naked)) cpucache_flush(void) | 65 | void ICODE_ATTR __attribute__((naked)) cpucache_commit(void) |
66 | { | 66 | { |
67 | asm volatile( | 67 | asm volatile( |
68 | "mov r0, #0xf0000000 \n" | 68 | "mov r0, #0xf0000000 \n" |
@@ -70,14 +70,15 @@ void ICODE_ATTR __attribute__((naked)) cpucache_flush(void) | |||
70 | "add r1, r0, #0x2000 \n" /* r1 = CACHE_FLUSH_BASE + CACHE_SIZE */ | 70 | "add r1, r0, #0x2000 \n" /* r1 = CACHE_FLUSH_BASE + CACHE_SIZE */ |
71 | "mov r2, #0 \n" | 71 | "mov r2, #0 \n" |
72 | "1: \n" | 72 | "1: \n" |
73 | "str r2, [r0], #16 \n" /* Flush */ | 73 | "str r2, [r0], #16 \n" /* Commit */ |
74 | "cmp r0, r1 \n" | 74 | "cmp r0, r1 \n" |
75 | "blo 1b \n" | 75 | "blo 1b \n" |
76 | "bx lr \n" | 76 | "bx lr \n" |
77 | ); | 77 | ); |
78 | } | 78 | } |
79 | void cpucache_flush(void) __attribute__((alias("cpucache_commit"))); | ||
79 | 80 | ||
80 | void ICODE_ATTR __attribute__((naked)) cpucache_invalidate(void) | 81 | void ICODE_ATTR __attribute__((naked)) cpucache_commit_discard(void) |
81 | { | 82 | { |
82 | asm volatile( | 83 | asm volatile( |
83 | "mov r0, #0xf0000000 \n" | 84 | "mov r0, #0xf0000000 \n" |
@@ -86,13 +87,14 @@ void ICODE_ATTR __attribute__((naked)) cpucache_invalidate(void) | |||
86 | "add r1, r0, #0x2000 \n" /* r2 = CACHE_FLUSH_BASE + CACHE_SIZE */ | 87 | "add r1, r0, #0x2000 \n" /* r2 = CACHE_FLUSH_BASE + CACHE_SIZE */ |
87 | "mov r3, #0 \n" | 88 | "mov r3, #0 \n" |
88 | "1: \n" | 89 | "1: \n" |
89 | "str r3, [r0], #16 \n" /* Flush */ | 90 | "str r3, [r0], #16 \n" /* Commit */ |
90 | "str r3, [r2], #16 \n" /* Invalidate */ | 91 | "str r3, [r2], #16 \n" /* Discard */ |
91 | "cmp r0, r1 \n" | 92 | "cmp r0, r1 \n" |
92 | "blo 1b \n" | 93 | "blo 1b \n" |
93 | "bx lr \n" | 94 | "bx lr \n" |
94 | ); | 95 | ); |
95 | } | 96 | } |
97 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | ||
96 | 98 | ||
97 | static void ipod_init_cache(void) | 99 | static void ipod_init_cache(void) |
98 | { | 100 | { |