diff options
Diffstat (limited to 'firmware/target/arm/s5l8700')
-rw-r--r-- | firmware/target/arm/s5l8700/usb-nano2g-6g.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/firmware/target/arm/s5l8700/usb-nano2g-6g.c b/firmware/target/arm/s5l8700/usb-nano2g-6g.c index 7f5d38a5ae..b070f2be3b 100644 --- a/firmware/target/arm/s5l8700/usb-nano2g-6g.c +++ b/firmware/target/arm/s5l8700/usb-nano2g-6g.c | |||
@@ -21,9 +21,12 @@ | |||
21 | 21 | ||
22 | #include "config.h" | 22 | #include "config.h" |
23 | #include "usb.h" | 23 | #include "usb.h" |
24 | #include "usb-s3c6400x.h" | ||
25 | #include "cpu.h" | ||
24 | 26 | ||
25 | #ifdef HAVE_USBSTACK | 27 | #ifdef HAVE_USBSTACK |
26 | #include "usb_core.h" | 28 | #include "usb_core.h" |
29 | #include "usb_drv.h" | ||
27 | #include "power.h" | 30 | #include "power.h" |
28 | 31 | ||
29 | void usb_enable(bool on) | 32 | void usb_enable(bool on) |
@@ -38,6 +41,24 @@ int usb_detect(void) | |||
38 | return USB_INSERTED; | 41 | return USB_INSERTED; |
39 | return USB_EXTRACTED; | 42 | return USB_EXTRACTED; |
40 | } | 43 | } |
44 | |||
45 | void usb_init_device(void) | ||
46 | { | ||
47 | /* Power up the core clocks to allow writing | ||
48 | to some registers needed to power it down */ | ||
49 | PCGCCTL = 0; | ||
50 | #if CONFIG_CPU==S5L8701 | ||
51 | PWRCON &= ~0x4000; | ||
52 | PWRCONEXT &= ~0x800; | ||
53 | INTMSK |= INTMSK_USB_OTG; | ||
54 | #elif CONFIG_CPU==S5L8702 | ||
55 | PWRCON(0) &= ~0x4; | ||
56 | PWRCON(1) &= ~0x8; | ||
57 | VIC0INTENABLE |= 1 << 19; | ||
58 | #endif | ||
59 | |||
60 | usb_drv_exit(); | ||
61 | } | ||
41 | #else | 62 | #else |
42 | void usb_enable(bool on) | 63 | void usb_enable(bool on) |
43 | { | 64 | { |
@@ -48,4 +69,20 @@ int usb_detect(void) | |||
48 | { | 69 | { |
49 | return USB_EXTRACTED; | 70 | return USB_EXTRACTED; |
50 | } | 71 | } |
72 | |||
73 | void usb_init_device(void) | ||
74 | { | ||
75 | DCTL = DCTL_pwronprgdone | DCTL_sftdiscon; | ||
76 | |||
77 | ORSTCON = 1; /* Put the PHY into reset (needed to get current down) */ | ||
78 | PCGCCTL = 1; /* Shut down PHY clock */ | ||
79 | OPHYPWR = 0xF; /* PHY: Power down */ | ||
80 | |||
81 | #if CONFIG_CPU==S5L8701 | ||
82 | PWRCON |= 0x4000; | ||
83 | PWRCONEXT |= 0x800; | ||
84 | #elif CONFIG_CPU==S5L8702 | ||
85 | PWRCON(0) |= 0x4; | ||
86 | PWRCON(1) |= 0x8; | ||
87 | #endif | ||
51 | #endif | 88 | #endif |