diff options
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx')
4 files changed, 1 insertions, 331 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/adc-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/adc-meg-fx.c deleted file mode 100644 index fd5151a3bf..0000000000 --- a/firmware/target/arm/s3c2440/gigabeat-fx/adc-meg-fx.c +++ /dev/null | |||
@@ -1,140 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 by Wade Brown | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "cpu.h" | ||
22 | #include "system.h" | ||
23 | #include "adc.h" | ||
24 | #include "adc-target.h" | ||
25 | #include "kernel.h" | ||
26 | |||
27 | static unsigned short adc_readings[NUM_ADC_CHANNELS]; | ||
28 | |||
29 | /* prototypes */ | ||
30 | static unsigned short __adc_read(int channel); | ||
31 | static void adc_tick(void); | ||
32 | |||
33 | void adc_init(void) | ||
34 | { | ||
35 | int i; | ||
36 | |||
37 | /* Turn on the ADC PCLK */ | ||
38 | s3c_regset32(&CLKCON, 1<<15); | ||
39 | |||
40 | /* Set channel 0, normal mode, disable "start by read" */ | ||
41 | ADCCON &= ~(0x3F); | ||
42 | |||
43 | /* No start delay. Use normal conversion mode. */ | ||
44 | ADCDLY = 0x1; | ||
45 | |||
46 | /* Set and enable the prescaler */ | ||
47 | ADCCON = (ADCCON & ~(0xff<<6)) | (0x19<<6); | ||
48 | ADCCON |= (1<<14); | ||
49 | |||
50 | /* prefill the adc channels */ | ||
51 | for (i = 0; i < NUM_ADC_CHANNELS; i++) | ||
52 | { | ||
53 | adc_readings[i] = __adc_read(i); | ||
54 | } | ||
55 | |||
56 | /* start at zero so when the tick starts it is at zero */ | ||
57 | adc_readings[0] = __adc_read(0); | ||
58 | |||
59 | /* attach the adc reading to the tick */ | ||
60 | tick_add_task(adc_tick); | ||
61 | } | ||
62 | |||
63 | /* Called to get the recent ADC reading */ | ||
64 | inline unsigned short adc_read(int channel) | ||
65 | { | ||
66 | return adc_readings[channel]; | ||
67 | } | ||
68 | |||
69 | /** | ||
70 | * Read the ADC by polling | ||
71 | * @param channel The ADC channel to read | ||
72 | * @return 10bit reading from ADC channel or ADC_READ_ERROR if timeout | ||
73 | */ | ||
74 | static unsigned short __adc_read(int channel) | ||
75 | { | ||
76 | int i; | ||
77 | |||
78 | /* Set the channel */ | ||
79 | ADCCON = (ADCCON & ~(0x7<<3)) | (channel<<3); | ||
80 | |||
81 | /* Start the conversion process */ | ||
82 | ADCCON |= 0x1; | ||
83 | |||
84 | /* Wait for a low Enable_start */ | ||
85 | for (i = 20000;;) | ||
86 | { | ||
87 | if(0 == (ADCCON & 0x1)) | ||
88 | { | ||
89 | break; | ||
90 | } | ||
91 | else | ||
92 | { | ||
93 | i--; | ||
94 | if (0 == i) | ||
95 | { | ||
96 | /* Ran out of time */ | ||
97 | return ADC_READ_ERROR; | ||
98 | } | ||
99 | } | ||
100 | } | ||
101 | |||
102 | /* Wait for high End_of_Conversion */ | ||
103 | for(i = 20000;;) | ||
104 | { | ||
105 | if(ADCCON & (1<<15)) | ||
106 | { | ||
107 | break; | ||
108 | } | ||
109 | else | ||
110 | { | ||
111 | i--; | ||
112 | if(0 == i) | ||
113 | { | ||
114 | /* Ran out of time */ | ||
115 | return ADC_READ_ERROR; | ||
116 | } | ||
117 | } | ||
118 | } | ||
119 | return (ADCDAT0 & 0x3ff); | ||
120 | } | ||
121 | |||
122 | /* add this to the tick so that the ADC converts are done in the background */ | ||
123 | static void adc_tick(void) | ||
124 | { | ||
125 | static unsigned channel; | ||
126 | |||
127 | /* Check if the End Of Conversion is set */ | ||
128 | if (ADCCON & (1<<15)) | ||
129 | { | ||
130 | adc_readings[channel] = (ADCDAT0 & 0x3FF); | ||
131 | if (++channel >= NUM_ADC_CHANNELS) | ||
132 | { | ||
133 | channel = 0; | ||
134 | } | ||
135 | |||
136 | /* setup the next conversion and start it*/ | ||
137 | ADCCON = (ADCCON & ~(0x7<<3)) | (channel<<3) | 0x01; | ||
138 | } | ||
139 | } | ||
140 | |||
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.c deleted file mode 100644 index 836dedd462..0000000000 --- a/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.c +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Michael Sevakis | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "system.h" | ||
22 | #include "i2c-meg-fx.h" | ||
23 | |||
24 | static struct wakeup i2c_wake; /* Transfer completion signal */ | ||
25 | static struct mutex i2c_mtx; /* Mutual exclusion */ | ||
26 | static unsigned char *buf_ptr; /* Next byte to transfer */ | ||
27 | static int buf_count; /* Number of bytes remaining to transfer */ | ||
28 | |||
29 | static void i2c_stop(void) | ||
30 | { | ||
31 | /* Generate STOP */ | ||
32 | IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB; | ||
33 | |||
34 | /* No more interrupts, clear pending interrupt to continue */ | ||
35 | IICCON &= ~(I2C_TXRX_INTPND | I2C_TXRX_INTENB); | ||
36 | } | ||
37 | |||
38 | void i2c_write(int addr, const unsigned char *buf, int count) | ||
39 | { | ||
40 | if (count <= 0) | ||
41 | return; | ||
42 | |||
43 | mutex_lock(&i2c_mtx); | ||
44 | |||
45 | /* Turn on I2C clock */ | ||
46 | s3c_regset32(&CLKCON, 1 << 16); | ||
47 | |||
48 | /* Set mode to master transmitter and enable lines */ | ||
49 | IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_RXTX_ENB; | ||
50 | |||
51 | /* Set buffer start and count */ | ||
52 | buf_ptr = (unsigned char *)buf; | ||
53 | buf_count = count; | ||
54 | |||
55 | /* Send slave address and then data */ | ||
56 | SRCPND = IIC_MASK; | ||
57 | INTPND = IIC_MASK; | ||
58 | |||
59 | IICCON |= I2C_TXRX_INTENB; | ||
60 | |||
61 | /* Load slave address into shift register */ | ||
62 | IICDS = addr & 0xfe; | ||
63 | |||
64 | /* Generate START */ | ||
65 | IICSTAT = I2C_MODE_MASTER | I2C_MODE_TX | I2C_START | I2C_RXTX_ENB; | ||
66 | |||
67 | if (wakeup_wait(&i2c_wake, HZ) != OBJ_WAIT_SUCCEEDED) | ||
68 | { | ||
69 | /* Something went wrong - stop transmission */ | ||
70 | int oldlevel = disable_irq_save(); | ||
71 | i2c_stop(); | ||
72 | restore_irq(oldlevel); | ||
73 | } | ||
74 | |||
75 | /* Go back to slave receive mode and disable lines */ | ||
76 | IICSTAT = 0; | ||
77 | |||
78 | /* Turn off I2C clock */ | ||
79 | s3c_regclr32(&CLKCON, 1 << 16); | ||
80 | |||
81 | mutex_unlock(&i2c_mtx); | ||
82 | } | ||
83 | |||
84 | void i2c_init(void) | ||
85 | { | ||
86 | /* Init kernel objects */ | ||
87 | wakeup_init(&i2c_wake); | ||
88 | mutex_init(&i2c_mtx); | ||
89 | |||
90 | /* Clear pending source */ | ||
91 | SRCPND = IIC_MASK; | ||
92 | INTPND = IIC_MASK; | ||
93 | |||
94 | /* Enable i2c interrupt in controller */ | ||
95 | s3c_regclr32(&INTMOD, IIC_MASK); | ||
96 | s3c_regclr32(&INTMSK, IIC_MASK); | ||
97 | |||
98 | /* Turn on I2C clock */ | ||
99 | s3c_regset32(&CLKCON, 1 << 16); | ||
100 | |||
101 | /* Set GPE15 (IICSDA) and GPE14 (IICSCL) to IIC */ | ||
102 | GPECON = (GPECON & ~((3 << 30) | (3 << 28))) | | ||
103 | ((2 << 30) | (2 << 28)); | ||
104 | |||
105 | /* Bus ACK, IICCLK: fPCLK / 16, Rx/Tx Int: Disable, Tx clock: IICCLK/8 */ | ||
106 | /* OF PCLK: 49.1568MHz / 16 / 8 = 384.0375 kHz */ | ||
107 | IICCON = (7 << 0); | ||
108 | |||
109 | /* SDA line delayed 0 PCLKs */ | ||
110 | IICLC = (0 << 0); | ||
111 | |||
112 | /* Turn off I2C clock */ | ||
113 | s3c_regclr32(&CLKCON, 1 << 16); | ||
114 | } | ||
115 | |||
116 | void IIC(void) | ||
117 | { | ||
118 | for (;;) | ||
119 | { | ||
120 | /* If ack was received from last byte and bytes are remaining */ | ||
121 | if (--buf_count >= 0 && (IICSTAT & I2C_ACK_L) == 0) | ||
122 | { | ||
123 | /* Write next byte to shift register */ | ||
124 | IICDS = *buf_ptr++; | ||
125 | |||
126 | /* Clear pending interrupt to continue */ | ||
127 | IICCON &= ~I2C_TXRX_INTPND; | ||
128 | break; | ||
129 | } | ||
130 | |||
131 | /* Finished */ | ||
132 | |||
133 | /* Generate STOP */ | ||
134 | i2c_stop(); | ||
135 | |||
136 | /* Signal thread */ | ||
137 | wakeup_signal(&i2c_wake); | ||
138 | break; | ||
139 | } | ||
140 | |||
141 | /* Ack */ | ||
142 | SRCPND = IIC_MASK; | ||
143 | INTPND = IIC_MASK; | ||
144 | } | ||
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.h b/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.h deleted file mode 100644 index 793ee213fd..0000000000 --- a/firmware/target/arm/s3c2440/gigabeat-fx/i2c-meg-fx.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 by Michael Sevakis | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | /* chip-specific i2c functions */ | ||
23 | |||
24 | /* IICCON */ | ||
25 | #define I2C_ACKGEN (1 << 7) | ||
26 | #define I2C_TXCLK_512 (1 << 6) | ||
27 | #define I2C_TXRX_INTENB (1 << 5) | ||
28 | #define I2C_TXRX_INTPND (1 << 4) | ||
29 | |||
30 | /* IICSTAT */ | ||
31 | #define I2C_MODE_MASTER (2 << 6) | ||
32 | #define I2C_MODE_TX (1 << 6) | ||
33 | #define I2C_BUSY (1 << 5) | ||
34 | #define I2C_START (1 << 5) | ||
35 | #define I2C_RXTX_ENB (1 << 4) | ||
36 | #define I2C_BUS_ARB_FAILED (1 << 3) | ||
37 | #define I2C_S_ADDR_STAT (1 << 2) | ||
38 | #define I2C_S_ADDR_MATCH (1 << 1) | ||
39 | #define I2C_ACK_L (1 << 0) | ||
40 | |||
41 | /* IICLC */ | ||
42 | #define I2C_FLT_ENB (1 << 2) | ||
43 | |||
44 | void i2c_init(void); | ||
45 | void i2c_write(int addr, const unsigned char *data, int count); | ||
46 | |||
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/wmcodec-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/wmcodec-meg-fx.c index 52c26b898d..01b177da6c 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/wmcodec-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/wmcodec-meg-fx.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include "cpu.h" | 28 | #include "cpu.h" |
29 | #include "kernel.h" | 29 | #include "kernel.h" |
30 | #include "sound.h" | 30 | #include "sound.h" |
31 | #include "i2c-meg-fx.h" | 31 | #include "i2c-s3c2440.h" |
32 | #include "system-target.h" | 32 | #include "system-target.h" |
33 | #include "timer.h" | 33 | #include "timer.h" |
34 | #include "wmcodec.h" | 34 | #include "wmcodec.h" |