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Diffstat (limited to 'firmware/target/arm/olympus/mrobe-500/ata-mr500.c')
-rw-r--r--firmware/target/arm/olympus/mrobe-500/ata-mr500.c130
1 files changed, 130 insertions, 0 deletions
diff --git a/firmware/target/arm/olympus/mrobe-500/ata-mr500.c b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c
new file mode 100644
index 0000000000..b4028d5ead
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+++ b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c
@@ -0,0 +1,130 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: $
9 *
10 * Copyright (C) 2007 by Karl Kurbjun
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include "config.h"
21#include "cpu.h"
22#include "kernel.h"
23#include "thread.h"
24#include "system.h"
25#include "power.h"
26#include "panic.h"
27#include "pcf50606.h"
28#include "ata-target.h"
29#include "backlight-target.h"
30
31/* ARESET on C7C68300 and RESET on ATA interface (Active Low) */
32#define ATA_RESET_ENABLE return
33#define ATA_RESET_DISABLE return
34
35/* ATA_EN on C7C68300 */
36#define USB_ATA_ENABLE return
37#define USB_ATA_DISABLE return
38
39void ata_reset(void)
40{
41 ATA_RESET_ENABLE;
42 sleep(1); /* > 25us */
43 ATA_RESET_DISABLE;
44 sleep(1); /* > 2ms */
45}
46
47/* This function is called before enabling the USB bus */
48void ata_enable(bool on)
49{
50 if(on)
51 USB_ATA_DISABLE;
52 else
53 USB_ATA_ENABLE;
54}
55
56bool ata_is_coldstart(void)
57{
58 return false;
59}
60
61void ata_device_init(void)
62{
63 /* ATA reset */
64 ATA_RESET_DISABLE; /* Set the pin to disable an active low reset */
65}
66
67#if !defined(BOOTLOADER)
68void copy_read_sectors(unsigned char* buf, int wordcount)
69{
70 __buttonlight_trigger();
71
72 /* Unaligned transfer - slow copy */
73 if ( (unsigned long)buf & 1)
74 { /* not 16-bit aligned, copy byte by byte */
75 unsigned short tmp = 0;
76 unsigned char* bufend = buf + wordcount*2;
77 do
78 {
79 tmp = ATA_DATA;
80 *buf++ = tmp & 0xff; /* I assume big endian */
81 *buf++ = tmp >> 8; /* and don't use the SWAB16 macro */
82 } while (buf < bufend); /* tail loop is faster */
83 return;
84 }
85 /* This should never happen, but worth watching for */
86 if(wordcount > (1 << 18))
87 panicf("atd-meg-fx.c: copy_read_sectors: too many sectors per read!");
88
89//#define GIGABEAT_DEBUG_ATA
90#ifdef GIGABEAT_DEBUG_ATA
91 static int line = 0;
92 static char str[256];
93 snprintf(str, sizeof(str), "ODD DMA to %08x, %d", buf, wordcount);
94 lcd_puts(10, line, str);
95 line = (line+1) % 32;
96 lcd_update();
97#endif
98 /* Reset the channel */
99 DMASKTRIG0 |= 4;
100 /* Wait for DMA controller to be ready */
101 while(DMASKTRIG0 & 0x2)
102 ;
103 while(DSTAT0 & (1 << 20))
104 ;
105 /* Source is ATA_DATA, on AHB Bus, Fixed */
106 DISRC0 = (int) 0x18000000;
107 DISRCC0 = 0x1;
108 /* Dest mapped to physical address, on AHB bus, increment */
109 DIDST0 = (int) buf;
110 if(DIDST0 < 0x30000000)
111 DIDST0 += 0x30000000;
112 DIDSTC0 = 0;
113
114 /* DACK/DREQ Sync to AHB, Whole service, No reload, 16-bit transfers */
115 DCON0 = ((1 << 30) | (1<<27) | (1<<22) | (1<<20)) | wordcount;
116
117 /* Activate the channel */
118 DMASKTRIG0 = 0x2;
119
120 invalidate_dcache_range((void *)buf, wordcount*2);
121
122 /* Start DMA */
123 DMASKTRIG0 |= 0x1;
124
125 /* Wait for transfer to complete */
126 while((DSTAT0 & 0x000fffff))
127 priority_yield();
128 /* Dump cache for the buffer */
129}
130#endif