1 files changed, 76 insertions, 7 deletions

diff --git a/firmware/target/arm/imx31/gigabeat-s/wmcodec-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/wmcodec-gigabeat-s.c
index 36ab33a5dc..ca23aa4e56 100644
--- a/firmware/target/arm/imx31/gigabeat-s/wmcodec-gigabeat-s.c
+++ b/firmware/target/arm/imx31/gigabeat-s/wmcodec-gigabeat-s.c
@@ -22,24 +22,93 @@
  ****************************************************************************/
 #include "config.h"
 #include "system.h"
-#include "kernel.h"
-#include "sound.h"
+#include "audiohw.h"
 #include "wmcodec.h"
+#include "audio.h"
 #include "i2s.h"
 #include "i2c-imx31.h"
 
-/* NOTE: Some port-specific bits will have to be moved away (node and GPIO
- * writes) for cleanest implementation. */
-
 static struct i2c_node wm8978_i2c_node =
 {
     .num  = I2C1_NUM,
     .ifdr = I2C_IFDR_DIV192, /* 66MHz/.4MHz = 165, closest = 192 = 343750Hz */
-                             /* Just hard-code for now - scaling may require 
-                              * updating */
     .addr = WMC_I2C_ADDR,
 };
 
+/* For 16.9344MHz MCLK, codec as master. */
+const struct wmc_srctrl_entry wmc_srctrl_table[HW_NUM_FREQ] =
+{
+    [HW_FREQ_8] = /* PLL = 65.536MHz */
+    {
+        .plln    = 7 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2f,            /* 12414886 */
+        .pllk2   = 0x0b7,
+        .pllk3   = 0x1a6,
+        .mclkdiv = WMC_MCLKDIV_8,   /*  2.0480 MHz */
+        .filter  = WMC_SR_8KHZ,
+    },
+    [HW_FREQ_11] = /* PLL = off */
+    {
+        .mclkdiv = WMC_MCLKDIV_6,   /*  2.8224 MHz */
+        .filter  = WMC_SR_12KHZ,
+    },
+    [HW_FREQ_12] = /* PLL = 73.728 MHz */
+    {
+        .plln    = 8 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2d,            /* 11869595 */
+        .pllk2   = 0x08e,
+        .pllk3   = 0x19b,
+        .mclkdiv = WMC_MCLKDIV_6,   /*  3.0720 MHz */
+        .filter  = WMC_SR_12KHZ,
+    },
+    [HW_FREQ_16] = /* PLL = 65.536MHz */
+    {
+        .plln    = 7 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2f,            /* 12414886 */
+        .pllk2   = 0x0b7,
+        .pllk3   = 0x1a6,
+        .mclkdiv = WMC_MCLKDIV_4,   /*  4.0960 MHz */
+        .filter  = WMC_SR_16KHZ,
+    },
+    [HW_FREQ_22] = /* PLL = off */
+    {
+        .mclkdiv = WMC_MCLKDIV_3,   /*  5.6448 MHz */
+        .filter  = WMC_SR_24KHZ,
+    },
+    [HW_FREQ_24] = /* PLL = 73.728 MHz */
+    {
+        .plln    = 8 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2d,            /* 11869595 */
+        .pllk2   = 0x08e,
+        .pllk3   = 0x19b,
+        .mclkdiv = WMC_MCLKDIV_3,   /*  6.1440 MHz */
+        .filter  = WMC_SR_24KHZ,
+    },
+    [HW_FREQ_32] = /* PLL = 65.536MHz */
+    {
+        .plln    = 7 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2f,            /* 12414886 */
+        .pllk2   = 0x0b7,
+        .pllk3   = 0x1a6,
+        .mclkdiv = WMC_MCLKDIV_2,   /*  8.1920 MHz */
+        .filter  = WMC_SR_32KHZ,
+    },
+    [HW_FREQ_44] = /* PLL = off */
+    {
+        .mclkdiv = WMC_MCLKDIV_1_5, /* 11.2896 MHz */
+        .filter  = WMC_SR_48KHZ,
+    },
+    [HW_FREQ_48] = /* PLL = 73.728 MHz */
+    {
+        .plln    = 8 | WMC_PLL_PRESCALE,
+        .pllk1   = 0x2d,            /* 11869595 */
+        .pllk2   = 0x08e,
+        .pllk3   = 0x19b,
+        .mclkdiv = WMC_MCLKDIV_1_5, /* 12.2880 MHz */
+        .filter  = WMC_SR_48KHZ,
+    },
+};
+
 void audiohw_init(void)
 {
     i2s_reset();