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-rw-r--r--firmware/export/config-creativezvm.h60
-rw-r--r--firmware/export/config.h7
-rw-r--r--firmware/export/dm320.h5
-rw-r--r--firmware/export/isp1583.h185
4 files changed, 233 insertions, 24 deletions
diff --git a/firmware/export/config-creativezvm.h b/firmware/export/config-creativezvm.h
index 0b91510146..f5ec33317e 100644
--- a/firmware/export/config-creativezvm.h
+++ b/firmware/export/config-creativezvm.h
@@ -27,7 +27,7 @@
27#define CREATIVE_ZVM 1 27#define CREATIVE_ZVM 1
28 28
29/* For Rolo and boot loader */ 29/* For Rolo and boot loader */
30#define MODEL_NUMBER 35 30#define MODEL_NUMBER 26
31 31
32/* define this if you use an ATA controller */ 32/* define this if you use an ATA controller */
33#define HAVE_ATA 33#define HAVE_ATA
@@ -65,15 +65,12 @@
65/* Define this if your LCD can be enabled/disabled */ 65/* Define this if your LCD can be enabled/disabled */
66#define HAVE_LCD_ENABLE 66#define HAVE_LCD_ENABLE
67 67
68#define LCD_REMOTE_PIXELFORMAT VERTICAL_PACKING 68#define CONFIG_KEYPAD CREATIVEZVM_PAD
69 69#define HAS_BUTTON_HOLD
70#define MIN_REMOTE_CONTRAST_SETTING 0 70#define HAVE_HEADPHONE_DETECTION
71#define MAX_REMOTE_CONTRAST_SETTING 15
72#define DEFAULT_REMOTE_CONTRAST_SETTING 7
73
74#define CONFIG_KEYPAD MROBE500_PAD
75//#define HAVE_TOUCHPAD 71//#define HAVE_TOUCHPAD
76#define HAVE_BUTTON_DATA 72
73#define CONFIG_I2C I2C_DM320
77 74
78/* Define this if you do software codec */ 75/* Define this if you do software codec */
79#define CONFIG_CODEC SWCODEC 76#define CONFIG_CODEC SWCODEC
@@ -84,16 +81,17 @@
84/* Define this for LCD backlight available */ 81/* Define this for LCD backlight available */
85//#define HAVE_BACKLIGHT 82//#define HAVE_BACKLIGHT
86 83
87#define HAVE_BACKLIGHT_BRIGHTNESS 84//#define HAVE_BACKLIGHT_BRIGHTNESS
88 85
89/* Main LCD backlight brightness range and defaults */ 86/* Main LCD backlight brightness range and defaults */
90#define MIN_BRIGHTNESS_SETTING 0 87//#define MIN_BRIGHTNESS_SETTING 0
91#define MAX_BRIGHTNESS_SETTING 127 88//#define MAX_BRIGHTNESS_SETTING 127
92#define DEFAULT_BRIGHTNESS_SETTING 85 /* OF "full brightness" */ 89//#define DEFAULT_BRIGHTNESS_SETTING 85 /* OF "full brightness" */
93#define DEFAULT_DIMNESS_SETTING 22 /* OF "most dim" */ 90//#define DEFAULT_DIMNESS_SETTING 22 /* OF "most dim" */
94 91
95/* Define this if you have a software controlled poweroff */ 92/* Define this if you have a software controlled poweroff */
96#define HAVE_SW_POWEROFF 93//#define HAVE_SW_POWEROFF
94//TODO: enable this back
97 95
98/* The number of bytes reserved for loadable codecs */ 96/* The number of bytes reserved for loadable codecs */
99#define CODEC_SIZE 0x80000 97#define CODEC_SIZE 0x80000
@@ -104,11 +102,11 @@
104/* Define this if you have the TLV320 audio codec */ 102/* Define this if you have the TLV320 audio codec */
105//#define HAVE_TLV320 103//#define HAVE_TLV320
106 104
107/* Define this if you want to use the adaptive bass capibility of the 8751 */ 105/* TLV320 has no tone controls, so we use the software ones */
108/* #define USE_ADAPTIVE_BASS */ 106//#define HAVE_SW_TONE_CONTROLS
109 107
110#define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | \ 108/*#define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | \
111 SAMPR_CAP_11) 109 SAMPR_CAP_11)*/
112 110
113#define BATTERY_CAPACITY_DEFAULT 1100 /* default battery capacity */ 111#define BATTERY_CAPACITY_DEFAULT 1100 /* default battery capacity */
114#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */ 112#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */
@@ -117,7 +115,7 @@
117#define BATTERY_TYPES_COUNT 1 /* only one type */ 115#define BATTERY_TYPES_COUNT 1 /* only one type */
118 116
119/* Hardware controlled charging with monitoring */ 117/* Hardware controlled charging with monitoring */
120#define CONFIG_CHARGING CHARGING_MONITOR 118//#define CONFIG_CHARGING CHARGING_MONITOR
121 119
122#ifndef SIMULATOR 120#ifndef SIMULATOR
123 121
@@ -127,8 +125,7 @@
127/* Define this if you have a Texas Instruments TSC2100 touch screen */ 125/* Define this if you have a Texas Instruments TSC2100 touch screen */
128//#define HAVE_TSC2100 126//#define HAVE_TSC2100
129 127
130/* Define this if you want to use coldfire's i2c interface */ 128#define CONFIG_USBOTG USBOTG_ISP1583
131//#define CONFIG_I2C I2C_S3C2440
132 129
133/* define this if the hardware can be powered off while charging */ 130/* define this if the hardware can be powered off while charging */
134#define HAVE_POWEROFF_WHILE_CHARGING 131#define HAVE_POWEROFF_WHILE_CHARGING
@@ -161,4 +158,23 @@
161#define BOOTFILE "rockbox." BOOTFILE_EXT 158#define BOOTFILE "rockbox." BOOTFILE_EXT
162#define BOOTDIR "/.rockbox" 159#define BOOTDIR "/.rockbox"
163 160
161#define HAVE_USBSTACK
162#define USB_VENDOR_ID 0x041e
163#define USB_PRODUCT_ID 0x4133
164
165#define USB_SERIAL
166
167//DEBUGGING!
168#ifdef BOOTLOADER
169#define THREAD_EXTRA_CHECKS 1
170#define DEBUG 1
171#define debug(msg) printf(msg)
172#define BUTTON_DEBUG
173
174#define DO_THREAD_TEST
175#endif
176
177
178//Uncomment next line to make this build Zen Vision compatible
179//#define ZEN_VISION
164#endif 180#endif
diff --git a/firmware/export/config.h b/firmware/export/config.h
index e502043844..f4e38ce73c 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -79,6 +79,7 @@
79#define IAUDIO67_PAD 21 79#define IAUDIO67_PAD 21
80#define COWOND2_PAD 22 80#define COWOND2_PAD 22
81#define IAUDIO_M3_PAD 23 81#define IAUDIO_M3_PAD 23
82#define CREATIVEZVM_PAD 24
82 83
83/* CONFIG_REMOTE_KEYPAD */ 84/* CONFIG_REMOTE_KEYPAD */
84#define H100_REMOTE 1 85#define H100_REMOTE 1
@@ -143,6 +144,7 @@
143#define I2C_IMX31L 9 144#define I2C_IMX31L 9
144#define I2C_TCC77X 10 145#define I2C_TCC77X 10
145#define I2C_TCC780X 11 146#define I2C_TCC780X 11
147#define I2C_DM320 12 /* DM320 style */
146 148
147/* CONFIG_LED */ 149/* CONFIG_LED */
148#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */ 150#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */
@@ -169,6 +171,7 @@
169 171
170/* USB On-the-go */ 172/* USB On-the-go */
171#define USBOTG_ISP1362 1362 /* iriver H300 */ 173#define USBOTG_ISP1362 1362 /* iriver H300 */
174#define USBOTG_ISP1583 1583 /* Creative Zen Vision:M */
172#define USBOTG_M5636 5636 /* iAudio X5 */ 175#define USBOTG_M5636 5636 /* iAudio X5 */
173#define USBOTG_ARC 5020 /* PortalPlayer 502x */ 176#define USBOTG_ARC 5020 /* PortalPlayer 502x */
174 177
@@ -389,13 +392,13 @@
389#define ARM_ARCH 6 /* ARMv6 */ 392#define ARM_ARCH 6 /* ARMv6 */
390#endif 393#endif
391 394
392#if defined(CPU_TCC77X) || defined(CPU_TCC780X) 395#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320)
393#define CPU_ARM 396#define CPU_ARM
394#define ARM_ARCH 5 /* ARMv5 */ 397#define ARM_ARCH 5 /* ARMv5 */
395#endif 398#endif
396 399
397#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \ 400#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
398 || (CONFIG_CPU == DSC25) || (CONFIG_CPU == DM320) 401 || (CONFIG_CPU == DSC25)
399#define CPU_ARM 402#define CPU_ARM
400#define ARM_ARCH 4 /* ARMv4 */ 403#define ARM_ARCH 4 /* ARMv4 */
401#endif 404#endif
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index 4a26f6e3d5..a70083331e 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -28,7 +28,12 @@
28#define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2) 28#define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2)
29#define TTB_SIZE (0x4000) 29#define TTB_SIZE (0x4000)
30/* must be 16Kb (0x4000) aligned */ 30/* must be 16Kb (0x4000) aligned */
31#if 0
32#define MEM_END 0x00900000 + (MEM*0x00100000)
33#define TTB_BASE ((unsigned int *)(MEM_END - TTB_SIZE)) /* End of memory */
34#else
31#define TTB_BASE ((unsigned int *)(0x04900000 - TTB_SIZE)) /* End of memory */ 35#define TTB_BASE ((unsigned int *)(0x04900000 - TTB_SIZE)) /* End of memory */
36#endif
32#define FRAME ((short *) ((char*)TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */ 37#define FRAME ((short *) ((char*)TTB_BASE - LCD_BUFFER_SIZE)) /* Right before TTB */
33 38
34#define PHY_IO_BASE 0x00030000 39#define PHY_IO_BASE 0x00030000
diff --git a/firmware/export/isp1583.h b/firmware/export/isp1583.h
new file mode 100644
index 0000000000..3ffbbed60e
--- /dev/null
+++ b/firmware/export/isp1583.h
@@ -0,0 +1,185 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 by Maurus Cuelenaere
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#ifndef ISP1583_H
20#define ISP1583_H
21
22#ifndef ISP1583_H_OVERRIDE
23/* Initialization registers */
24#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0)))
25#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC)))
26#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10)))
27#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12)))
28#define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14)))
29#define ISP1583_INIT_INTEN_B
30#define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A
31/* Data Flow registers */
32#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2)))
33#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28)))
34#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20)))
35#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C)))
36#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E)))
37#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04)))
38#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08)))
39/* DMA registers */
40#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58)))
41/* General registers */
42#define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18)))
43#define ISP1583_GEN_INT_B
44#define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A
45#define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */
46#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74)))
47#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78)))
48#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C)))
49#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84)))
50
51#define set_int_value(a,b,value) a = value;
52#endif
53
54#define ISP1583_UNLOCK_CODE (unsigned short)0xAA37
55
56/* Initialization registers' bits */
57
58/* Initialization OTG register bits */
59#define INIT_OTG_BSESS_VALID (1 << 4)
60
61/* Initialization Mode register bits */
62#define INIT_MODE_TEST2 (1 << 15)
63#define INIT_MODE_TEST1 (1 << 14)
64#define INIT_MODE_TEST0 (1 << 13)
65#define INIT_MODE_DMA_CLKON (1 << 9)
66#define INIT_MODE_VBUSSTAT (1 << 8)
67#define INIT_MODE_CLKAON (1 << 7)
68#define INIT_MODE_SNDRSU (1 << 6)
69#define INIT_MODE_GOSUSP (1 << 5)
70#define INIT_MODE_SFRESET (1 << 4)
71#define INIT_MODE_GLINTENA (1 << 3)
72#define INIT_MODE_WKUPCS (1 << 2)
73#define INIT_MODE_PWRON (1 << 1)
74#define INIT_MODE_SOFTCT (1 << 0)
75
76/* Initialization Interrupt Enable register bits */
77#define INIT_INTEN_IEP7TX (1 << 25)
78#define INIT_INTEN_IEP7RX (1 << 24)
79#define INIT_INTEN_IEP6TX (1 << 23)
80#define INIT_INTEN_IEP6RX (1 << 22)
81#define INIT_INTEN_IEP5TX (1 << 21)
82#define INIT_INTEN_IEP5RX (1 << 20)
83#define INIT_INTEN_IEP4TX (1 << 19)
84#define INIT_INTEN_IEP4RX (1 << 18)
85#define INIT_INTEN_IEP3TX (1 << 17)
86#define INIT_INTEN_IEP3RX (1 << 16)
87#define INIT_INTEN_IEP2TX (1 << 15)
88#define INIT_INTEN_IEP2RX (1 << 14)
89#define INIT_INTEN_IEP1TX (1 << 13)
90#define INIT_INTEN_IEP1RX (1 << 12)
91#define INIT_INTEN_IEP0TX (1 << 11)
92#define INIT_INTEN_IEP0RX (1 << 10)
93#define INIT_INTEN_IEP0SETUP (1 << 8)
94#define INIT_INTEN_IEVBUS (1 << 7)
95#define INIT_INTEN_IEDMA (1 << 6)
96#define INIT_INTEN_IEHS_STA (1 << 5)
97#define INIT_INTEN_IERESM (1 << 4)
98#define INIT_INTEN_IESUSP (1 << 3)
99#define INIT_INTEN_IEPSOF (1 << 2)
100#define INIT_INTEN_IESOF (1 << 1)
101#define INIT_INTEN_IEBRST (1 << 0)
102
103/* Initialization Interrupt Configuration register bits */
104#define INIT_INTCONF_INTLVL (1 << 1)
105#define INIT_INTCONF_INTPOL (1 << 0)
106
107/* Initialization Address register bits */
108#define INIT_ADDRESS_DEVEN (1 << 7)
109
110/* Data Flow registers' bits */
111
112/* Data Flow Endpoint Index register bits */
113#define DFLOW_EPINDEX_EP0SETUP (1 << 5)
114
115/* Data Flow Control Function register bits */
116#define DFLOW_CTRLFUN_CLBUF (1 << 4)
117#define DFLOW_CTRLFUN_VENDP (1 << 3)
118#define DFLOW_CTRLFUN_DSEN (1 << 2)
119#define DFLOW_CTRLFUN_STATUS (1 << 1)
120#define DFLOW_CTRLFUN_STALL (1 << 0)
121
122/* Data Flow Endpoint Type register bits */
123#define DFLOW_EPTYPE_NOEMPKT (1 << 4)
124#define DFLOW_EPTYPE_ENABLE (1 << 3)
125#define DFLOW_EPTYPE_DBLBUF (1 << 2)
126
127/* General registers' bits */
128
129/* General Test Mode register bits */
130#define GEN_TSTMOD_FORCEHS (1 << 7)
131#define GEN_TSTMOD_FORCEFS (1 << 4)
132#define GEN_TSTMOD_PRBS (1 << 3)
133#define GEN_TSTMOD_KSTATE (1 << 2)
134#define GEN_TSTMOD_JSTATE (1 << 1)
135#define GEN_TSTMOD_SE0_NAK (1 << 0)
136
137/* Interrupts */
138#define INT_IEP7TX (1 << 25)
139#define INT_IEP7RX (1 << 24)
140#define INT_IEP6TX (1 << 23)
141#define INT_IEP6RX (1 << 22)
142#define INT_IEP5TX (1 << 21)
143#define INT_IEP5RX (1 << 20)
144#define INT_IEP4TX (1 << 19)
145#define INT_IEP4RX (1 << 18)
146#define INT_IEP3TX (1 << 17)
147#define INT_IEP3RX (1 << 16)
148#define INT_IEP2TX (1 << 15)
149#define INT_IEP2RX (1 << 14)
150#define INT_IEP1TX (1 << 13)
151#define INT_IEP1RX (1 << 12)
152#define INT_IEP0TX (1 << 11)
153#define INT_IEP0RX (1 << 10)
154#define INT_IEP0SETUP (1 << 8)
155#define INT_IEVBUS (1 << 7)
156#define INT_IEDMA (1 << 6)
157#define INT_IEHS_STA (1 << 5)
158#define INT_IERESM (1 << 4)
159#define INT_IESUSP (1 << 3)
160#define INT_IEPSOF (1 << 2)
161#define INT_IESOF (1 << 1)
162#define INT_IEBRST (1 << 0)
163
164#define INT_EP_MASK ( INT_IEP0RX | INT_IEP0TX | INT_IEP1RX | INT_IEP1TX | INT_IEP2RX | INT_IEP2TX | INT_IEP3RX | INT_IEP3TX | INT_IEP4RX | INT_IEP4TX | INT_IEP5RX | INT_IEP5TX | INT_IEP6RX | INT_IEP6TX | INT_IEP7RX | INT_IEP7TX )
165
166#define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX )
167#define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA )
168
169bool usb_drv_powered(void);
170void usb_drv_init(void);
171int usb_drv_port_speed(void);
172void usb_drv_exit(void);
173void usb_drv_stall(int endpoint, bool stall, bool in);
174bool usb_drv_stalled(int endpoint, bool in);
175int usb_drv_recv(int ep, void* ptr, int length);
176int usb_drv_send_nonblocking(int ep, void* ptr, int length);
177int usb_drv_send(int endpoint, void* ptr, int length);
178void usb_drv_reset_endpoint(int ep, bool send);
179void usb_drv_wait(int ep, bool send);
180void usb_drv_cancel_all_transfers(void);
181void usb_drv_set_address(int address);
182void usb_drv_set_test_mode(int mode);
183void usb_drv_int(void); /* Method for handling interrupts, must be called from usb-<target>.c */
184
185#endif
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