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-rw-r--r--firmware/export/dm320.h99
1 files changed, 97 insertions, 2 deletions
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index a70083331e..311ac01f29 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -411,9 +411,9 @@
411#define IO_CLK_LPCTL0 DM320_REG(0x089E) 411#define IO_CLK_LPCTL0 DM320_REG(0x089E)
412#define IO_CLK_LPCTL1 DM320_REG(0x08A0) 412#define IO_CLK_LPCTL1 DM320_REG(0x08A0)
413#define IO_CLK_OSEL DM320_REG(0x08A2) 413#define IO_CLK_OSEL DM320_REG(0x08A2)
414#define IO_CLK_00DIV DM320_REG(0x08A4) 414#define IO_CLK_O0DIV DM320_REG(0x08A4)
415#define IO_CLK_O1DIV DM320_REG(0x08A6) 415#define IO_CLK_O1DIV DM320_REG(0x08A6)
416#define IO_CLK_02DIV DM320_REG(0x08A8) 416#define IO_CLK_O2DIV DM320_REG(0x08A8)
417#define IO_CLK_PWM0C DM320_REG(0x08AA) 417#define IO_CLK_PWM0C DM320_REG(0x08AA)
418#define IO_CLK_PWM0H DM320_REG(0x08AC) 418#define IO_CLK_PWM0H DM320_REG(0x08AC)
419#define IO_CLK_PWM1C DM320_REG(0x08AE) 419#define IO_CLK_PWM1C DM320_REG(0x08AE)
@@ -838,6 +838,15 @@
838#define CLK_MOD2_TMR0 (1 << 1) 838#define CLK_MOD2_TMR0 (1 << 1)
839#define CLK_MOD2_WDT (1 << 0) 839#define CLK_MOD2_WDT (1 << 0)
840 840
841#define CLK_SEL1_OSD (1 << 12)
842#define CLK_SEL1_CCD (1 << 8)
843#define CLK_SEL1_VENCPLL (1 << 4)
844#define CLK_SEL1_VENC(x) (x << 0)
845
846#define CLK_OSEL_O2SEL(x) (x << 8)
847#define CLK_OSEL_O1SEL(x) (x << 4)
848#define CLK_OSEL_O0SEL(x) (x << 0)
849
841/* 850/*
842 * IO_EINTx bits 851 * IO_EINTx bits
843 */ 852 */
@@ -905,4 +914,90 @@
905#define INTR_IRQ1_EXT2 INTR_EINT1_EXT2 914#define INTR_IRQ1_EXT2 INTR_EINT1_EXT2
906#define INTR_IRQ1_EXT7 INTR_EINT1_EXT7 915#define INTR_IRQ1_EXT7 INTR_EINT1_EXT7
907 916
917/*
918* HPIBCTL bits
919*/
920#define HPIBCTL_DBIO (1 << 10)
921#define HPIBCTL_DHOLD (1 << 9)
922#define HPIBCTL_DRST (1 << 8)
923#define HPIBCTL_DINT0 (1 << 7)
924#define HPIBCTL_EXCHG (1 << 5)
925#define HPIBCTL_HPNMI (1 << 3)
926#define HPIBCTL_HPIEN (1 << 0)
927
928/*
929* Video Encoder bits
930*/
931#define VENC_VMOD_VDMD(x) (x << 12)
932#define VENC_VMOD_ITLC (1 << 10)
933#define VENC_VMOD_CBTYP (1 << 9)
934#define VENC_VMOD_CBMD (1 << 8)
935#define VENC_VMOD_NTPLS(x) (x << 6)
936#define VENC_VMOD_SLAVE (1 << 5)
937#define VENC_VMOD_VMD (1 << 4)
938#define VENC_VMOD_BLNK (1 << 3)
939#define VENC_VMOD_DACPD (1 << 2)
940#define VENC_VMOD_VIE (1 << 1)
941#define VENC_VMOD_VENC (1 << 0)
942
943#define VENC_VDCTL_VCLKP (1 << 14)
944#define VENC_VDCTL_VCLKE (1 << 13)
945#define VENC_VDCTL_VCLKZ (1 << 12)
946#define VENC_VDCTL_DOMD(x) (x << 4)
947#define VENC_VDCTL_YCDC (1 << 2)
948#define VENC_VDCTL_INPTRU (1 << 1)
949#define VENC_VDCTL_YCDIR (1 << 0)
950
951#define VENC_VDPRO_PFLTY(x) (x << 12)
952#define VENC_VDPRO_PFLTR (1 << 11)
953#define VENC_VDPRO_YCDLY(x) (x << 8)
954#define VENC_VDPRO_RGBMAT (1 << 7)
955#define VENC_VDPRO_ATRGB (1 << 6)
956#define VENC_VDPRO_ATYCC (1 << 5)
957#define VENC_VDPRO_ATCOM (1 << 4)
958#define VENC_VDPRO_STUP (1 << 3)
959#define VENC_VDPRO_CRCUT (1 << 2)
960#define VENC_VDPRO_CUPS (1 << 1)
961#define VENC_VDPRO_YUPS (1 << 0)
962
963#define VENC_SYNCCTL_EXFEN (1 << 12)
964#define VENC_SYNCCTL_EXFIV (1 << 11)
965#define VENC_SYNCCTL_EXSYNC (1 << 10)
966#define VENC_SYNCCTL_EXVIV (1 << 9)
967#define VENC_SYNCCTL_EXHIV (1 << 8)
968#define VENC_SYNCCTL_CSP (1 << 7)
969#define VENC_SYNCCTL_CSE (1 << 6)
970#define VENC_SYNCCTL_SYSW (1 << 5)
971#define VENC_SYNCCTL_VSYNCS (1 << 4)
972#define VENC_SYNCCTL_VPL (1 << 3)
973#define VENC_SYNCCTL_HPL (1 << 2)
974#define VENC_SYNCCTL_SYE (1 << 1)
975#define VENC_SYNCCTL_SYDIR (1 << 0)
976
977#define VENC_RGBCTL_IRONM (1 << 11)
978#define VENC_RGBCTL_DFLTR (1 << 10)
979#define VENC_RGBCTL_DFLTS(x) (x << 8)
980#define VENC_RGBCTL_RGBEF(x) (x << 4)
981#define VENC_RGBCTL_RGBOF(x) (x << 0)
982
983#define VENC_RGBCLP_UCLIP(x) (x << 8)
984#define VENC_RGBCLP_OFST(x) (x << 0)
985
986#define VENC_LCDOUT_FIDS (1 << 8)
987#define VENC_LCDOUT_FIDP (1 << 7)
988#define VENC_LCDOUT_PWMP (1 << 6)
989#define VENC_LCDOUT_PWME (1 << 5)
990#define VENC_LCDOUT_ACE (1 << 4)
991#define VENC_LCDOUT_BRP (1 << 3)
992#define VENC_LCDOUT_BRE (1 << 2)
993#define VENC_LCDOUT_OEP (1 << 1)
994#define VENC_LCDOUT_OEE (1 << 0)
995
996#define VENC_DCLKCTL_DOFST(x) (x << 12)
997#define VENC_DCLKCTL_DCKEC (1 << 11)
998#define VENC_DCLKCTL_DCKME (1 << 10)
999#define VENC_DCLKCTL_DCKOH (1 << 9)
1000#define VENC_DCLKCTL_DCKIH (1 << 8)
1001#define VENC_DCLKCTL_DCKPW(x) (x << 0)
1002
908#endif 1003#endif