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-rw-r--r--firmware/app.lds20
1 files changed, 13 insertions, 7 deletions
diff --git a/firmware/app.lds b/firmware/app.lds
index 8b0bed31d2..998ac40791 100644
--- a/firmware/app.lds
+++ b/firmware/app.lds
@@ -28,9 +28,13 @@ INPUT(target/sh/crt0.o)
28#define STUBOFFSET 0 28#define STUBOFFSET 0
29#endif 29#endif
30 30
31#if CONFIG_CPU!=S3C2440 31#if CONFIG_CPU==S3C2440
32#include "s3c2440.h"
33#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - PLUGINSIZE - STUBOFFSET - CODECSIZE - LCD_BUFFER_SIZE - TTB_SIZE
34#else
32#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE 35#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE - STUBOFFSET - CODECSIZE
33#endif 36#endif
37
34#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300) 38#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
35#define DRAMORIG 0x31000000 + STUBOFFSET 39#define DRAMORIG 0x31000000 + STUBOFFSET
36#define IRAMORIG 0x10000000 40#define IRAMORIG 0x10000000
@@ -48,12 +52,14 @@ INPUT(target/sh/crt0.o)
48#define IRAMORIG 0x400000 52#define IRAMORIG 0x400000
49#define IRAMSIZE 0x7000 53#define IRAMSIZE 0x7000
50#elif CONFIG_CPU==S3C2440 54#elif CONFIG_CPU==S3C2440
51#include "s3c2440.h" 55#define DRAMORIG 0x00000100 + STUBOFFSET
52#define DRAMORIG (0x100 + STUBOFFSET)
53#define DRAMSIZE (MEMORYSIZE * 0x100000) - 0x100 - STUBOFFSET - LCD_BUFFER_SIZE - TTB_SIZE - PLUGINSIZE - CODECSIZE
54#define IRAMORIG DRAMORIG 56#define IRAMORIG DRAMORIG
55#define IRAMSIZE 4K 57#define IRAMSIZE 0x1000
56#define IRAM DRAM 58#define IRAM DRAM
59#elif CONFIG_CPU==DM320
60#define DRAMORIG 0x00900000 + STUBOFFSET
61#define IRAMORIG 0x00000000
62#define IRAMSIZE 0x4000
57#else 63#else
58#define DRAMORIG 0x09000000 + STUBOFFSET 64#define DRAMORIG 0x09000000 + STUBOFFSET
59#define IRAMORIG 0x0f000000 65#define IRAMORIG 0x0f000000
@@ -79,7 +85,7 @@ MEMORY
79 85
80SECTIONS 86SECTIONS
81{ 87{
82#ifndef CPU_ARM 88#if !defined(CPU_ARM)
83 .vectors : 89 .vectors :
84 { 90 {
85 loadaddress = .; 91 loadaddress = .;
@@ -136,7 +142,7 @@ SECTIONS
136 *(.eh_frame) 142 *(.eh_frame)
137 } 143 }
138 144
139#ifdef CPU_ARM 145#if defined(CPU_ARM)
140 .vectors 0x0 : 146 .vectors 0x0 :
141 { 147 {
142 _vectorsstart = .; 148 _vectorsstart = .;