diff options
| -rw-r--r-- | firmware/target/arm/imx31/mc13783-imx31.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/imx31/mc13783-imx31.c b/firmware/target/arm/imx31/mc13783-imx31.c index fc5dfa72f6..9b7248dc45 100644 --- a/firmware/target/arm/imx31/mc13783-imx31.c +++ b/firmware/target/arm/imx31/mc13783-imx31.c | |||
| @@ -38,7 +38,7 @@ static struct spi_node mc13783_spi = | |||
| 38 | CSPI2_NUM, /* CSPI module 2 */ | 38 | CSPI2_NUM, /* CSPI module 2 */ |
| 39 | CSPI_CONREG_CHIP_SELECT_SS0 | /* Chip select 0 */ | 39 | CSPI_CONREG_CHIP_SELECT_SS0 | /* Chip select 0 */ |
| 40 | CSPI_CONREG_DRCTL_DONT_CARE | /* Don't care about CSPI_RDY */ | 40 | CSPI_CONREG_DRCTL_DONT_CARE | /* Don't care about CSPI_RDY */ |
| 41 | CSPI_CONREG_DATA_RATE_DIV_4 | /* Clock = IPG_CLK/4 - 16.5MHz */ | 41 | CSPI_CONREG_DATA_RATE_DIV_32 | /* Clock = IPG_CLK/32 = 2,062,500Hz. */ |
| 42 | CSPI_BITCOUNT(32-1) | /* All 32 bits are to be transferred */ | 42 | CSPI_BITCOUNT(32-1) | /* All 32 bits are to be transferred */ |
| 43 | CSPI_CONREG_SSPOL | /* SS active high */ | 43 | CSPI_CONREG_SSPOL | /* SS active high */ |
| 44 | CSPI_CONREG_SSCTL | /* Negate SS between SPI bursts */ | 44 | CSPI_CONREG_SSCTL | /* Negate SS between SPI bursts */ |