diff options
26 files changed, 44 insertions, 208 deletions
diff --git a/firmware/export/timer.h b/firmware/export/timer.h index 7b56330e18..230c0ae4dc 100644 --- a/firmware/export/timer.h +++ b/firmware/export/timer.h | |||
@@ -40,6 +40,7 @@ | |||
40 | #warning "TIMER_FREQ not defined" | 40 | #warning "TIMER_FREQ not defined" |
41 | #define TIMER_FREQ CPU_FREQ | 41 | #define TIMER_FREQ CPU_FREQ |
42 | #endif | 42 | #endif |
43 | |||
43 | bool timer_register(int reg_prio, void (*unregister_callback)(void), | 44 | bool timer_register(int reg_prio, void (*unregister_callback)(void), |
44 | long cycles, void (*timer_callback)(void) | 45 | long cycles, void (*timer_callback)(void) |
45 | IF_COP(,int core)); | 46 | IF_COP(,int core)); |
@@ -49,6 +50,11 @@ void timers_adjust_prescale(int multiplier, bool enable_irq); | |||
49 | #endif | 50 | #endif |
50 | void timer_unregister(void); | 51 | void timer_unregister(void); |
51 | 52 | ||
53 | /* target-specific interface */ | ||
54 | bool timer_set(long cycles, bool start); | ||
55 | bool timer_start(IF_COP_VOID(int core)); | ||
56 | void timer_stop(void); | ||
57 | |||
52 | /* For target-specific interface use */ | 58 | /* For target-specific interface use */ |
53 | extern void (*pfn_timer)(void); | 59 | extern void (*pfn_timer)(void); |
54 | extern void (*pfn_unregister)(void); | 60 | extern void (*pfn_unregister)(void); |
diff --git a/firmware/target/arm/as3525/timer-as3525.c b/firmware/target/arm/as3525/timer-as3525.c index 50f0e73158..673e3b8f47 100644 --- a/firmware/target/arm/as3525/timer-as3525.c +++ b/firmware/target/arm/as3525/timer-as3525.c | |||
@@ -31,7 +31,7 @@ void INT_TIMER1(void) | |||
31 | TIMER1_INTCLR = 0; /* clear interrupt */ | 31 | TIMER1_INTCLR = 0; /* clear interrupt */ |
32 | } | 32 | } |
33 | 33 | ||
34 | bool __timer_set(long cycles, bool start) | 34 | bool timer_set(long cycles, bool start) |
35 | { | 35 | { |
36 | if (start) | 36 | if (start) |
37 | { | 37 | { |
@@ -53,14 +53,14 @@ bool __timer_set(long cycles, bool start) | |||
53 | return true; | 53 | return true; |
54 | } | 54 | } |
55 | 55 | ||
56 | bool __timer_start(void) | 56 | bool timer_start(void) |
57 | { | 57 | { |
58 | CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */ | 58 | CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */ |
59 | VIC_INT_ENABLE |= INTERRUPT_TIMER1; | 59 | VIC_INT_ENABLE |= INTERRUPT_TIMER1; |
60 | return true; | 60 | return true; |
61 | } | 61 | } |
62 | 62 | ||
63 | void __timer_stop(void) | 63 | void timer_stop(void) |
64 | { | 64 | { |
65 | TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ | 65 | TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ |
66 | VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ | 66 | VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ |
diff --git a/firmware/target/arm/as3525/timer-target.h b/firmware/target/arm/as3525/timer-target.h index b1bdfed78f..f6b4fae370 100644 --- a/firmware/target/arm/as3525/timer-target.h +++ b/firmware/target/arm/as3525/timer-target.h | |||
@@ -21,19 +21,6 @@ | |||
21 | #ifndef TIMER_TARGET_H | 21 | #ifndef TIMER_TARGET_H |
22 | #define TIMER_TARGET_H | 22 | #define TIMER_TARGET_H |
23 | 23 | ||
24 | bool __timer_set(long cycles, bool set); | ||
25 | bool __timer_start(void); | ||
26 | void __timer_stop(void); | ||
27 | |||
28 | #define TIMER_FREQ (24000000 / 16) | 24 | #define TIMER_FREQ (24000000 / 16) |
29 | 25 | ||
30 | #define __TIMER_SET(cycles, set) \ | ||
31 | __timer_set(cycles, set) | ||
32 | |||
33 | #define __TIMER_START() \ | ||
34 | __timer_start() | ||
35 | |||
36 | #define __TIMER_STOP(...) \ | ||
37 | __timer_stop() | ||
38 | |||
39 | #endif /* TIMER_TARGET_H */ | 26 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/at91sam/lyre_proto1/timer-lyre_proto1.c b/firmware/target/arm/at91sam/lyre_proto1/timer-lyre_proto1.c index ef5c91169d..1b620e9c4f 100644 --- a/firmware/target/arm/at91sam/lyre_proto1/timer-lyre_proto1.c +++ b/firmware/target/arm/at91sam/lyre_proto1/timer-lyre_proto1.c | |||
@@ -48,7 +48,7 @@ void pitc_handler(void) | |||
48 | } | 48 | } |
49 | } | 49 | } |
50 | 50 | ||
51 | bool __timer_set(long cycles, bool start) | 51 | bool timer_set(long cycles, bool start) |
52 | { | 52 | { |
53 | if (cycles < 1000) /* Max value on PITC?? */ | 53 | if (cycles < 1000) /* Max value on PITC?? */ |
54 | { | 54 | { |
@@ -67,7 +67,7 @@ bool __timer_set(long cycles, bool start) | |||
67 | return false; | 67 | return false; |
68 | } | 68 | } |
69 | 69 | ||
70 | bool __timer_start(void) | 70 | bool timer_start(void) |
71 | { | 71 | { |
72 | bool retval = true; | 72 | bool retval = true; |
73 | volatile unsigned long pimr = 0; | 73 | volatile unsigned long pimr = 0; |
@@ -101,7 +101,7 @@ bool __timer_start(void) | |||
101 | return retval; | 101 | return retval; |
102 | } | 102 | } |
103 | 103 | ||
104 | void __timer_stop(void) | 104 | void timer_stop(void) |
105 | { | 105 | { |
106 | volatile unsigned long pimr = 0; | 106 | volatile unsigned long pimr = 0; |
107 | 107 | ||
diff --git a/firmware/target/arm/at91sam/lyre_proto1/timer-target.h b/firmware/target/arm/at91sam/lyre_proto1/timer-target.h index b8298d3d77..d0773130bf 100644 --- a/firmware/target/arm/at91sam/lyre_proto1/timer-target.h +++ b/firmware/target/arm/at91sam/lyre_proto1/timer-target.h | |||
@@ -25,17 +25,4 @@ | |||
25 | /* timer is based on PCLK and minimum division is 2 */ | 25 | /* timer is based on PCLK and minimum division is 2 */ |
26 | #define TIMER_FREQ (49156800/2) | 26 | #define TIMER_FREQ (49156800/2) |
27 | 27 | ||
28 | bool __timer_set(long cycles, bool set); | ||
29 | bool __timer_start(void); | ||
30 | void __timer_stop(void); | ||
31 | |||
32 | #define __TIMER_SET(cycles, set) \ | ||
33 | __timer_set(cycles, set) | ||
34 | |||
35 | #define __TIMER_START() \ | ||
36 | __timer_start() | ||
37 | |||
38 | #define __TIMER_STOP(...) \ | ||
39 | __timer_stop() | ||
40 | |||
41 | #endif /* TIMER_TARGET_H */ | 28 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c index 5e53e4a55e..f3f78a1ee1 100644 --- a/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c | |||
@@ -52,7 +52,7 @@ static void stop_timer(bool clock_off) | |||
52 | } | 52 | } |
53 | } | 53 | } |
54 | 54 | ||
55 | bool _timer_set(long cycles, bool start) | 55 | bool timer_set(long cycles, bool start) |
56 | { | 56 | { |
57 | /* Maximum cycle count expressible in the cycles parameter is 2^31-1 | 57 | /* Maximum cycle count expressible in the cycles parameter is 2^31-1 |
58 | * and the modulus counter is capable of 2^32-1 and as a result there is | 58 | * and the modulus counter is capable of 2^32-1 and as a result there is |
@@ -86,7 +86,7 @@ bool _timer_set(long cycles, bool start) | |||
86 | return true; | 86 | return true; |
87 | } | 87 | } |
88 | 88 | ||
89 | bool _timer_start(void) | 89 | bool timer_start(void) |
90 | { | 90 | { |
91 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 91 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
92 | 92 | ||
@@ -104,7 +104,7 @@ bool _timer_start(void) | |||
104 | return true; | 104 | return true; |
105 | } | 105 | } |
106 | 106 | ||
107 | void _timer_stop(void) | 107 | void timer_stop(void) |
108 | { | 108 | { |
109 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 109 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
110 | /* Halt timer if running - stop module clock */ | 110 | /* Halt timer if running - stop module clock */ |
diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-target.h b/firmware/target/arm/imx31/gigabeat-s/timer-target.h index f019a45519..9d5520aa6d 100644 --- a/firmware/target/arm/imx31/gigabeat-s/timer-target.h +++ b/firmware/target/arm/imx31/gigabeat-s/timer-target.h | |||
@@ -24,17 +24,4 @@ | |||
24 | /* timer is based on ipg_clk */ | 24 | /* timer is based on ipg_clk */ |
25 | #define TIMER_FREQ (66000000) | 25 | #define TIMER_FREQ (66000000) |
26 | 26 | ||
27 | bool _timer_set(long cycles, bool set); | ||
28 | bool _timer_start(void); | ||
29 | void _timer_stop(void); | ||
30 | |||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | _timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | _timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | _timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/pnx0101/timer-pnx0101.c b/firmware/target/arm/pnx0101/timer-pnx0101.c index 6e685aa20f..d54cfe84d5 100644 --- a/firmware/target/arm/pnx0101/timer-pnx0101.c +++ b/firmware/target/arm/pnx0101/timer-pnx0101.c | |||
@@ -43,7 +43,7 @@ void TIMER1_ISR(void) | |||
43 | TIMER1.clr = 1; /* clear the interrupt */ | 43 | TIMER1.clr = 1; /* clear the interrupt */ |
44 | } | 44 | } |
45 | 45 | ||
46 | bool __timer_set(long cycles, bool start) | 46 | bool timer_set(long cycles, bool start) |
47 | { | 47 | { |
48 | if (start) | 48 | if (start) |
49 | { | 49 | { |
@@ -68,14 +68,14 @@ bool __timer_set(long cycles, bool start) | |||
68 | return true; | 68 | return true; |
69 | } | 69 | } |
70 | 70 | ||
71 | bool __timer_start(void) | 71 | bool timer_start(void) |
72 | { | 72 | { |
73 | irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR); | 73 | irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR); |
74 | irq_enable_int(IRQ_TIMER1); | 74 | irq_enable_int(IRQ_TIMER1); |
75 | return true; | 75 | return true; |
76 | } | 76 | } |
77 | 77 | ||
78 | void __timer_stop(void) | 78 | void timer_stop(void) |
79 | { | 79 | { |
80 | TIMER1.ctrl &= ~0x80; /* disable timer 1 */ | 80 | TIMER1.ctrl &= ~0x80; /* disable timer 1 */ |
81 | irq_disable_int(IRQ_TIMER1); | 81 | irq_disable_int(IRQ_TIMER1); |
diff --git a/firmware/target/arm/pnx0101/timer-target.h b/firmware/target/arm/pnx0101/timer-target.h index 853da07838..3bfdb8986d 100644 --- a/firmware/target/arm/pnx0101/timer-target.h +++ b/firmware/target/arm/pnx0101/timer-target.h | |||
@@ -21,19 +21,6 @@ | |||
21 | #ifndef TIMER_TARGET_H | 21 | #ifndef TIMER_TARGET_H |
22 | #define TIMER_TARGET_H | 22 | #define TIMER_TARGET_H |
23 | 23 | ||
24 | bool __timer_set(long cycles, bool start); | ||
25 | bool __timer_start(void); | ||
26 | void __timer_stop(void); | ||
27 | |||
28 | #define TIMER_FREQ 3000000 | 24 | #define TIMER_FREQ 3000000 |
29 | 25 | ||
30 | #define __TIMER_SET(cycles, set) \ | ||
31 | __timer_set(cycles, set) | ||
32 | |||
33 | #define __TIMER_START() \ | ||
34 | __timer_start() | ||
35 | |||
36 | #define __TIMER_STOP(...) \ | ||
37 | __timer_stop() | ||
38 | |||
39 | #endif /* TIMER_TARGET_H */ | 26 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/timer-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/timer-meg-fx.c index 884b0803a2..4565f79751 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/timer-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/timer-meg-fx.c | |||
@@ -48,7 +48,7 @@ static void stop_timer(void) | |||
48 | INTPND = TIMER0_MASK; | 48 | INTPND = TIMER0_MASK; |
49 | } | 49 | } |
50 | 50 | ||
51 | bool __timer_set(long cycles, bool start) | 51 | bool timer_set(long cycles, bool start) |
52 | { | 52 | { |
53 | bool retval = false; | 53 | bool retval = false; |
54 | 54 | ||
@@ -87,7 +87,7 @@ bool __timer_set(long cycles, bool start) | |||
87 | return retval; | 87 | return retval; |
88 | } | 88 | } |
89 | 89 | ||
90 | bool __timer_start(void) | 90 | bool timer_start(void) |
91 | { | 91 | { |
92 | bool retval = true; | 92 | bool retval = true; |
93 | 93 | ||
@@ -122,7 +122,7 @@ bool __timer_start(void) | |||
122 | return retval; | 122 | return retval; |
123 | } | 123 | } |
124 | 124 | ||
125 | void __timer_stop(void) | 125 | void timer_stop(void) |
126 | { | 126 | { |
127 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 127 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
128 | stop_timer(); | 128 | stop_timer(); |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h index 700833486d..215477a806 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h +++ b/firmware/target/arm/s3c2440/gigabeat-fx/timer-target.h | |||
@@ -25,17 +25,4 @@ | |||
25 | #define TIMER_FREQ (49156800/2) | 25 | #define TIMER_FREQ (49156800/2) |
26 | #define TIMER234_PRESCALE 21 | 26 | #define TIMER234_PRESCALE 21 |
27 | 27 | ||
28 | bool __timer_set(long cycles, bool set); | ||
29 | bool __timer_start(void); | ||
30 | void __timer_stop(void); | ||
31 | |||
32 | #define __TIMER_SET(cycles, set) \ | ||
33 | __timer_set(cycles, set) | ||
34 | |||
35 | #define __TIMER_START() \ | ||
36 | __timer_start() | ||
37 | |||
38 | #define __TIMER_STOP(...) \ | ||
39 | __timer_stop() | ||
40 | |||
41 | #endif /* TIMER_TARGET_H */ | 28 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/tcc77x/timer-target.h b/firmware/target/arm/tcc77x/timer-target.h index ace31ac886..a4d869067a 100644 --- a/firmware/target/arm/tcc77x/timer-target.h +++ b/firmware/target/arm/tcc77x/timer-target.h | |||
@@ -24,17 +24,4 @@ | |||
24 | /* timers are based on XIN (12Mhz) */ | 24 | /* timers are based on XIN (12Mhz) */ |
25 | #define TIMER_FREQ (12000000) | 25 | #define TIMER_FREQ (12000000) |
26 | 26 | ||
27 | bool __timer_set(long cycles, bool set); | ||
28 | bool __timer_start(void); | ||
29 | void __timer_stop(void); | ||
30 | |||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | __timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | __timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | __timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/tcc77x/timer-tcc77x.c b/firmware/target/arm/tcc77x/timer-tcc77x.c index ddf44454c2..6e8764d9ce 100644 --- a/firmware/target/arm/tcc77x/timer-tcc77x.c +++ b/firmware/target/arm/tcc77x/timer-tcc77x.c | |||
@@ -28,7 +28,7 @@ | |||
28 | /* Use the TC32 counter [sourced by Xin:12Mhz] for this timer, as it's the | 28 | /* Use the TC32 counter [sourced by Xin:12Mhz] for this timer, as it's the |
29 | only one that allows a 32-bit counter (Timer0-5 are 16/20 bit only). */ | 29 | only one that allows a 32-bit counter (Timer0-5 are 16/20 bit only). */ |
30 | 30 | ||
31 | bool __timer_set(long cycles, bool start) | 31 | bool timer_set(long cycles, bool start) |
32 | { | 32 | { |
33 | #warning function not implemented | 33 | #warning function not implemented |
34 | 34 | ||
@@ -37,14 +37,14 @@ bool __timer_set(long cycles, bool start) | |||
37 | return false; | 37 | return false; |
38 | } | 38 | } |
39 | 39 | ||
40 | bool __timer_start(void) | 40 | bool timer_start(void) |
41 | { | 41 | { |
42 | #warning function not implemented | 42 | #warning function not implemented |
43 | 43 | ||
44 | return false; | 44 | return false; |
45 | } | 45 | } |
46 | 46 | ||
47 | void __timer_stop(void) | 47 | void timer_stop(void) |
48 | { | 48 | { |
49 | #warning function not implemented | 49 | #warning function not implemented |
50 | } | 50 | } |
diff --git a/firmware/target/arm/tcc780x/timer-target.h b/firmware/target/arm/tcc780x/timer-target.h index d6a8c4b0aa..91a623a713 100644 --- a/firmware/target/arm/tcc780x/timer-target.h +++ b/firmware/target/arm/tcc780x/timer-target.h | |||
@@ -24,17 +24,4 @@ | |||
24 | /* Timer is based on PCK_TCT (set to 2Mhz in system.c) */ | 24 | /* Timer is based on PCK_TCT (set to 2Mhz in system.c) */ |
25 | #define TIMER_FREQ (2000000) | 25 | #define TIMER_FREQ (2000000) |
26 | 26 | ||
27 | bool __timer_set(long cycles, bool set); | ||
28 | bool __timer_start(void); | ||
29 | void __timer_stop(void); | ||
30 | |||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | __timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | __timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | __timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/tcc780x/timer-tcc780x.c b/firmware/target/arm/tcc780x/timer-tcc780x.c index ddd3b1d694..74502ae369 100644 --- a/firmware/target/arm/tcc780x/timer-tcc780x.c +++ b/firmware/target/arm/tcc780x/timer-tcc780x.c | |||
@@ -27,7 +27,7 @@ | |||
27 | 27 | ||
28 | static const int prescale_shifts[] = {1, 2, 3, 4, 5, 10, 12}; | 28 | static const int prescale_shifts[] = {1, 2, 3, 4, 5, 10, 12}; |
29 | 29 | ||
30 | bool __timer_set(long cycles, bool start) | 30 | bool timer_set(long cycles, bool start) |
31 | { | 31 | { |
32 | bool found = false; | 32 | bool found = false; |
33 | 33 | ||
@@ -62,7 +62,7 @@ bool __timer_set(long cycles, bool start) | |||
62 | return true; | 62 | return true; |
63 | } | 63 | } |
64 | 64 | ||
65 | bool __timer_start(void) | 65 | bool timer_start(void) |
66 | { | 66 | { |
67 | int oldstatus = disable_interrupt_save(IRQ_STATUS); | 67 | int oldstatus = disable_interrupt_save(IRQ_STATUS); |
68 | 68 | ||
@@ -73,7 +73,7 @@ bool __timer_start(void) | |||
73 | return true; | 73 | return true; |
74 | } | 74 | } |
75 | 75 | ||
76 | void __timer_stop(void) | 76 | void timer_stop(void) |
77 | { | 77 | { |
78 | int oldstatus = disable_interrupt_save(IRQ_STATUS); | 78 | int oldstatus = disable_interrupt_save(IRQ_STATUS); |
79 | 79 | ||
diff --git a/firmware/target/arm/timer-pp.c b/firmware/target/arm/timer-pp.c index 01c691f79e..a8879b1824 100644 --- a/firmware/target/arm/timer-pp.c +++ b/firmware/target/arm/timer-pp.c | |||
@@ -44,7 +44,7 @@ void TIMER2(void) | |||
44 | } | 44 | } |
45 | } | 45 | } |
46 | 46 | ||
47 | bool __timer_set(long cycles, bool start) | 47 | bool timer_set(long cycles, bool start) |
48 | { | 48 | { |
49 | if (cycles > 0x20000000 || cycles < 2) | 49 | if (cycles > 0x20000000 || cycles < 2) |
50 | return false; | 50 | return false; |
@@ -67,7 +67,7 @@ bool __timer_set(long cycles, bool start) | |||
67 | return true; | 67 | return true; |
68 | } | 68 | } |
69 | 69 | ||
70 | bool __timer_start(IF_COP_VOID(int core)) | 70 | bool timer_start(IF_COP_VOID(int core)) |
71 | { | 71 | { |
72 | /* unmask interrupt source */ | 72 | /* unmask interrupt source */ |
73 | #if NUM_CORES > 1 | 73 | #if NUM_CORES > 1 |
@@ -79,7 +79,7 @@ bool __timer_start(IF_COP_VOID(int core)) | |||
79 | return true; | 79 | return true; |
80 | } | 80 | } |
81 | 81 | ||
82 | void __timer_stop(void) | 82 | void timer_stop(void) |
83 | { | 83 | { |
84 | TIMER2_CFG = 0; /* stop timer 2 */ | 84 | TIMER2_CFG = 0; /* stop timer 2 */ |
85 | CPU_INT_DIS = TIMER2_MASK; | 85 | CPU_INT_DIS = TIMER2_MASK; |
diff --git a/firmware/target/arm/timer-target.h b/firmware/target/arm/timer-target.h index 7b7fdabdce..65867ab64b 100644 --- a/firmware/target/arm/timer-target.h +++ b/firmware/target/arm/timer-target.h | |||
@@ -28,25 +28,7 @@ | |||
28 | #error "PP specific header" | 28 | #error "PP specific header" |
29 | #endif | 29 | #endif |
30 | 30 | ||
31 | bool __timer_set(long cycles, bool start); | ||
32 | bool __timer_start(IF_COP_VOID(int core)); | ||
33 | void __timer_stop(void); | ||
34 | |||
35 | /* Portalplayer chips use a microsecond timer. */ | 31 | /* Portalplayer chips use a microsecond timer. */ |
36 | #define TIMER_FREQ 1000000 | 32 | #define TIMER_FREQ 1000000 |
37 | 33 | ||
38 | #define __TIMER_SET(cycles, set) \ | ||
39 | __timer_set(cycles, set) | ||
40 | |||
41 | #if NUM_CORES > 1 | ||
42 | #define __TIMER_START(core) \ | ||
43 | __timer_start(core) | ||
44 | #else | ||
45 | #define __TIMER_START() \ | ||
46 | __timer_start() | ||
47 | #endif | ||
48 | |||
49 | #define __TIMER_STOP(...) \ | ||
50 | __timer_stop() | ||
51 | |||
52 | #endif /* TIMER_TARGET_H */ | 34 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/arm/tms320dm320/timer-dm320.c b/firmware/target/arm/tms320dm320/timer-dm320.c index 9357ffa9de..ef1fac04eb 100644 --- a/firmware/target/arm/tms320dm320/timer-dm320.c +++ b/firmware/target/arm/tms320dm320/timer-dm320.c | |||
@@ -34,7 +34,7 @@ void TIMER0(void) | |||
34 | pfn_timer(); | 34 | pfn_timer(); |
35 | } | 35 | } |
36 | 36 | ||
37 | bool __timer_set(long cycles, bool start) | 37 | bool timer_set(long cycles, bool start) |
38 | { | 38 | { |
39 | int oldlevel; | 39 | int oldlevel; |
40 | unsigned int divider=cycles, prescaler=0; | 40 | unsigned int divider=cycles, prescaler=0; |
@@ -82,7 +82,7 @@ static void stop_timer(void) | |||
82 | IO_CLK_MOD2 &= ~CLK_MOD2_TMR0; //disable TIMER0 clock | 82 | IO_CLK_MOD2 &= ~CLK_MOD2_TMR0; //disable TIMER0 clock |
83 | } | 83 | } |
84 | 84 | ||
85 | bool __timer_start(void) | 85 | bool timer_start(void) |
86 | { | 86 | { |
87 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 87 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
88 | 88 | ||
@@ -100,7 +100,7 @@ bool __timer_start(void) | |||
100 | return true; | 100 | return true; |
101 | } | 101 | } |
102 | 102 | ||
103 | void __timer_stop(void) | 103 | void timer_stop(void) |
104 | { | 104 | { |
105 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 105 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
106 | stop_timer(); | 106 | stop_timer(); |
diff --git a/firmware/target/arm/tms320dm320/timer-target.h b/firmware/target/arm/tms320dm320/timer-target.h index 9f3ffdf712..c1cf9796de 100644 --- a/firmware/target/arm/tms320dm320/timer-target.h +++ b/firmware/target/arm/tms320dm320/timer-target.h | |||
@@ -24,17 +24,4 @@ | |||
24 | /* timer is based on PCLK and minimum division is 2 */ | 24 | /* timer is based on PCLK and minimum division is 2 */ |
25 | #define TIMER_FREQ (27000000) | 25 | #define TIMER_FREQ (27000000) |
26 | 26 | ||
27 | bool __timer_set(long cycles, bool set); | ||
28 | bool __timer_start(void); | ||
29 | void __timer_stop(void); | ||
30 | |||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | __timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | __timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | __timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/coldfire/timer-coldfire.c b/firmware/target/coldfire/timer-coldfire.c index ef9fd9ea7a..0916ebedf7 100644 --- a/firmware/target/coldfire/timer-coldfire.c +++ b/firmware/target/coldfire/timer-coldfire.c | |||
@@ -37,7 +37,7 @@ void TIMER1(void) | |||
37 | TER1 = 0xff; /* clear all events */ | 37 | TER1 = 0xff; /* clear all events */ |
38 | } | 38 | } |
39 | 39 | ||
40 | bool __timer_set(long cycles, bool start) | 40 | bool timer_set(long cycles, bool start) |
41 | { | 41 | { |
42 | int phi = 0; /* bits for the prescaler */ | 42 | int phi = 0; /* bits for the prescaler */ |
43 | int prescale = 1; | 43 | int prescale = 1; |
@@ -87,7 +87,7 @@ bool __timer_set(long cycles, bool start) | |||
87 | return true; | 87 | return true; |
88 | } | 88 | } |
89 | 89 | ||
90 | bool __timer_start(void) | 90 | bool timer_start(void) |
91 | { | 91 | { |
92 | ICR2 = 0x90; /* interrupt on level 4.0 */ | 92 | ICR2 = 0x90; /* interrupt on level 4.0 */ |
93 | and_l(~(1<<10), &IMR); | 93 | and_l(~(1<<10), &IMR); |
@@ -95,7 +95,7 @@ bool __timer_start(void) | |||
95 | return true; | 95 | return true; |
96 | } | 96 | } |
97 | 97 | ||
98 | void __timer_stop(void) | 98 | void timer_stop(void) |
99 | { | 99 | { |
100 | TMR1 = 0; /* disable timer 1 */ | 100 | TMR1 = 0; /* disable timer 1 */ |
101 | or_l((1<<10), &IMR); /* disable interrupt */ | 101 | or_l((1<<10), &IMR); /* disable interrupt */ |
diff --git a/firmware/target/coldfire/timer-target.h b/firmware/target/coldfire/timer-target.h index 29488887e8..3aff57de9e 100644 --- a/firmware/target/coldfire/timer-target.h +++ b/firmware/target/coldfire/timer-target.h | |||
@@ -21,20 +21,7 @@ | |||
21 | #ifndef TIMER_TARGET_H | 21 | #ifndef TIMER_TARGET_H |
22 | #define TIMER_TARGET_H | 22 | #define TIMER_TARGET_H |
23 | 23 | ||
24 | bool __timer_set(long cycles, bool start); | ||
25 | bool __timer_start(void); | ||
26 | void __timer_stop(void); | ||
27 | |||
28 | /* timer is based on busclk == cpuclk/2 */ | 24 | /* timer is based on busclk == cpuclk/2 */ |
29 | #define TIMER_FREQ (CPU_FREQ/2) | 25 | #define TIMER_FREQ (CPU_FREQ/2) |
30 | 26 | ||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | __timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | __timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | __timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c b/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c index 8258f7b2be..c174ca6eb1 100644 --- a/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c | |||
@@ -33,7 +33,7 @@ void TCU1(void) | |||
33 | pfn_timer(); | 33 | pfn_timer(); |
34 | } | 34 | } |
35 | 35 | ||
36 | bool __timer_set(long cycles, bool start) | 36 | bool timer_set(long cycles, bool start) |
37 | { | 37 | { |
38 | unsigned int divider = cycles, prescaler_bit = 0, prescaler = 1, old_irq; | 38 | unsigned int divider = cycles, prescaler_bit = 0, prescaler = 1, old_irq; |
39 | 39 | ||
@@ -79,14 +79,14 @@ bool __timer_set(long cycles, bool start) | |||
79 | return true; | 79 | return true; |
80 | } | 80 | } |
81 | 81 | ||
82 | bool __timer_start(void) | 82 | bool timer_start(void) |
83 | { | 83 | { |
84 | __tcu_start_counter(1); | 84 | __tcu_start_counter(1); |
85 | 85 | ||
86 | return true; | 86 | return true; |
87 | } | 87 | } |
88 | 88 | ||
89 | void __timer_stop(void) | 89 | void timer_stop(void) |
90 | { | 90 | { |
91 | unsigned int old_irq = disable_irq_save(); | 91 | unsigned int old_irq = disable_irq_save(); |
92 | __tcu_stop_counter(1); | 92 | __tcu_stop_counter(1); |
diff --git a/firmware/target/mips/ingenic_jz47xx/timer-target.h b/firmware/target/mips/ingenic_jz47xx/timer-target.h index 2e072440ab..a305afaf8b 100644 --- a/firmware/target/mips/ingenic_jz47xx/timer-target.h +++ b/firmware/target/mips/ingenic_jz47xx/timer-target.h | |||
@@ -26,17 +26,4 @@ | |||
26 | 26 | ||
27 | #define TIMER_FREQ (CFG_EXTAL) /* For full precision! */ | 27 | #define TIMER_FREQ (CFG_EXTAL) /* For full precision! */ |
28 | 28 | ||
29 | bool __timer_set(long cycles, bool set); | ||
30 | bool __timer_start(void); | ||
31 | void __timer_stop(void); | ||
32 | |||
33 | #define __TIMER_SET(cycles, set) \ | ||
34 | __timer_set(cycles, set) | ||
35 | |||
36 | #define __TIMER_START() \ | ||
37 | __timer_start() | ||
38 | |||
39 | #define __TIMER_STOP(...) \ | ||
40 | __timer_stop() | ||
41 | |||
42 | #endif /* __TIMER_H_ */ | 29 | #endif /* __TIMER_H_ */ |
diff --git a/firmware/target/sh/archos/timer-archos.c b/firmware/target/sh/archos/timer-archos.c index c61318f721..07d63ed3a8 100644 --- a/firmware/target/sh/archos/timer-archos.c +++ b/firmware/target/sh/archos/timer-archos.c | |||
@@ -32,7 +32,7 @@ void IMIA4(void) | |||
32 | and_b(~0x01, &TSR4); /* clear the interrupt */ | 32 | and_b(~0x01, &TSR4); /* clear the interrupt */ |
33 | } | 33 | } |
34 | 34 | ||
35 | bool __timer_set(long cycles, bool start) | 35 | bool timer_set(long cycles, bool start) |
36 | { | 36 | { |
37 | int phi = 0; /* bits for the prescaler */ | 37 | int phi = 0; /* bits for the prescaler */ |
38 | int prescale = 1; | 38 | int prescale = 1; |
@@ -71,14 +71,14 @@ bool __timer_set(long cycles, bool start) | |||
71 | return true; | 71 | return true; |
72 | } | 72 | } |
73 | 73 | ||
74 | bool __timer_start(void) | 74 | bool timer_start(void) |
75 | { | 75 | { |
76 | IPRD = (IPRD & 0xFF0F) | 1 << 4; /* interrupt priority */ | 76 | IPRD = (IPRD & 0xFF0F) | 1 << 4; /* interrupt priority */ |
77 | or_b(0x10, &TSTR); /* start timer 4 */ | 77 | or_b(0x10, &TSTR); /* start timer 4 */ |
78 | return true; | 78 | return true; |
79 | } | 79 | } |
80 | 80 | ||
81 | void __timer_stop(void) | 81 | void timer_stop(void) |
82 | { | 82 | { |
83 | and_b(~0x10, &TSTR); /* stop the timer 4 */ | 83 | and_b(~0x10, &TSTR); /* stop the timer 4 */ |
84 | IPRD = (IPRD & 0xFF0F); /* disable interrupt */ | 84 | IPRD = (IPRD & 0xFF0F); /* disable interrupt */ |
diff --git a/firmware/target/sh/archos/timer-target.h b/firmware/target/sh/archos/timer-target.h index 89dfe57eb3..6cdd442917 100644 --- a/firmware/target/sh/archos/timer-target.h +++ b/firmware/target/sh/archos/timer-target.h | |||
@@ -23,19 +23,6 @@ | |||
23 | 23 | ||
24 | #include "config.h" | 24 | #include "config.h" |
25 | 25 | ||
26 | bool __timer_set(long cycles, bool start); | ||
27 | bool __timer_start(void); | ||
28 | void __timer_stop(void); | ||
29 | |||
30 | #define TIMER_FREQ CPU_FREQ | 26 | #define TIMER_FREQ CPU_FREQ |
31 | 27 | ||
32 | #define __TIMER_SET(cycles, set) \ | ||
33 | __timer_set(cycles, set) | ||
34 | |||
35 | #define __TIMER_START() \ | ||
36 | __timer_start() | ||
37 | |||
38 | #define __TIMER_STOP(...) \ | ||
39 | __timer_stop() | ||
40 | |||
41 | #endif /* TIMER_TARGET_H */ | 28 | #endif /* TIMER_TARGET_H */ |
diff --git a/firmware/timer.c b/firmware/timer.c index 077176b96f..a923290a94 100644 --- a/firmware/timer.c +++ b/firmware/timer.c | |||
@@ -30,11 +30,6 @@ static int timer_prio = -1; | |||
30 | void SHAREDBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */ | 30 | void SHAREDBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */ |
31 | void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */ | 31 | void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */ |
32 | 32 | ||
33 | static bool timer_set(long cycles, bool start) | ||
34 | { | ||
35 | return __TIMER_SET(cycles, start); | ||
36 | } | ||
37 | |||
38 | /* Register a user timer, called every <cycles> TIMER_FREQ cycles */ | 33 | /* Register a user timer, called every <cycles> TIMER_FREQ cycles */ |
39 | bool timer_register(int reg_prio, void (*unregister_callback)(void), | 34 | bool timer_register(int reg_prio, void (*unregister_callback)(void), |
40 | long cycles, void (*timer_callback)(void) | 35 | long cycles, void (*timer_callback)(void) |
@@ -50,11 +45,7 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void), | |||
50 | pfn_unregister = unregister_callback; | 45 | pfn_unregister = unregister_callback; |
51 | timer_prio = reg_prio; | 46 | timer_prio = reg_prio; |
52 | 47 | ||
53 | #if NUM_CORES > 1 | 48 | return timer_start(IF_COP(core)); |
54 | return __TIMER_START(core); | ||
55 | #else | ||
56 | return __TIMER_START(); | ||
57 | #endif | ||
58 | } | 49 | } |
59 | 50 | ||
60 | bool timer_set_period(long cycles) | 51 | bool timer_set_period(long cycles) |
@@ -64,7 +55,7 @@ bool timer_set_period(long cycles) | |||
64 | 55 | ||
65 | void timer_unregister(void) | 56 | void timer_unregister(void) |
66 | { | 57 | { |
67 | __TIMER_STOP(); | 58 | timer_stop(); |
68 | 59 | ||
69 | pfn_timer = NULL; | 60 | pfn_timer = NULL; |
70 | pfn_unregister = NULL; | 61 | pfn_unregister = NULL; |