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authorMarcin Bukat <marcin.bukat@gmail.com>2013-07-18 23:55:35 +0200
committerMarcin Bukat <marcin.bukat@gmail.com>2013-11-24 00:10:36 +0100
commit8e633385912494ff5e871ec4c264d3a7db46fb98 (patch)
treea8d6b23861969b7df72bb79695ad742082ce2b02 /utils/hwstub/stub/rk27xx/hwstub.lds
parent1ed57aaa5049d2bbe4e94bed6674bd405e98a4a5 (diff)
downloadrockbox-8e633385912494ff5e871ec4c264d3a7db46fb98.tar.gz
rockbox-8e633385912494ff5e871ec4c264d3a7db46fb98.zip
hwstub rk27xx port
Change-Id: I85ac57117911544b65ccd56eb16303e30be67cab
Diffstat (limited to 'utils/hwstub/stub/rk27xx/hwstub.lds')
-rw-r--r--utils/hwstub/stub/rk27xx/hwstub.lds88
1 files changed, 88 insertions, 0 deletions
diff --git a/utils/hwstub/stub/rk27xx/hwstub.lds b/utils/hwstub/stub/rk27xx/hwstub.lds
new file mode 100644
index 0000000000..89b2b1961d
--- /dev/null
+++ b/utils/hwstub/stub/rk27xx/hwstub.lds
@@ -0,0 +1,88 @@
1ENTRY(start)
2OUTPUT_FORMAT(elf32-littlearm)
3OUTPUT_ARCH(arm)
4STARTUP(rk27xx/crt0.o)
5
6#define DRAMORIG 0x60000000
7#define DRAMSIZE (16 * 0x100000)
8#define DRAM_END_ADDRESS (DRAMORIG + DRAMSIZE)
9
10#define IRAMORIG 0x00000000
11#define IRAMSIZE 4K
12
13MEMORY
14{
15 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
16 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
17}
18
19SECTIONS
20{
21 .relocstart (NOLOAD) : {
22 _relocstart = .;
23 } > DRAM
24
25 .text : {
26 oc_codestart = .;
27 *(.init.text)
28 *(.text*)
29 *(.icode*)
30 *(.glue_7*)
31 } > DRAM
32
33 .intvect : {
34 _intvectstart = . ;
35 KEEP(*(.intvect))
36 _intvectend = . ;
37 } > IRAM AT > DRAM
38 _intvectcopy = LOADADDR(.intvect) ;
39
40 .rodata : {
41 *(.rodata*)
42 *(.irodata*)
43 . = ALIGN(0x4);
44 } > DRAM
45
46 .data : {
47 *(.data*)
48 *(.idata*)
49 . = ALIGN(0x4);
50 } > DRAM
51
52 .relocend (NOLOAD) : {
53 _relocend = .;
54 } > DRAM
55
56 .stack (NOLOAD) :
57 {
58 *(.stack)
59 oc_stackstart = .;
60 _stackbegin = .;
61 stackbegin = .;
62 . += 0x2000;
63 _stackend = .;
64 stackend = .;
65 _irqstackbegin = .;
66 . += 0x400;
67 _irqstackend = .;
68 _fiqstackbegin = .;
69 . += 0x400;
70 _fiqstackend = .;
71 oc_stackend = .;
72 } > DRAM
73
74 .bss (NOLOAD) : {
75 _edata = .;
76 *(.bss*);
77 *(.ibss);
78 *(COMMON);
79 . = ALIGN(0x4);
80 _end = .;
81 oc_codeend = .;
82 oc_bufferstart = .;
83 } > DRAM
84
85 .dramend DRAM_END_ADDRESS (NOLOAD) : {
86 oc_bufferend = .;
87 } > DRAM
88}