summaryrefslogtreecommitdiff
path: root/firmware/target
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2006-11-13 23:21:54 +0000
committerMichael Sevakis <jethead71@rockbox.org>2006-11-13 23:21:54 +0000
commitcc50c149e9452e7c8ea199fd72f7458ead96bad7 (patch)
tree78efc4e2c391f0cfcab8fe76777dab63070e64d9 /firmware/target
parentda55588fc7e0134decd4ba8cc573f507302a5664 (diff)
downloadrockbox-cc50c149e9452e7c8ea199fd72f7458ead96bad7.tar.gz
rockbox-cc50c149e9452e7c8ea199fd72f7458ead96bad7.zip
H100/General: HAL for S/PDIF and refinement/bufixes in optical output powering/source selection.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11523 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/coldfire/iriver/h100/power-h100.c25
-rw-r--r--firmware/target/coldfire/iriver/h100/spdif-h100.c83
-rw-r--r--firmware/target/coldfire/pcm-coldfire.c36
3 files changed, 112 insertions, 32 deletions
diff --git a/firmware/target/coldfire/iriver/h100/power-h100.c b/firmware/target/coldfire/iriver/h100/power-h100.c
index 0714ab2d3f..9effeef7c8 100644
--- a/firmware/target/coldfire/iriver/h100/power-h100.c
+++ b/firmware/target/coldfire/iriver/h100/power-h100.c
@@ -22,6 +22,7 @@
22#include "kernel.h" 22#include "kernel.h"
23#include "system.h" 23#include "system.h"
24#include "power.h" 24#include "power.h"
25#include "spdif.h"
25 26
26 27
27#ifdef CONFIG_TUNER 28#ifdef CONFIG_TUNER
@@ -85,8 +86,23 @@ void spdif_power_enable(bool on)
85 and_l(~0x01000000, &GPIO1_OUT); 86 and_l(~0x01000000, &GPIO1_OUT);
86 else 87 else
87 or_l(0x01000000, &GPIO1_OUT); 88 or_l(0x01000000, &GPIO1_OUT);
88} 89
90#ifndef BOOTLOADER
91 /* Make sure the feed is reset */
92 spdif_set_output_source(spdif_get_output_source(NULL), true);
89#endif 93#endif
94}
95
96bool spdif_powered(void)
97{
98 bool state = (GPIO1_READ & 0x01000000)?false:true;
99#ifdef SPDIF_POWER_INVERTED
100 return !state;
101#else
102 return state;
103#endif /* SPDIF_POWER_INVERTED */
104}
105#endif /* HAVE_SPDIF_POWER */
90 106
91void ide_power_enable(bool on) 107void ide_power_enable(bool on)
92{ 108{
@@ -96,13 +112,11 @@ void ide_power_enable(bool on)
96 or_l(0x80000000, &GPIO_OUT); 112 or_l(0x80000000, &GPIO_OUT);
97} 113}
98 114
99
100bool ide_powered(void) 115bool ide_powered(void)
101{ 116{
102 return (GPIO_OUT & 0x80000000)?false:true; 117 return (GPIO_OUT & 0x80000000)?false:true;
103} 118}
104 119
105
106void power_off(void) 120void power_off(void)
107{ 121{
108 set_irq_level(HIGHEST_IRQ_LEVEL); 122 set_irq_level(HIGHEST_IRQ_LEVEL);
@@ -138,6 +152,11 @@ void spdif_power_enable(bool on)
138{ 152{
139 (void)on; 153 (void)on;
140} 154}
155
156bool spdif_powered(void)
157{
158 return false;
159}
141#endif 160#endif
142 161
143#endif /* SIMULATOR */ 162#endif /* SIMULATOR */
diff --git a/firmware/target/coldfire/iriver/h100/spdif-h100.c b/firmware/target/coldfire/iriver/h100/spdif-h100.c
new file mode 100644
index 0000000000..20e5bc3c45
--- /dev/null
+++ b/firmware/target/coldfire/iriver/h100/spdif-h100.c
@@ -0,0 +1,83 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 by Michal Sevakis
11 * Based on the work of Thom Johansen
12 *
13 * All files in this archive are subject to the GNU General Public License.
14 * See the file COPYING in the source tree root for full license agreement.
15 *
16 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
17 * KIND, either express or implied.
18 *
19 ****************************************************************************/
20#include <stdbool.h>
21#include "config.h"
22#include "cpu.h"
23#include "power.h"
24#include "system.h"
25#include "audio.h"
26#include "spdif.h"
27
28static int spdif_source = AUDIO_SRC_PLAYBACK;
29static int spdif_on = false;
30
31/* Initialize the S/PDIF driver */
32void spdif_init(void)
33{
34 /* PHASECONFIG setup: gain = 3*2^13, source = EBUIN */
35 PHASECONFIG = (6 << 3) | (4 << 0);
36 spdif_set_output_source(AUDIO_SRC_PLAYBACK, true);
37}
38
39/* Return the S/PDIF frequency in herz - unrounded */
40unsigned long spdif_measure_frequency(void)
41{
42 /* The following formula is specified in MCF5249 user's manual section
43 * 17.6.1. The 128 divide is because of the fact that the SPDIF clock is
44 * the sample rate times 128.
45 */
46 return (unsigned long)((unsigned long long)FREQMEAS*CPU_FREQ /
47 ((1 << 15)*3*(1 << 13))/128);
48} /* spdif_measure_frequency */
49
50/* Set the S/PDIF audio feed */
51void spdif_set_output_source(int source, bool src_on)
52{
53 static const unsigned short ebu1_config[] =
54 {
55 /* SCLK2, TXSRC = PDOR3, validity, normal operation */
56 [AUDIO_SRC_PLAYBACK+1] = (7 << 12) | (3 << 8) | (1 << 5) | (5 << 2),
57 /* Input source is EBUin1, Feed-through monitoring */
58 [AUDIO_SRC_SPDIF+1] = (1 << 2),
59 /* SCLK2, TXSRC = IIS1recv, validity, normal operation */
60 [AUDIO_SRC_MIC+1] = (7 << 12) | (4 << 8) | (1 << 5) | (5 << 2),
61 [AUDIO_SRC_LINEIN+1] = (7 << 12) | (4 << 8) | (1 << 5) | (5 << 2),
62 [AUDIO_SRC_FMRADIO+1] = (7 << 12) | (4 << 8) | (1 << 5) | (5 << 2),
63 };
64
65 if ((unsigned)source >= ARRAYLEN(ebu1_config))
66 source = AUDIO_SRC_PLAYBACK;
67
68 EBU1CONFIG = 0x800; /* Reset before reprogram */
69
70 spdif_source = source;
71 spdif_on = spdif_powered() && src_on;
72
73 /* Tranceiver must be powered or else monitoring will be disabled */
74 EBU1CONFIG = spdif_on ? ebu1_config[source + 1] : 0;
75} /* spdif_set_output_source */
76
77/* Return the last set S/PDIF audio source */
78int spdif_get_output_source(bool *src_on)
79{
80 if (src_on != NULL)
81 *src_on = spdif_on;
82 return spdif_source;
83} /* spdif_get_output_source */
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c
index 6b92f9cc14..0048c9990c 100644
--- a/firmware/target/coldfire/pcm-coldfire.c
+++ b/firmware/target/coldfire/pcm-coldfire.c
@@ -26,6 +26,9 @@
26#elif defined(HAVE_TLV320) 26#elif defined(HAVE_TLV320)
27#include "tlv320.h" 27#include "tlv320.h"
28#endif 28#endif
29#if defined(HAVE_SPDIF_IN) || defined(HAVE_SPDIF_OUT)
30#include "spdif.h"
31#endif
29 32
30/* Avoid further #ifdef's for some codec functions */ 33/* Avoid further #ifdef's for some codec functions */
31#if defined(HAVE_UDA1380) 34#if defined(HAVE_UDA1380)
@@ -69,10 +72,6 @@ static int rec_peak_left, rec_peak_right;
69#define IIS_CONFIG IIS2CONFIG 72#define IIS_CONFIG IIS2CONFIG
70#define PLLCR_SET_AUDIO_BITS_DEFPARM \ 73#define PLLCR_SET_AUDIO_BITS_DEFPARM \
71 ((freq_ent[FPARM_CLSEL] << 28) | (3 << 22)) 74 ((freq_ent[FPARM_CLSEL] << 28) | (3 << 22))
72
73#ifdef HAVE_SPDIF_OUT
74#define EBU_DEFPARM ((7 << 12) | (3 << 8) | (1 << 5) | (5 << 2))
75#endif
76#endif 75#endif
77 76
78/** Sample rates **/ 77/** Sample rates **/
@@ -229,11 +228,6 @@ void pcm_play_dma_start(const void *addr, size_t size)
229 228
230 pcm_playing = true; 229 pcm_playing = true;
231 230
232 /* Reset the audio FIFO */
233#ifdef HAVE_SPDIF_OUT
234 EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
235#endif
236
237 /* Set up DMA transfer */ 231 /* Set up DMA transfer */
238 SAR0 = (unsigned long)addr; /* Source address */ 232 SAR0 = (unsigned long)addr; /* Source address */
239 DAR0 = (unsigned long)&PDOR3; /* Destination address */ 233 DAR0 = (unsigned long)&PDOR3; /* Destination address */
@@ -242,11 +236,6 @@ void pcm_play_dma_start(const void *addr, size_t size)
242 /* Enable the FIFO and force one write to it */ 236 /* Enable the FIFO and force one write to it */
243 pcm_apply_settings(false); 237 pcm_apply_settings(false);
244 238
245 /* Also send the audio to S/PDIF */
246#ifdef HAVE_SPDIF_OUT
247 EBU1CONFIG = EBU_DEFPARM;
248#endif
249
250 DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_AA | 239 DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_AA |
251 DMA_SINC | DMA_SSIZE(3) | DMA_START; 240 DMA_SINC | DMA_SSIZE(3) | DMA_START;
252} /* pcm_play_dma_start */ 241} /* pcm_play_dma_start */
@@ -263,10 +252,6 @@ void pcm_play_dma_stop(void)
263 252
264 /* Reset the FIFO */ 253 /* Reset the FIFO */
265 pcm_apply_settings(false); 254 pcm_apply_settings(false);
266
267#ifdef HAVE_SPDIF_OUT
268 EBU1CONFIG = IIS_RESET | EBU_DEFPARM;
269#endif
270} /* pcm_play_dma_stop */ 255} /* pcm_play_dma_stop */
271 256
272void pcm_init(void) 257void pcm_init(void)
@@ -291,6 +276,10 @@ void pcm_init(void)
291 /* Prevent pops (resets DAC to zero point) */ 276 /* Prevent pops (resets DAC to zero point) */
292 SET_IIS_CONFIG(IIS_DEFPARM | IIS_RESET); 277 SET_IIS_CONFIG(IIS_DEFPARM | IIS_RESET);
293 278
279#if defined(HAVE_SPDIF_IN) || defined(HAVE_SPDIF_OUT)
280 spdif_init();
281#endif
282
294 /* Initialize default register values. */ 283 /* Initialize default register values. */
295 ac_init(); 284 ac_init();
296 285
@@ -417,11 +406,6 @@ void pcm_init_recording(void)
417 DMACONFIG = 1; /* DMA0Req = PDOR3, DMA1Req = PDIR2 */ 406 DMACONFIG = 1; /* DMA0Req = PDOR3, DMA1Req = PDIR2 */
418 DMAROUTE = (DMAROUTE & 0xffff00ff) | DMA1_REQ_AUDIO_2; 407 DMAROUTE = (DMAROUTE & 0xffff00ff) | DMA1_REQ_AUDIO_2;
419 408
420#ifdef HAVE_SPDIF_IN
421 /* PHASECONFIG setup: gain = 3*2^13, source = EBUIN */
422 PHASECONFIG = (6 << 3) | (4 << 0);
423#endif
424
425 pcm_rec_dma_stop(); 409 pcm_rec_dma_stop();
426 410
427 ICR7 = (7 << 2); /* Enable interrupt at level 7, priority 0 */ 411 ICR7 = (7 << 2); /* Enable interrupt at level 7, priority 0 */
@@ -506,18 +490,12 @@ void pcm_play_pause_pause(void)
506 /* Disable DMA peripheral request. */ 490 /* Disable DMA peripheral request. */
507 DCR0 &= ~DMA_EEXT; 491 DCR0 &= ~DMA_EEXT;
508 pcm_apply_settings(true); 492 pcm_apply_settings(true);
509#ifdef HAVE_SPDIF_OUT
510 EBU1CONFIG = EBU_DEFPARM;
511#endif
512} /* pcm_play_pause_pause */ 493} /* pcm_play_pause_pause */
513 494
514void pcm_play_pause_unpause(void) 495void pcm_play_pause_unpause(void)
515{ 496{
516 /* Enable the FIFO and force one write to it */ 497 /* Enable the FIFO and force one write to it */
517 pcm_apply_settings(false); 498 pcm_apply_settings(false);
518#ifdef HAVE_SPDIF_OUT
519 EBU1CONFIG = EBU_DEFPARM;
520#endif
521 DCR0 |= DMA_EEXT | DMA_START; 499 DCR0 |= DMA_EEXT | DMA_START;
522} /* pcm_play_pause_unpause */ 500} /* pcm_play_pause_unpause */
523 501