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author | Nicolas Pennequin <nicolas.pennequin@free.fr> | 2008-05-05 10:32:46 +0000 |
---|---|---|
committer | Nicolas Pennequin <nicolas.pennequin@free.fr> | 2008-05-05 10:32:46 +0000 |
commit | 357ffb3c46a6c371fd84b56acd6f69cb6aad9bb8 (patch) | |
tree | 29035132e1313259010b945c7e37595939d369d9 /firmware/target | |
parent | ef5fa8eaf541a19ccf953051f119e4f56cf3c445 (diff) | |
download | rockbox-357ffb3c46a6c371fd84b56acd6f69cb6aad9bb8.tar.gz rockbox-357ffb3c46a6c371fd84b56acd6f69cb6aad9bb8.zip |
Convert the whole codebase to UTF-8, except docs/COMMITTERS and tools/creative.c, which need checking.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17369 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/tms320dm320/creative-zvm/pic-creativezvm.c | 4 | ||||
-rwxr-xr-x | firmware/target/arm/tms320dm320/i2c-dm320.c | 12 | ||||
-rw-r--r-- | firmware/target/arm/usb-drv-arc.c | 2 | ||||
-rw-r--r-- | firmware/target/coldfire/iaudio/m3/adc-m3.c | 8 | ||||
-rw-r--r-- | firmware/target/coldfire/iriver/h100/lcd-as-h100.S | 2 | ||||
-rw-r--r-- | firmware/target/coldfire/iriver/lcd-remote-iriver.c | 2 | ||||
-rw-r--r-- | firmware/target/sh/archos/lcd-as-archos-bitmap.S | 4 | ||||
-rw-r--r-- | firmware/target/sh/archos/player/lcd-as-player.S | 4 |
8 files changed, 19 insertions, 19 deletions
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/pic-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/pic-creativezvm.c index 334ef25683..836d46c067 100644 --- a/firmware/target/arm/tms320dm320/creative-zvm/pic-creativezvm.c +++ b/firmware/target/arm/tms320dm320/creative-zvm/pic-creativezvm.c | |||
@@ -271,7 +271,7 @@ void send_command_to_pic(unsigned char in, unsigned char* out, | |||
271 | IO_INTC_EINT1 &= ~INTR_EINT1_EXT0; | 271 | IO_INTC_EINT1 &= ~INTR_EINT1_EXT0; |
272 | /* Clear EXT0 interrupt */ | 272 | /* Clear EXT0 interrupt */ |
273 | IO_INTC_IRQ1 = INTR_IRQ1_EXT0; | 273 | IO_INTC_IRQ1 = INTR_IRQ1_EXT0; |
274 | /* Write command to I²C */ | 274 | /* Write command to I²C */ |
275 | restart: | 275 | restart: |
276 | i2c_write(PIC_ADR, &in, 1); | 276 | i2c_write(PIC_ADR, &in, 1); |
277 | /* Wait for PIC */ | 277 | /* Wait for PIC */ |
@@ -283,7 +283,7 @@ void send_command_to_pic(unsigned char in, unsigned char* out, | |||
283 | if(i > 50) | 283 | if(i > 50) |
284 | goto restart; | 284 | goto restart; |
285 | } | 285 | } |
286 | /* Read return from I²C */ | 286 | /* Read return from I²C */ |
287 | i2c_read(PIC_ADR, out, length); | 287 | i2c_read(PIC_ADR, out, length); |
288 | /* Re-enable GIO0 interrupt */ | 288 | /* Re-enable GIO0 interrupt */ |
289 | IO_INTC_EINT1 |= INTR_EINT1_EXT0; | 289 | IO_INTC_EINT1 |= INTR_EINT1_EXT0; |
diff --git a/firmware/target/arm/tms320dm320/i2c-dm320.c b/firmware/target/arm/tms320dm320/i2c-dm320.c index a87019c69c..7915ca5a94 100755 --- a/firmware/target/arm/tms320dm320/i2c-dm320.c +++ b/firmware/target/arm/tms320dm320/i2c-dm320.c | |||
@@ -9,7 +9,7 @@ | |||
9 | * | 9 | * |
10 | * Copyright (C) 2008 by Maurus Cuelenaere | 10 | * Copyright (C) 2008 by Maurus Cuelenaere |
11 | * | 11 | * |
12 | * DM320 I²C driver | 12 | * DM320 I²C driver |
13 | * | 13 | * |
14 | * All files in this archive are subject to the GNU General Public License. | 14 | * All files in this archive are subject to the GNU General Public License. |
15 | * See the file COPYING in the source tree root for full license agreement. | 15 | * See the file COPYING in the source tree root for full license agreement. |
@@ -145,12 +145,12 @@ int i2c_read(unsigned short address, unsigned char* buf, int count) | |||
145 | void i2c_init(void) | 145 | void i2c_init(void) |
146 | { | 146 | { |
147 | #if 0 //TODO: mimic OF I2C clock settings; currently this is done by the bootloader | 147 | #if 0 //TODO: mimic OF I2C clock settings; currently this is done by the bootloader |
148 | IO_CLK_MOD2 &= ~CLK_MOD2_I2C; // turn I²C clock off (just to be sure) | 148 | IO_CLK_MOD2 &= ~CLK_MOD2_I2C; // turn I²C clock off (just to be sure) |
149 | IO_CLK_LPCTL1 &= ~1; // set Powerdown mode to off | 149 | IO_CLK_LPCTL1 &= ~1; // set Powerdown mode to off |
150 | IO_CLK_SEL0 &= ~0x800; // set I²C clock to PLLA | 150 | IO_CLK_SEL0 &= ~0x800; // set I²C clock to PLLA |
151 | IO_CLK_DIV4 &= ~0x1F; // I²C clock division = 1 | 151 | IO_CLK_DIV4 &= ~0x1F; // I²C clock division = 1 |
152 | IO_CLK_MOD2 |= CLK_MOD2_I2C; // enable I²C clock | 152 | IO_CLK_MOD2 |= CLK_MOD2_I2C; // enable I²C clock |
153 | #endif | 153 | #endif |
154 | IO_I2C_SCS &= ~0x8; //set clock to 100 kHz | 154 | IO_I2C_SCS &= ~0x8; //set clock to 100 kHz |
155 | IO_INTC_EINT2 &= ~INTR_EINT2_I2C; // disable I²C interrupt | 155 | IO_INTC_EINT2 &= ~INTR_EINT2_I2C; // disable I²C interrupt |
156 | } | 156 | } |
diff --git a/firmware/target/arm/usb-drv-arc.c b/firmware/target/arm/usb-drv-arc.c index 7758cba2e7..f785535100 100644 --- a/firmware/target/arm/usb-drv-arc.c +++ b/firmware/target/arm/usb-drv-arc.c | |||
@@ -9,7 +9,7 @@ | |||
9 | * | 9 | * |
10 | * Driver for ARC USBOTG Device Controller | 10 | * Driver for ARC USBOTG Device Controller |
11 | * | 11 | * |
12 | * Copyright (C) 2007 by Björn Stenberg | 12 | * Copyright (C) 2007 by Björn Stenberg |
13 | * | 13 | * |
14 | * All files in this archive are subject to the GNU General Public License. | 14 | * All files in this archive are subject to the GNU General Public License. |
15 | * See the file COPYING in the source tree root for full license agreement. | 15 | * See the file COPYING in the source tree root for full license agreement. |
diff --git a/firmware/target/coldfire/iaudio/m3/adc-m3.c b/firmware/target/coldfire/iaudio/m3/adc-m3.c index 5997f2419a..9f5bf04a64 100644 --- a/firmware/target/coldfire/iaudio/m3/adc-m3.c +++ b/firmware/target/coldfire/iaudio/m3/adc-m3.c | |||
@@ -25,8 +25,8 @@ | |||
25 | 25 | ||
26 | #define ADC_I2C_ADDR 0xa0 | 26 | #define ADC_I2C_ADDR 0xa0 |
27 | 27 | ||
28 | /* The M3 ADC is hooked exclusively to the secondary I²C bus, and requires | 28 | /* The M3 ADC is hooked exclusively to the secondary I²C bus, and requires |
29 | * very slow transfers (I²C clock <= 16kHz). So we start one 4-byte read | 29 | * very slow transfers (I²C clock <= 16kHz). So we start one 4-byte read |
30 | * transfer each tick, and handle it via an ISR. At 11MHz, one transfer | 30 | * transfer each tick, and handle it via an ISR. At 11MHz, one transfer |
31 | * takes too long to be started every tick, but it seems we have to live | 31 | * takes too long to be started every tick, but it seems we have to live |
32 | * with that. */ | 32 | * with that. */ |
@@ -92,7 +92,7 @@ unsigned short adc_read(int channel) | |||
92 | 92 | ||
93 | void adc_init(void) | 93 | void adc_init(void) |
94 | { | 94 | { |
95 | MFDR2 = 0x1f; /* I²C clock = SYSCLK / 3840 */ | 95 | MFDR2 = 0x1f; /* I²C clock = SYSCLK / 3840 */ |
96 | MBCR2 = IEN; /* Enable interface */ | 96 | MBCR2 = IEN; /* Enable interface */ |
97 | MBSR2 = 0; /* Clear flags */ | 97 | MBSR2 = 0; /* Clear flags */ |
98 | MBCR2 = (IEN|IIEN); /* Enable interrupts */ | 98 | MBCR2 = (IEN|IIEN); /* Enable interrupts */ |
@@ -105,7 +105,7 @@ void adc_init(void) | |||
105 | sleep(1); /* Ensure valid readings when adc_init returns */ | 105 | sleep(1); /* Ensure valid readings when adc_init returns */ |
106 | } | 106 | } |
107 | 107 | ||
108 | /* The ADC (most probably the PIC12F675) obviously has a slow and buggy I²C | 108 | /* The ADC (most probably the PIC12F675) obviously has a slow and buggy I²C |
109 | * implementation. If a transfer is stopped prematurely, it often locks up | 109 | * implementation. If a transfer is stopped prematurely, it often locks up |
110 | * and doesn't react anymore until the unit is power cycled. */ | 110 | * and doesn't react anymore until the unit is power cycled. */ |
111 | 111 | ||
diff --git a/firmware/target/coldfire/iriver/h100/lcd-as-h100.S b/firmware/target/coldfire/iriver/h100/lcd-as-h100.S index 8e483d23ad..4cb6d13adf 100644 --- a/firmware/target/coldfire/iriver/h100/lcd-as-h100.S +++ b/firmware/target/coldfire/iriver/h100/lcd-as-h100.S | |||
@@ -8,7 +8,7 @@ | |||
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2004 by Jens Arnold | 10 | * Copyright (C) 2004 by Jens Arnold |
11 | * Based on the work of Alan Korr and Jörg Hohensohn | 11 | * Based on the work of Alan Korr and Jörg Hohensohn |
12 | * | 12 | * |
13 | * All files in this archive are subject to the GNU General Public License. | 13 | * All files in this archive are subject to the GNU General Public License. |
14 | * See the file COPYING in the source tree root for full license agreement. | 14 | * See the file COPYING in the source tree root for full license agreement. |
diff --git a/firmware/target/coldfire/iriver/lcd-remote-iriver.c b/firmware/target/coldfire/iriver/lcd-remote-iriver.c index 85ba0fef7a..83b7a022e5 100644 --- a/firmware/target/coldfire/iriver/lcd-remote-iriver.c +++ b/firmware/target/coldfire/iriver/lcd-remote-iriver.c | |||
@@ -7,7 +7,7 @@ | |||
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2005 by Richard S. La Charité III | 10 | * Copyright (C) 2005 by Richard S. La Charité III |
11 | * | 11 | * |
12 | * All files in this archive are subject to the GNU General Public License. | 12 | * All files in this archive are subject to the GNU General Public License. |
13 | * See the file COPYING in the source tree root for full license agreement. | 13 | * See the file COPYING in the source tree root for full license agreement. |
diff --git a/firmware/target/sh/archos/lcd-as-archos-bitmap.S b/firmware/target/sh/archos/lcd-as-archos-bitmap.S index f2ac525976..c6f95c23a3 100644 --- a/firmware/target/sh/archos/lcd-as-archos-bitmap.S +++ b/firmware/target/sh/archos/lcd-as-archos-bitmap.S | |||
@@ -8,7 +8,7 @@ | |||
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2004 by Jens Arnold | 10 | * Copyright (C) 2004 by Jens Arnold |
11 | * Based on the work of Alan Korr and Jörg Hohensohn | 11 | * Based on the work of Alan Korr and Jörg Hohensohn |
12 | * | 12 | * |
13 | * All files in this archive are subject to the GNU General Public License. | 13 | * All files in this archive are subject to the GNU General Public License. |
14 | * See the file COPYING in the source tree root for full license agreement. | 14 | * See the file COPYING in the source tree root for full license agreement. |
@@ -121,7 +121,7 @@ _lcd_write_data: | |||
121 | 121 | ||
122 | /* This code will fail if an interrupt changes the contents of PBDRL. | 122 | /* This code will fail if an interrupt changes the contents of PBDRL. |
123 | * If so, we must disable the interrupt here. If disabling interrupts | 123 | * If so, we must disable the interrupt here. If disabling interrupts |
124 | * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on | 124 | * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on |
125 | * recorders)is undesirable, the loop has to be rewritten to | 125 | * recorders)is undesirable, the loop has to be rewritten to |
126 | * disable/precalculate/transfer/enable for each iteration. However, | 126 | * disable/precalculate/transfer/enable for each iteration. However, |
127 | * this would significantly decrease performance. */ | 127 | * this would significantly decrease performance. */ |
diff --git a/firmware/target/sh/archos/player/lcd-as-player.S b/firmware/target/sh/archos/player/lcd-as-player.S index 6c19e1ab2f..3a80782735 100644 --- a/firmware/target/sh/archos/player/lcd-as-player.S +++ b/firmware/target/sh/archos/player/lcd-as-player.S | |||
@@ -8,7 +8,7 @@ | |||
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2004 by Jens Arnold | 10 | * Copyright (C) 2004 by Jens Arnold |
11 | * Based on the work of Alan Korr and Jörg Hohensohn | 11 | * Based on the work of Alan Korr and Jörg Hohensohn |
12 | * | 12 | * |
13 | * All files in this archive are subject to the GNU General Public License. | 13 | * All files in this archive are subject to the GNU General Public License. |
14 | * See the file COPYING in the source tree root for full license agreement. | 14 | * See the file COPYING in the source tree root for full license agreement. |
@@ -167,7 +167,7 @@ _lcd_write_data: | |||
167 | 167 | ||
168 | /* This code will fail if an interrupt changes the contents of PBDRL. | 168 | /* This code will fail if an interrupt changes the contents of PBDRL. |
169 | * If so, we must disable the interrupt here. If disabling interrupts | 169 | * If so, we must disable the interrupt here. If disabling interrupts |
170 | * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on | 170 | * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on |
171 | * recorders)is undesirable, the loop has to be rewritten to | 171 | * recorders)is undesirable, the loop has to be rewritten to |
172 | * disable/precalculate/transfer/enable for each iteration. However, | 172 | * disable/precalculate/transfer/enable for each iteration. However, |
173 | * this would significantly decrease performance. */ | 173 | * this would significantly decrease performance. */ |