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author | Solomon Peachy <pizza@shaftnet.org> | 2020-07-15 19:40:55 -0400 |
---|---|---|
committer | Solomon Peachy <pizza@shaftnet.org> | 2020-07-24 21:20:13 +0000 |
commit | 092c340a2062fa98b7387fc5fd63578ddae7d0b6 (patch) | |
tree | 98ec96946eeb2ae709cb0528cc6998e21bb9b290 /firmware/target/sh/archos/mascodec-archos.c | |
parent | 17f7cc92c258bc456a27c3e7c5a19c9409851879 (diff) | |
download | rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.tar.gz rockbox-092c340a2062fa98b7387fc5fd63578ddae7d0b6.zip |
[1/4] Remove SH support and all archos targets
This removes all code specific to SH targets
Change-Id: I7980523785d2596e65c06430f4638eec74a06061
Diffstat (limited to 'firmware/target/sh/archos/mascodec-archos.c')
-rw-r--r-- | firmware/target/sh/archos/mascodec-archos.c | 491 |
1 files changed, 0 insertions, 491 deletions
diff --git a/firmware/target/sh/archos/mascodec-archos.c b/firmware/target/sh/archos/mascodec-archos.c deleted file mode 100644 index faa5c7ef2b..0000000000 --- a/firmware/target/sh/archos/mascodec-archos.c +++ /dev/null | |||
@@ -1,491 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Linus Nielsen Feltzing | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "stdbool.h" | ||
22 | #include "config.h" | ||
23 | #include "sh7034.h" | ||
24 | #include "i2c.h" | ||
25 | #include "debug.h" | ||
26 | #include "mas35xx.h" | ||
27 | #include "kernel.h" | ||
28 | #include "system.h" | ||
29 | #include "hwcompat.h" | ||
30 | |||
31 | static int mas_devread(unsigned long *dest, int len); | ||
32 | |||
33 | #if 0 /* Currently unused, left for reference and future use */ | ||
34 | int mas_default_read(unsigned short *buf) | ||
35 | { | ||
36 | unsigned char *dest = (unsigned char *)buf; | ||
37 | int ret = 0; | ||
38 | |||
39 | i2c_begin(); | ||
40 | |||
41 | i2c_start(); | ||
42 | i2c_outb(MAS_DEV_WRITE); | ||
43 | if (i2c_getack()) { | ||
44 | i2c_outb(MAS_DATA_READ); | ||
45 | if (i2c_getack()) { | ||
46 | i2c_start(); | ||
47 | i2c_outb(MAS_DEV_READ); | ||
48 | if (i2c_getack()) { | ||
49 | dest[0] = i2c_inb(0); | ||
50 | dest[1] = i2c_inb(1); | ||
51 | } | ||
52 | else | ||
53 | ret = -3; | ||
54 | } | ||
55 | else | ||
56 | ret = -2; | ||
57 | } | ||
58 | else | ||
59 | ret = -1; | ||
60 | |||
61 | i2c_stop(); | ||
62 | |||
63 | i2c_end(); | ||
64 | return ret; | ||
65 | } | ||
66 | #endif | ||
67 | |||
68 | #if CONFIG_CODEC == MAS3507D | ||
69 | int mas_run(unsigned short address) | ||
70 | { | ||
71 | int ret = 0; | ||
72 | unsigned char buf[3]; | ||
73 | |||
74 | i2c_begin(); | ||
75 | |||
76 | buf[0] = MAS_DATA_WRITE; | ||
77 | buf[1] = address >> 8; | ||
78 | buf[2] = address & 0xff; | ||
79 | |||
80 | /* send run command */ | ||
81 | if (i2c_write(MAS_DEV_WRITE,buf,3)) | ||
82 | { | ||
83 | ret = -1; | ||
84 | } | ||
85 | |||
86 | i2c_end(); | ||
87 | return ret; | ||
88 | } | ||
89 | #endif | ||
90 | |||
91 | /* note: 'len' is number of 32-bit words, not number of bytes! */ | ||
92 | int mas_readmem(int bank, int addr, unsigned long* dest, int len) | ||
93 | { | ||
94 | int ret = 0; | ||
95 | unsigned char buf[7]; | ||
96 | |||
97 | i2c_begin(); | ||
98 | |||
99 | buf[0] = MAS_DATA_WRITE; | ||
100 | buf[1] = bank?MAS_CMD_READ_D1_MEM:MAS_CMD_READ_D0_MEM; | ||
101 | buf[2] = 0x00; | ||
102 | buf[3] = (len & 0xff00) >> 8; | ||
103 | buf[4] = len & 0xff; | ||
104 | buf[5] = (addr & 0xff00) >> 8; | ||
105 | buf[6] = addr & 0xff; | ||
106 | |||
107 | /* send read command */ | ||
108 | if (i2c_write(MAS_DEV_WRITE,buf,7)) | ||
109 | { | ||
110 | ret = -1; | ||
111 | } | ||
112 | |||
113 | ret = mas_devread(dest, len); | ||
114 | |||
115 | i2c_end(); | ||
116 | return ret; | ||
117 | } | ||
118 | |||
119 | /* note: 'len' is number of 32-bit words, not number of bytes! */ | ||
120 | int mas_writemem(int bank, int addr, const unsigned long* src, int len) | ||
121 | { | ||
122 | int ret = 0; | ||
123 | int i, j; | ||
124 | unsigned char buf[60]; | ||
125 | const unsigned char* ptr = (const unsigned char*)src; | ||
126 | |||
127 | i2c_begin(); | ||
128 | |||
129 | i=0; | ||
130 | buf[i++] = MAS_DATA_WRITE; | ||
131 | buf[i++] = bank?MAS_CMD_WRITE_D1_MEM:MAS_CMD_WRITE_D0_MEM; | ||
132 | buf[i++] = 0x00; | ||
133 | buf[i++] = (len & 0xff00) >> 8; | ||
134 | buf[i++] = len & 0xff; | ||
135 | buf[i++] = (addr & 0xff00) >> 8; | ||
136 | buf[i++] = addr & 0xff; | ||
137 | |||
138 | j = 0; | ||
139 | while(len--) { | ||
140 | #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) | ||
141 | buf[i++] = 0; | ||
142 | buf[i++] = ptr[j+1]; | ||
143 | buf[i++] = ptr[j+2]; | ||
144 | buf[i++] = ptr[j+3]; | ||
145 | #else | ||
146 | buf[i++] = ptr[j+2]; | ||
147 | buf[i++] = ptr[j+3]; | ||
148 | buf[i++] = 0; | ||
149 | buf[i++] = ptr[j+1]; | ||
150 | #endif | ||
151 | j += 4; | ||
152 | } | ||
153 | |||
154 | /* send write command */ | ||
155 | if (i2c_write(MAS_DEV_WRITE,buf,i)) | ||
156 | { | ||
157 | ret = -1; | ||
158 | } | ||
159 | |||
160 | i2c_end(); | ||
161 | return ret; | ||
162 | } | ||
163 | |||
164 | int mas_readreg(int reg) | ||
165 | { | ||
166 | int ret = 0; | ||
167 | unsigned char buf[16]; | ||
168 | unsigned long value; | ||
169 | |||
170 | i2c_begin(); | ||
171 | |||
172 | buf[0] = MAS_DATA_WRITE; | ||
173 | buf[1] = MAS_CMD_READ_REG | (reg >> 4); | ||
174 | buf[2] = (reg & 0x0f) << 4; | ||
175 | |||
176 | /* send read command */ | ||
177 | if (i2c_write(MAS_DEV_WRITE,buf,3)) | ||
178 | { | ||
179 | ret = -1; | ||
180 | } | ||
181 | else | ||
182 | { | ||
183 | if(mas_devread(&value, 1)) | ||
184 | { | ||
185 | ret = -2; | ||
186 | } | ||
187 | else | ||
188 | { | ||
189 | ret = value; | ||
190 | } | ||
191 | } | ||
192 | |||
193 | i2c_end(); | ||
194 | return ret; | ||
195 | } | ||
196 | |||
197 | int mas_writereg(int reg, unsigned int val) | ||
198 | { | ||
199 | int ret = 0; | ||
200 | unsigned char buf[5]; | ||
201 | |||
202 | i2c_begin(); | ||
203 | |||
204 | buf[0] = MAS_DATA_WRITE; | ||
205 | buf[1] = MAS_CMD_WRITE_REG | (reg >> 4); | ||
206 | #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) | ||
207 | buf[2] = ((reg & 0x0f) << 4) | (val >> 16 & 0x0f); | ||
208 | buf[3] = (val >> 8) & 0xff; | ||
209 | buf[4] = val & 0xff; | ||
210 | #else | ||
211 | buf[2] = ((reg & 0x0f) << 4) | (val & 0x0f); | ||
212 | buf[3] = (val >> 12) & 0xff; | ||
213 | buf[4] = (val >> 4) & 0xff; | ||
214 | #endif | ||
215 | |||
216 | /* send write command */ | ||
217 | if (i2c_write(MAS_DEV_WRITE,buf,5)) | ||
218 | { | ||
219 | ret = -1; | ||
220 | } | ||
221 | |||
222 | i2c_end(); | ||
223 | return ret; | ||
224 | } | ||
225 | |||
226 | /* note: 'len' is number of 32-bit words, not number of bytes! */ | ||
227 | static int mas_devread(unsigned long *dest, int len) | ||
228 | { | ||
229 | int ret = 0; | ||
230 | unsigned char* ptr = (unsigned char*)dest; | ||
231 | int i; | ||
232 | |||
233 | /* handle read-back */ | ||
234 | /* Remember, the MAS values are only 20 bits, so we set | ||
235 | the upper 12 bits to 0 */ | ||
236 | i2c_start(); | ||
237 | i2c_outb(MAS_DEV_WRITE); | ||
238 | if (i2c_getack()) { | ||
239 | i2c_outb(MAS_DATA_READ); | ||
240 | if (i2c_getack()) { | ||
241 | i2c_start(); | ||
242 | i2c_outb(MAS_DEV_READ); | ||
243 | if (i2c_getack()) { | ||
244 | for (i=0;len;i++) { | ||
245 | len--; | ||
246 | #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) | ||
247 | i2c_inb(0); /* Dummy read */ | ||
248 | ptr[i*4+0] = 0; | ||
249 | ptr[i*4+1] = i2c_inb(0) & 0x0f; | ||
250 | ptr[i*4+2] = i2c_inb(0); | ||
251 | if(len) | ||
252 | ptr[i*4+3] = i2c_inb(0); | ||
253 | else | ||
254 | ptr[i*4+3] = i2c_inb(1); /* NAK the last byte */ | ||
255 | #else | ||
256 | ptr[i*4+2] = i2c_inb(0); | ||
257 | ptr[i*4+3] = i2c_inb(0); | ||
258 | ptr[i*4+0] = i2c_inb(0); | ||
259 | if(len) | ||
260 | ptr[i*4+1] = i2c_inb(0); | ||
261 | else | ||
262 | ptr[i*4+1] = i2c_inb(1); /* NAK the last byte */ | ||
263 | #endif | ||
264 | } | ||
265 | } | ||
266 | else | ||
267 | ret = -3; | ||
268 | } | ||
269 | else | ||
270 | ret = -2; | ||
271 | } | ||
272 | else | ||
273 | ret = -1; | ||
274 | |||
275 | i2c_stop(); | ||
276 | |||
277 | return ret; | ||
278 | } | ||
279 | |||
280 | void mas_reset(void) | ||
281 | { | ||
282 | or_b(0x01, &PAIORH); | ||
283 | |||
284 | #if CONFIG_CODEC == MAS3507D | ||
285 | /* PB5 is "MAS enable". make it GPIO output and high */ | ||
286 | PBCR2 &= ~0x0c00; | ||
287 | or_b(0x20, &PBIORL); | ||
288 | or_b(0x20, &PBDRL); | ||
289 | |||
290 | and_b(~0x01, &PADRH); | ||
291 | sleep(HZ/100); | ||
292 | or_b(0x01, &PADRH); | ||
293 | sleep(HZ/5); | ||
294 | #elif (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) | ||
295 | if (HW_MASK & ATA_ADDRESS_200) | ||
296 | { | ||
297 | and_b(~0x01, &PADRH); | ||
298 | sleep(HZ/100); | ||
299 | or_b(0x01, &PADRH); | ||
300 | sleep(HZ/5); | ||
301 | } | ||
302 | else | ||
303 | { | ||
304 | /* Older recorder models don't invert the POR signal */ | ||
305 | or_b(0x01, &PADRH); | ||
306 | sleep(HZ/100); | ||
307 | and_b(~0x01, &PADRH); | ||
308 | sleep(HZ/5); | ||
309 | } | ||
310 | #endif | ||
311 | } | ||
312 | |||
313 | #if (CONFIG_CODEC == MAS3587F) || (CONFIG_CODEC == MAS3539F) | ||
314 | #if 0 /* Currently unused, left for reference and future use */ | ||
315 | int mas_direct_config_read(unsigned char reg) | ||
316 | { | ||
317 | int ret = 0; | ||
318 | unsigned char tmp[2]; | ||
319 | |||
320 | i2c_begin(); | ||
321 | |||
322 | i2c_start(); | ||
323 | i2c_outb(MAS_DEV_WRITE); | ||
324 | if (i2c_getack()) { | ||
325 | i2c_outb(reg); | ||
326 | if (i2c_getack()) { | ||
327 | i2c_start(); | ||
328 | i2c_outb(MAS_DEV_READ); | ||
329 | if (i2c_getack()) { | ||
330 | tmp[0] = i2c_inb(0); | ||
331 | tmp[1] = i2c_inb(1); /* NAK the last byte */ | ||
332 | ret = (tmp[0] << 8) | tmp[1]; | ||
333 | } | ||
334 | else | ||
335 | ret = -3; | ||
336 | } | ||
337 | else | ||
338 | ret = -2; | ||
339 | } | ||
340 | else | ||
341 | ret = -1; | ||
342 | |||
343 | i2c_stop(); | ||
344 | |||
345 | i2c_end(); | ||
346 | return ret; | ||
347 | } | ||
348 | #endif | ||
349 | |||
350 | int mas_direct_config_write(unsigned char reg, unsigned int val) | ||
351 | { | ||
352 | int ret = 0; | ||
353 | unsigned char buf[3]; | ||
354 | |||
355 | i2c_begin(); | ||
356 | |||
357 | buf[0] = reg; | ||
358 | buf[1] = (val >> 8) & 0xff; | ||
359 | buf[2] = val & 0xff; | ||
360 | |||
361 | /* send write command */ | ||
362 | if (i2c_write(MAS_DEV_WRITE,buf,3)) | ||
363 | { | ||
364 | ret = -1; | ||
365 | } | ||
366 | |||
367 | i2c_end(); | ||
368 | return ret; | ||
369 | } | ||
370 | |||
371 | int mas_codec_writereg(int reg, unsigned int val) | ||
372 | { | ||
373 | int ret = 0; | ||
374 | unsigned char buf[5]; | ||
375 | |||
376 | i2c_begin(); | ||
377 | |||
378 | buf[0] = MAS_CODEC_WRITE; | ||
379 | buf[1] = (reg >> 8) & 0xff; | ||
380 | buf[2] = reg & 0xff; | ||
381 | buf[3] = (val >> 8) & 0xff; | ||
382 | buf[4] = val & 0xff; | ||
383 | |||
384 | /* send write command */ | ||
385 | if (i2c_write(MAS_DEV_WRITE,buf,5)) | ||
386 | { | ||
387 | ret = -1; | ||
388 | } | ||
389 | |||
390 | i2c_end(); | ||
391 | return ret; | ||
392 | } | ||
393 | |||
394 | int mas_codec_readreg(int reg) | ||
395 | { | ||
396 | int ret = 0; | ||
397 | unsigned char buf[16]; | ||
398 | unsigned char tmp[2]; | ||
399 | |||
400 | i2c_begin(); | ||
401 | |||
402 | buf[0] = MAS_CODEC_WRITE; | ||
403 | buf[1] = (reg >> 8) & 0xff; | ||
404 | buf[2] = reg & 0xff; | ||
405 | |||
406 | /* send read command */ | ||
407 | if (i2c_write(MAS_DEV_WRITE,buf,3)) | ||
408 | { | ||
409 | ret = -1; | ||
410 | } | ||
411 | else | ||
412 | { | ||
413 | i2c_start(); | ||
414 | i2c_outb(MAS_DEV_WRITE); | ||
415 | if (i2c_getack()) { | ||
416 | i2c_outb(MAS_CODEC_READ); | ||
417 | if (i2c_getack()) { | ||
418 | i2c_start(); | ||
419 | i2c_outb(MAS_DEV_READ); | ||
420 | if (i2c_getack()) { | ||
421 | tmp[0] = i2c_inb(0); | ||
422 | tmp[1] = i2c_inb(1); /* NAK the last byte */ | ||
423 | ret = (tmp[0] << 8) | tmp[1]; | ||
424 | } | ||
425 | else | ||
426 | ret = -4; | ||
427 | } | ||
428 | else | ||
429 | ret = -3; | ||
430 | } | ||
431 | else | ||
432 | ret = -2; | ||
433 | |||
434 | i2c_stop(); | ||
435 | } | ||
436 | |||
437 | i2c_end(); | ||
438 | return ret; | ||
439 | } | ||
440 | |||
441 | unsigned long mas_readver(void) | ||
442 | { | ||
443 | int ret = 0; | ||
444 | unsigned char buf[16]; | ||
445 | unsigned long value; | ||
446 | |||
447 | i2c_begin(); | ||
448 | |||
449 | buf[0] = MAS_DATA_WRITE; | ||
450 | buf[1] = MAS_CMD_READ_IC_VER; | ||
451 | buf[2] = 0; | ||
452 | |||
453 | /* send read command */ | ||
454 | if (i2c_write(MAS_DEV_WRITE,buf,3)) | ||
455 | { | ||
456 | ret = -1; | ||
457 | } | ||
458 | else | ||
459 | { | ||
460 | if(mas_devread(&value, 1)) | ||
461 | { | ||
462 | ret = -2; | ||
463 | } | ||
464 | else | ||
465 | { | ||
466 | ret = value; | ||
467 | } | ||
468 | } | ||
469 | |||
470 | i2c_end(); | ||
471 | return ret; | ||
472 | } | ||
473 | |||
474 | #endif | ||
475 | |||
476 | #if CONFIG_TUNER & S1A0903X01 | ||
477 | static int pllfreq; | ||
478 | |||
479 | void mas_store_pllfreq(int freq) | ||
480 | { | ||
481 | pllfreq = freq; | ||
482 | } | ||
483 | |||
484 | int mas_get_pllfreq(void) | ||
485 | { | ||
486 | return pllfreq; | ||
487 | } | ||
488 | #endif | ||
489 | |||
490 | |||
491 | |||