x1000: Complete the register definitions

I think this covers everything now, although some fields are missing
enum values. Those can be added in if and when they are needed.

Change-Id: Ib1a94ba9c9a5949b6a038f8c1a49786823fae58f

1 files changed, 390 insertions, 0 deletions

diff --git a/firmware/target/mips/ingenic_x1000/x1000/uart.h b/firmware/target/mips/ingenic_x1000/x1000/uart.h
new file mode 100644
index 0000000000..6b42740bb7
--- /dev/null
+++ b/firmware/target/mips/ingenic_x1000/x1000/uart.h
@@ -0,0 +1,390 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * This file was automatically generated by headergen, DO NOT EDIT it.
+ * headergen version: 3.0.0
+ * x1000 version: 1.0
+ * x1000 authors: Aidan MacDonald
+ *
+ * Copyright (C) 2015 by the authors
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __HEADERGEN_UART_H__
+#define __HEADERGEN_UART_H__
+
+#include "macro.h"
+
+#define REG_UART_URBR(_n1)  jz_reg(UART_URBR(_n1))
+#define JA_UART_URBR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x0)
+#define JT_UART_URBR(_n1)   JIO_32_RW
+#define JN_UART_URBR(_n1)   UART_URBR
+#define JI_UART_URBR(_n1)   (_n1)
+
+#define REG_UART_UTHR(_n1)  jz_reg(UART_UTHR(_n1))
+#define JA_UART_UTHR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x0)
+#define JT_UART_UTHR(_n1)   JIO_32_RW
+#define JN_UART_UTHR(_n1)   UART_UTHR
+#define JI_UART_UTHR(_n1)   (_n1)
+
+#define REG_UART_UDLLR(_n1) jz_reg(UART_UDLLR(_n1))
+#define JA_UART_UDLLR(_n1)  (0xb0030000 + (_n1) * 0x1000 + 0x0)
+#define JT_UART_UDLLR(_n1)  JIO_32_RW
+#define JN_UART_UDLLR(_n1)  UART_UDLLR
+#define JI_UART_UDLLR(_n1)  (_n1)
+
+#define REG_UART_UDLHR(_n1) jz_reg(UART_UDLHR(_n1))
+#define JA_UART_UDLHR(_n1)  (0xb0030000 + (_n1) * 0x1000 + 0x4)
+#define JT_UART_UDLHR(_n1)  JIO_32_RW
+#define JN_UART_UDLHR(_n1)  UART_UDLHR
+#define JI_UART_UDLHR(_n1)  (_n1)
+
+#define REG_UART_UIER(_n1)          jz_reg(UART_UIER(_n1))
+#define JA_UART_UIER(_n1)           (0xb0030000 + (_n1) * 0x1000 + 0x4)
+#define JT_UART_UIER(_n1)           JIO_32_RW
+#define JN_UART_UIER(_n1)           UART_UIER
+#define JI_UART_UIER(_n1)           (_n1)
+#define BP_UART_UIER_RTOIE          4
+#define BM_UART_UIER_RTOIE          0x10
+#define BF_UART_UIER_RTOIE(v)       (((v) & 0x1) << 4)
+#define BFM_UART_UIER_RTOIE(v)      BM_UART_UIER_RTOIE
+#define BF_UART_UIER_RTOIE_V(e)     BF_UART_UIER_RTOIE(BV_UART_UIER_RTOIE__##e)
+#define BFM_UART_UIER_RTOIE_V(v)    BM_UART_UIER_RTOIE
+#define BP_UART_UIER_MSIE           3
+#define BM_UART_UIER_MSIE           0x8
+#define BF_UART_UIER_MSIE(v)        (((v) & 0x1) << 3)
+#define BFM_UART_UIER_MSIE(v)       BM_UART_UIER_MSIE
+#define BF_UART_UIER_MSIE_V(e)      BF_UART_UIER_MSIE(BV_UART_UIER_MSIE__##e)
+#define BFM_UART_UIER_MSIE_V(v)     BM_UART_UIER_MSIE
+#define BP_UART_UIER_RLSIE          2
+#define BM_UART_UIER_RLSIE          0x4
+#define BF_UART_UIER_RLSIE(v)       (((v) & 0x1) << 2)
+#define BFM_UART_UIER_RLSIE(v)      BM_UART_UIER_RLSIE
+#define BF_UART_UIER_RLSIE_V(e)     BF_UART_UIER_RLSIE(BV_UART_UIER_RLSIE__##e)
+#define BFM_UART_UIER_RLSIE_V(v)    BM_UART_UIER_RLSIE
+#define BP_UART_UIER_TDRIE          1
+#define BM_UART_UIER_TDRIE          0x2
+#define BF_UART_UIER_TDRIE(v)       (((v) & 0x1) << 1)
+#define BFM_UART_UIER_TDRIE(v)      BM_UART_UIER_TDRIE
+#define BF_UART_UIER_TDRIE_V(e)     BF_UART_UIER_TDRIE(BV_UART_UIER_TDRIE__##e)
+#define BFM_UART_UIER_TDRIE_V(v)    BM_UART_UIER_TDRIE
+#define BP_UART_UIER_RDRIE          0
+#define BM_UART_UIER_RDRIE          0x1
+#define BF_UART_UIER_RDRIE(v)       (((v) & 0x1) << 0)
+#define BFM_UART_UIER_RDRIE(v)      BM_UART_UIER_RDRIE
+#define BF_UART_UIER_RDRIE_V(e)     BF_UART_UIER_RDRIE(BV_UART_UIER_RDRIE__##e)
+#define BFM_UART_UIER_RDRIE_V(v)    BM_UART_UIER_RDRIE
+
+#define REG_UART_UIIR(_n1)                      jz_reg(UART_UIIR(_n1))
+#define JA_UART_UIIR(_n1)                       (0xb0030000 + (_n1) * 0x1000 + 0x8)
+#define JT_UART_UIIR(_n1)                       JIO_32_RW
+#define JN_UART_UIIR(_n1)                       UART_UIIR
+#define JI_UART_UIIR(_n1)                       (_n1)
+#define BP_UART_UIIR_FFMSEL                     6
+#define BM_UART_UIIR_FFMSEL                     0xc0
+#define BV_UART_UIIR_FFMSEL__NON_FIFO_MODE      0x0
+#define BV_UART_UIIR_FFMSEL__FIFO_MODE          0x1
+#define BF_UART_UIIR_FFMSEL(v)                  (((v) & 0x3) << 6)
+#define BFM_UART_UIIR_FFMSEL(v)                 BM_UART_UIIR_FFMSEL
+#define BF_UART_UIIR_FFMSEL_V(e)                BF_UART_UIIR_FFMSEL(BV_UART_UIIR_FFMSEL__##e)
+#define BFM_UART_UIIR_FFMSEL_V(v)               BM_UART_UIIR_FFMSEL
+#define BP_UART_UIIR_INID                       1
+#define BM_UART_UIIR_INID                       0xe
+#define BV_UART_UIIR_INID__MODEM_STATUS         0x0
+#define BV_UART_UIIR_INID__TRANSMIT_DATA_REQ    0x1
+#define BV_UART_UIIR_INID__RECEIVE_DATA_READY   0x2
+#define BV_UART_UIIR_INID__RECEIVE_LINE_STATUS  0x3
+#define BV_UART_UIIR_INID__RECEIVE_TIME_OUT     0x6
+#define BF_UART_UIIR_INID(v)                    (((v) & 0x7) << 1)
+#define BFM_UART_UIIR_INID(v)                   BM_UART_UIIR_INID
+#define BF_UART_UIIR_INID_V(e)                  BF_UART_UIIR_INID(BV_UART_UIIR_INID__##e)
+#define BFM_UART_UIIR_INID_V(v)                 BM_UART_UIIR_INID
+#define BP_UART_UIIR_INPEND                     0
+#define BM_UART_UIIR_INPEND                     0x1
+#define BF_UART_UIIR_INPEND(v)                  (((v) & 0x1) << 0)
+#define BFM_UART_UIIR_INPEND(v)                 BM_UART_UIIR_INPEND
+#define BF_UART_UIIR_INPEND_V(e)                BF_UART_UIIR_INPEND(BV_UART_UIIR_INPEND__##e)
+#define BFM_UART_UIIR_INPEND_V(v)               BM_UART_UIIR_INPEND
+
+#define REG_UART_UFCR(_n1)          jz_reg(UART_UFCR(_n1))
+#define JA_UART_UFCR(_n1)           (0xb0030000 + (_n1) * 0x1000 + 0x8)
+#define JT_UART_UFCR(_n1)           JIO_32_RW
+#define JN_UART_UFCR(_n1)           UART_UFCR
+#define JI_UART_UFCR(_n1)           (_n1)
+#define BP_UART_UFCR_RDTR           6
+#define BM_UART_UFCR_RDTR           0xc0
+#define BV_UART_UFCR_RDTR__1BYTE    0x0
+#define BV_UART_UFCR_RDTR__16BYTE   0x1
+#define BV_UART_UFCR_RDTR__32BYTE   0x2
+#define BV_UART_UFCR_RDTR__60BYTE   0x3
+#define BF_UART_UFCR_RDTR(v)        (((v) & 0x3) << 6)
+#define BFM_UART_UFCR_RDTR(v)       BM_UART_UFCR_RDTR
+#define BF_UART_UFCR_RDTR_V(e)      BF_UART_UFCR_RDTR(BV_UART_UFCR_RDTR__##e)
+#define BFM_UART_UFCR_RDTR_V(v)     BM_UART_UFCR_RDTR
+#define BP_UART_UFCR_UME            4
+#define BM_UART_UFCR_UME            0x10
+#define BF_UART_UFCR_UME(v)         (((v) & 0x1) << 4)
+#define BFM_UART_UFCR_UME(v)        BM_UART_UFCR_UME
+#define BF_UART_UFCR_UME_V(e)       BF_UART_UFCR_UME(BV_UART_UFCR_UME__##e)
+#define BFM_UART_UFCR_UME_V(v)      BM_UART_UFCR_UME
+#define BP_UART_UFCR_DME            3
+#define BM_UART_UFCR_DME            0x8
+#define BF_UART_UFCR_DME(v)         (((v) & 0x1) << 3)
+#define BFM_UART_UFCR_DME(v)        BM_UART_UFCR_DME
+#define BF_UART_UFCR_DME_V(e)       BF_UART_UFCR_DME(BV_UART_UFCR_DME__##e)
+#define BFM_UART_UFCR_DME_V(v)      BM_UART_UFCR_DME
+#define BP_UART_UFCR_TFRT           2
+#define BM_UART_UFCR_TFRT           0x4
+#define BF_UART_UFCR_TFRT(v)        (((v) & 0x1) << 2)
+#define BFM_UART_UFCR_TFRT(v)       BM_UART_UFCR_TFRT
+#define BF_UART_UFCR_TFRT_V(e)      BF_UART_UFCR_TFRT(BV_UART_UFCR_TFRT__##e)
+#define BFM_UART_UFCR_TFRT_V(v)     BM_UART_UFCR_TFRT
+#define BP_UART_UFCR_RFRT           1
+#define BM_UART_UFCR_RFRT           0x2
+#define BF_UART_UFCR_RFRT(v)        (((v) & 0x1) << 1)
+#define BFM_UART_UFCR_RFRT(v)       BM_UART_UFCR_RFRT
+#define BF_UART_UFCR_RFRT_V(e)      BF_UART_UFCR_RFRT(BV_UART_UFCR_RFRT__##e)
+#define BFM_UART_UFCR_RFRT_V(v)     BM_UART_UFCR_RFRT
+#define BP_UART_UFCR_FME            0
+#define BM_UART_UFCR_FME            0x1
+#define BF_UART_UFCR_FME(v)         (((v) & 0x1) << 0)
+#define BFM_UART_UFCR_FME(v)        BM_UART_UFCR_FME
+#define BF_UART_UFCR_FME_V(e)       BF_UART_UFCR_FME(BV_UART_UFCR_FME__##e)
+#define BFM_UART_UFCR_FME_V(v)      BM_UART_UFCR_FME
+
+#define REG_UART_ULCR(_n1)              jz_reg(UART_ULCR(_n1))
+#define JA_UART_ULCR(_n1)               (0xb0030000 + (_n1) * 0x1000 + 0xc)
+#define JT_UART_ULCR(_n1)               JIO_32_RW
+#define JN_UART_ULCR(_n1)               UART_ULCR
+#define JI_UART_ULCR(_n1)               (_n1)
+#define BP_UART_ULCR_WLS                0
+#define BM_UART_ULCR_WLS                0x3
+#define BV_UART_ULCR_WLS__5BITS         0x0
+#define BV_UART_ULCR_WLS__6BITS         0x1
+#define BV_UART_ULCR_WLS__7BITS         0x2
+#define BV_UART_ULCR_WLS__8BITS         0x3
+#define BF_UART_ULCR_WLS(v)             (((v) & 0x3) << 0)
+#define BFM_UART_ULCR_WLS(v)            BM_UART_ULCR_WLS
+#define BF_UART_ULCR_WLS_V(e)           BF_UART_ULCR_WLS(BV_UART_ULCR_WLS__##e)
+#define BFM_UART_ULCR_WLS_V(v)          BM_UART_ULCR_WLS
+#define BP_UART_ULCR_DLAB               7
+#define BM_UART_ULCR_DLAB               0x80
+#define BF_UART_ULCR_DLAB(v)            (((v) & 0x1) << 7)
+#define BFM_UART_ULCR_DLAB(v)           BM_UART_ULCR_DLAB
+#define BF_UART_ULCR_DLAB_V(e)          BF_UART_ULCR_DLAB(BV_UART_ULCR_DLAB__##e)
+#define BFM_UART_ULCR_DLAB_V(v)         BM_UART_ULCR_DLAB
+#define BP_UART_ULCR_SBK                6
+#define BM_UART_ULCR_SBK                0x40
+#define BF_UART_ULCR_SBK(v)             (((v) & 0x1) << 6)
+#define BFM_UART_ULCR_SBK(v)            BM_UART_ULCR_SBK
+#define BF_UART_ULCR_SBK_V(e)           BF_UART_ULCR_SBK(BV_UART_ULCR_SBK__##e)
+#define BFM_UART_ULCR_SBK_V(v)          BM_UART_ULCR_SBK
+#define BP_UART_ULCR_STPAR              5
+#define BM_UART_ULCR_STPAR              0x20
+#define BF_UART_ULCR_STPAR(v)           (((v) & 0x1) << 5)
+#define BFM_UART_ULCR_STPAR(v)          BM_UART_ULCR_STPAR
+#define BF_UART_ULCR_STPAR_V(e)         BF_UART_ULCR_STPAR(BV_UART_ULCR_STPAR__##e)
+#define BFM_UART_ULCR_STPAR_V(v)        BM_UART_ULCR_STPAR
+#define BP_UART_ULCR_PARM               4
+#define BM_UART_ULCR_PARM               0x10
+#define BV_UART_ULCR_PARM__ODD          0x0
+#define BV_UART_ULCR_PARM__EVEN         0x1
+#define BF_UART_ULCR_PARM(v)            (((v) & 0x1) << 4)
+#define BFM_UART_ULCR_PARM(v)           BM_UART_ULCR_PARM
+#define BF_UART_ULCR_PARM_V(e)          BF_UART_ULCR_PARM(BV_UART_ULCR_PARM__##e)
+#define BFM_UART_ULCR_PARM_V(v)         BM_UART_ULCR_PARM
+#define BP_UART_ULCR_PARE               3
+#define BM_UART_ULCR_PARE               0x8
+#define BF_UART_ULCR_PARE(v)            (((v) & 0x1) << 3)
+#define BFM_UART_ULCR_PARE(v)           BM_UART_ULCR_PARE
+#define BF_UART_ULCR_PARE_V(e)          BF_UART_ULCR_PARE(BV_UART_ULCR_PARE__##e)
+#define BFM_UART_ULCR_PARE_V(v)         BM_UART_ULCR_PARE
+#define BP_UART_ULCR_SBLS               2
+#define BM_UART_ULCR_SBLS               0x4
+#define BV_UART_ULCR_SBLS__1_STOP_BIT   0x0
+#define BV_UART_ULCR_SBLS__2_STOP_BITS  0x1
+#define BF_UART_ULCR_SBLS(v)            (((v) & 0x1) << 2)
+#define BFM_UART_ULCR_SBLS(v)           BM_UART_ULCR_SBLS
+#define BF_UART_ULCR_SBLS_V(e)          BF_UART_ULCR_SBLS(BV_UART_ULCR_SBLS__##e)
+#define BFM_UART_ULCR_SBLS_V(v)         BM_UART_ULCR_SBLS
+
+#define REG_UART_UMCR(_n1)      jz_reg(UART_UMCR(_n1))
+#define JA_UART_UMCR(_n1)       (0xb0030000 + (_n1) * 0x1000 + 0x10)
+#define JT_UART_UMCR(_n1)       JIO_32_RW
+#define JN_UART_UMCR(_n1)       UART_UMCR
+#define JI_UART_UMCR(_n1)       (_n1)
+#define BP_UART_UMCR_MDCE       7
+#define BM_UART_UMCR_MDCE       0x80
+#define BF_UART_UMCR_MDCE(v)    (((v) & 0x1) << 7)
+#define BFM_UART_UMCR_MDCE(v)   BM_UART_UMCR_MDCE
+#define BF_UART_UMCR_MDCE_V(e)  BF_UART_UMCR_MDCE(BV_UART_UMCR_MDCE__##e)
+#define BFM_UART_UMCR_MDCE_V(v) BM_UART_UMCR_MDCE
+#define BP_UART_UMCR_FCM        6
+#define BM_UART_UMCR_FCM        0x40
+#define BF_UART_UMCR_FCM(v)     (((v) & 0x1) << 6)
+#define BFM_UART_UMCR_FCM(v)    BM_UART_UMCR_FCM
+#define BF_UART_UMCR_FCM_V(e)   BF_UART_UMCR_FCM(BV_UART_UMCR_FCM__##e)
+#define BFM_UART_UMCR_FCM_V(v)  BM_UART_UMCR_FCM
+#define BP_UART_UMCR_LOOP       4
+#define BM_UART_UMCR_LOOP       0x10
+#define BF_UART_UMCR_LOOP(v)    (((v) & 0x1) << 4)
+#define BFM_UART_UMCR_LOOP(v)   BM_UART_UMCR_LOOP
+#define BF_UART_UMCR_LOOP_V(e)  BF_UART_UMCR_LOOP(BV_UART_UMCR_LOOP__##e)
+#define BFM_UART_UMCR_LOOP_V(v) BM_UART_UMCR_LOOP
+#define BP_UART_UMCR_RTS        1
+#define BM_UART_UMCR_RTS        0x2
+#define BF_UART_UMCR_RTS(v)     (((v) & 0x1) << 1)
+#define BFM_UART_UMCR_RTS(v)    BM_UART_UMCR_RTS
+#define BF_UART_UMCR_RTS_V(e)   BF_UART_UMCR_RTS(BV_UART_UMCR_RTS__##e)
+#define BFM_UART_UMCR_RTS_V(v)  BM_UART_UMCR_RTS
+
+#define REG_UART_ULSR(_n1)          jz_reg(UART_ULSR(_n1))
+#define JA_UART_ULSR(_n1)           (0xb0030000 + (_n1) * 0x1000 + 0x14)
+#define JT_UART_ULSR(_n1)           JIO_32_RW
+#define JN_UART_ULSR(_n1)           UART_ULSR
+#define JI_UART_ULSR(_n1)           (_n1)
+#define BP_UART_ULSR_FIFOE          7
+#define BM_UART_ULSR_FIFOE          0x80
+#define BF_UART_ULSR_FIFOE(v)       (((v) & 0x1) << 7)
+#define BFM_UART_ULSR_FIFOE(v)      BM_UART_ULSR_FIFOE
+#define BF_UART_ULSR_FIFOE_V(e)     BF_UART_ULSR_FIFOE(BV_UART_ULSR_FIFOE__##e)
+#define BFM_UART_ULSR_FIFOE_V(v)    BM_UART_ULSR_FIFOE
+#define BP_UART_ULSR_TEMP           6
+#define BM_UART_ULSR_TEMP           0x40
+#define BF_UART_ULSR_TEMP(v)        (((v) & 0x1) << 6)
+#define BFM_UART_ULSR_TEMP(v)       BM_UART_ULSR_TEMP
+#define BF_UART_ULSR_TEMP_V(e)      BF_UART_ULSR_TEMP(BV_UART_ULSR_TEMP__##e)
+#define BFM_UART_ULSR_TEMP_V(v)     BM_UART_ULSR_TEMP
+#define BP_UART_ULSR_TDRQ           5
+#define BM_UART_ULSR_TDRQ           0x20
+#define BF_UART_ULSR_TDRQ(v)        (((v) & 0x1) << 5)
+#define BFM_UART_ULSR_TDRQ(v)       BM_UART_ULSR_TDRQ
+#define BF_UART_ULSR_TDRQ_V(e)      BF_UART_ULSR_TDRQ(BV_UART_ULSR_TDRQ__##e)
+#define BFM_UART_ULSR_TDRQ_V(v)     BM_UART_ULSR_TDRQ
+#define BP_UART_ULSR_BI             4
+#define BM_UART_ULSR_BI             0x10
+#define BF_UART_ULSR_BI(v)          (((v) & 0x1) << 4)
+#define BFM_UART_ULSR_BI(v)         BM_UART_ULSR_BI
+#define BF_UART_ULSR_BI_V(e)        BF_UART_ULSR_BI(BV_UART_ULSR_BI__##e)
+#define BFM_UART_ULSR_BI_V(v)       BM_UART_ULSR_BI
+#define BP_UART_ULSR_FMER           3
+#define BM_UART_ULSR_FMER           0x8
+#define BF_UART_ULSR_FMER(v)        (((v) & 0x1) << 3)
+#define BFM_UART_ULSR_FMER(v)       BM_UART_ULSR_FMER
+#define BF_UART_ULSR_FMER_V(e)      BF_UART_ULSR_FMER(BV_UART_ULSR_FMER__##e)
+#define BFM_UART_ULSR_FMER_V(v)     BM_UART_ULSR_FMER
+#define BP_UART_ULSR_PARER          2
+#define BM_UART_ULSR_PARER          0x4
+#define BF_UART_ULSR_PARER(v)       (((v) & 0x1) << 2)
+#define BFM_UART_ULSR_PARER(v)      BM_UART_ULSR_PARER
+#define BF_UART_ULSR_PARER_V(e)     BF_UART_ULSR_PARER(BV_UART_ULSR_PARER__##e)
+#define BFM_UART_ULSR_PARER_V(v)    BM_UART_ULSR_PARER
+#define BP_UART_ULSR_OVER           1
+#define BM_UART_ULSR_OVER           0x2
+#define BF_UART_ULSR_OVER(v)        (((v) & 0x1) << 1)
+#define BFM_UART_ULSR_OVER(v)       BM_UART_ULSR_OVER
+#define BF_UART_ULSR_OVER_V(e)      BF_UART_ULSR_OVER(BV_UART_ULSR_OVER__##e)
+#define BFM_UART_ULSR_OVER_V(v)     BM_UART_ULSR_OVER
+#define BP_UART_ULSR_DRY            0
+#define BM_UART_ULSR_DRY            0x1
+#define BF_UART_ULSR_DRY(v)         (((v) & 0x1) << 0)
+#define BFM_UART_ULSR_DRY(v)        BM_UART_ULSR_DRY
+#define BF_UART_ULSR_DRY_V(e)       BF_UART_ULSR_DRY(BV_UART_ULSR_DRY__##e)
+#define BFM_UART_ULSR_DRY_V(v)      BM_UART_ULSR_DRY
+
+#define REG_UART_UMSR(_n1)      jz_reg(UART_UMSR(_n1))
+#define JA_UART_UMSR(_n1)       (0xb0030000 + (_n1) * 0x1000 + 0x18)
+#define JT_UART_UMSR(_n1)       JIO_32_RW
+#define JN_UART_UMSR(_n1)       UART_UMSR
+#define JI_UART_UMSR(_n1)       (_n1)
+#define BP_UART_UMSR_CTS        4
+#define BM_UART_UMSR_CTS        0x10
+#define BF_UART_UMSR_CTS(v)     (((v) & 0x1) << 4)
+#define BFM_UART_UMSR_CTS(v)    BM_UART_UMSR_CTS
+#define BF_UART_UMSR_CTS_V(e)   BF_UART_UMSR_CTS(BV_UART_UMSR_CTS__##e)
+#define BFM_UART_UMSR_CTS_V(v)  BM_UART_UMSR_CTS
+#define BP_UART_UMSR_CCTS       0
+#define BM_UART_UMSR_CCTS       0x1
+#define BF_UART_UMSR_CCTS(v)    (((v) & 0x1) << 0)
+#define BFM_UART_UMSR_CCTS(v)   BM_UART_UMSR_CCTS
+#define BF_UART_UMSR_CCTS_V(e)  BF_UART_UMSR_CCTS(BV_UART_UMSR_CCTS__##e)
+#define BFM_UART_UMSR_CCTS_V(v) BM_UART_UMSR_CCTS
+
+#define REG_UART_USPR(_n1)  jz_reg(UART_USPR(_n1))
+#define JA_UART_USPR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x1c)
+#define JT_UART_USPR(_n1)   JIO_32_RW
+#define JN_UART_USPR(_n1)   UART_USPR
+#define JI_UART_USPR(_n1)   (_n1)
+
+#define REG_UART_ISR(_n1)           jz_reg(UART_ISR(_n1))
+#define JA_UART_ISR(_n1)            (0xb0030000 + (_n1) * 0x1000 + 0x20)
+#define JT_UART_ISR(_n1)            JIO_32_RW
+#define JN_UART_ISR(_n1)            UART_ISR
+#define JI_UART_ISR(_n1)            (_n1)
+#define BP_UART_ISR_RDPL            4
+#define BM_UART_ISR_RDPL            0x10
+#define BF_UART_ISR_RDPL(v)         (((v) & 0x1) << 4)
+#define BFM_UART_ISR_RDPL(v)        BM_UART_ISR_RDPL
+#define BF_UART_ISR_RDPL_V(e)       BF_UART_ISR_RDPL(BV_UART_ISR_RDPL__##e)
+#define BFM_UART_ISR_RDPL_V(v)      BM_UART_ISR_RDPL
+#define BP_UART_ISR_TDPL            3
+#define BM_UART_ISR_TDPL            0x8
+#define BF_UART_ISR_TDPL(v)         (((v) & 0x1) << 3)
+#define BFM_UART_ISR_TDPL(v)        BM_UART_ISR_TDPL
+#define BF_UART_ISR_TDPL_V(e)       BF_UART_ISR_TDPL(BV_UART_ISR_TDPL__##e)
+#define BFM_UART_ISR_TDPL_V(v)      BM_UART_ISR_TDPL
+#define BP_UART_ISR_XMODE           2
+#define BM_UART_ISR_XMODE           0x4
+#define BF_UART_ISR_XMODE(v)        (((v) & 0x1) << 2)
+#define BFM_UART_ISR_XMODE(v)       BM_UART_ISR_XMODE
+#define BF_UART_ISR_XMODE_V(e)      BF_UART_ISR_XMODE(BV_UART_ISR_XMODE__##e)
+#define BFM_UART_ISR_XMODE_V(v)     BM_UART_ISR_XMODE
+#define BP_UART_ISR_RCVEIR          1
+#define BM_UART_ISR_RCVEIR          0x2
+#define BF_UART_ISR_RCVEIR(v)       (((v) & 0x1) << 1)
+#define BFM_UART_ISR_RCVEIR(v)      BM_UART_ISR_RCVEIR
+#define BF_UART_ISR_RCVEIR_V(e)     BF_UART_ISR_RCVEIR(BV_UART_ISR_RCVEIR__##e)
+#define BFM_UART_ISR_RCVEIR_V(v)    BM_UART_ISR_RCVEIR
+#define BP_UART_ISR_XMITIR          0
+#define BM_UART_ISR_XMITIR          0x1
+#define BF_UART_ISR_XMITIR(v)       (((v) & 0x1) << 0)
+#define BFM_UART_ISR_XMITIR(v)      BM_UART_ISR_XMITIR
+#define BF_UART_ISR_XMITIR_V(e)     BF_UART_ISR_XMITIR(BV_UART_ISR_XMITIR__##e)
+#define BFM_UART_ISR_XMITIR_V(v)    BM_UART_ISR_XMITIR
+
+#define REG_UART_UMR(_n1)   jz_reg(UART_UMR(_n1))
+#define JA_UART_UMR(_n1)    (0xb0030000 + (_n1) * 0x1000 + 0x24)
+#define JT_UART_UMR(_n1)    JIO_32_RW
+#define JN_UART_UMR(_n1)    UART_UMR
+#define JI_UART_UMR(_n1)    (_n1)
+
+#define REG_UART_UACR(_n1)  jz_reg(UART_UACR(_n1))
+#define JA_UART_UACR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x28)
+#define JT_UART_UACR(_n1)   JIO_32_RW
+#define JN_UART_UACR(_n1)   UART_UACR
+#define JI_UART_UACR(_n1)   (_n1)
+
+#define REG_UART_URCR(_n1)  jz_reg(UART_URCR(_n1))
+#define JA_UART_URCR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x40)
+#define JT_UART_URCR(_n1)   JIO_32_RW
+#define JN_UART_URCR(_n1)   UART_URCR
+#define JI_UART_URCR(_n1)   (_n1)
+
+#define REG_UART_UTCR(_n1)  jz_reg(UART_UTCR(_n1))
+#define JA_UART_UTCR(_n1)   (0xb0030000 + (_n1) * 0x1000 + 0x44)
+#define JT_UART_UTCR(_n1)   JIO_32_RW
+#define JN_UART_UTCR(_n1)   UART_UTCR
+#define JI_UART_UTCR(_n1)   (_n1)
+
+#endif /* __HEADERGEN_UART_H__*/