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authorSolomon Peachy <pizza@shaftnet.org>2020-08-28 21:45:58 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-09-03 15:34:28 -0400
commit0cb162a76b16d58250a33e817af6a763e89a770a (patch)
treeaf5ac50c1ec59f665e0a4845672a16d758b44953 /firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
parent1ae8213a64c23ac86173b8139e01c7cad350ec6b (diff)
downloadrockbox-0cb162a76b16d58250a33e817af6a763e89a770a.tar.gz
rockbox-0cb162a76b16d58250a33e817af6a763e89a770a.zip
mips: Heavily rework DMA & caching code
Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527) but rebased and heavily updated. Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
index cf676622f1..a2d5b73ea8 100644
--- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
@@ -109,8 +109,9 @@ void lcd_update_rect(int x, int y, int width, int height)
109 REG_DMAC_DCMD(DMA_LCD_CHANNEL) = ( DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 109 REG_DMAC_DCMD(DMA_LCD_CHANNEL) = ( DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32
110 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE ); 110 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE );
111 111
112 __dcache_writeback_all(); /* Size of framebuffer is way bigger than cache size. 112 // XXX range
113 We need to find a way to make the framebuffer uncached, so this statement can get removed. */ 113 commit_discard_dcache(); /* Size of framebuffer is way bigger than cache size.
114 We need to find a way to make the framebuffer uncached, so this statement can get removed. */
114 115
115 while(REG_SLCD_STATE & SLCD_STATE_BUSY); 116 while(REG_SLCD_STATE & SLCD_STATE_BUSY);
116 REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN; /* Enable SLCD DMA support */ 117 REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN; /* Enable SLCD DMA support */
@@ -174,7 +175,7 @@ void lcd_blit_yuv(unsigned char * const src[3],
174 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1); 175 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
175 yuv_src[2] = src[2] + (yuv_src[1] - src[1]); 176 yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
176 177
177 __dcache_writeback_all(); 178 commit_discard_dcache(); // XXX range
178 179
179 __cpm_start_ipu(); 180 __cpm_start_ipu();
180 181