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authorSolomon Peachy <pizza@shaftnet.org>2020-08-28 21:45:58 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-09-03 15:34:28 -0400
commit0cb162a76b16d58250a33e817af6a763e89a770a (patch)
treeaf5ac50c1ec59f665e0a4845672a16d758b44953 /firmware/target/mips/ingenic_jz47xx
parent1ae8213a64c23ac86173b8139e01c7cad350ec6b (diff)
downloadrockbox-0cb162a76b16d58250a33e817af6a763e89a770a.tar.gz
rockbox-0cb162a76b16d58250a33e817af6a763e89a770a.zip
mips: Heavily rework DMA & caching code
Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527) but rebased and heavily updated. Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c4
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c4
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c4
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c8
-rw-r--r--firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c9
-rw-r--r--firmware/target/mips/ingenic_jz47xx/dma_acc-jz4760.c12
-rw-r--r--firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c7
-rw-r--r--firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c3
-rw-r--r--firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c5
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4740.c15
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4760.c3
-rw-r--r--firmware/target/mips/ingenic_jz47xx/usb-jz4740.c10
-rw-r--r--firmware/target/mips/ingenic_jz47xx/usb-jz4760.c10
13 files changed, 44 insertions, 50 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
index a582db82cc..5f320f8e9b 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
@@ -151,7 +151,7 @@ static void jz_nand_write_dma(void *source, unsigned int len, int bw)
151 mutex_lock(&nand_dma_mtx); 151 mutex_lock(&nand_dma_mtx);
152 152
153 if(((unsigned int)source < 0xa0000000) && len) 153 if(((unsigned int)source < 0xa0000000) && len)
154 dma_cache_wback_inv((unsigned long)source, len); 154 commit_discard_dcache_range(source, len);
155 155
156 dma_enable(); 156 dma_enable();
157 157
@@ -184,7 +184,7 @@ static void jz_nand_read_dma(void *target, unsigned int len, int bw)
184 mutex_lock(&nand_dma_mtx); 184 mutex_lock(&nand_dma_mtx);
185 185
186 if(((unsigned int)target < 0xa0000000) && len) 186 if(((unsigned int)target < 0xa0000000) && len)
187 dma_cache_wback_inv((unsigned long)target, len); 187 discard_dcache_range(target, len);
188 188
189 dma_enable(); 189 dma_enable();
190 190
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
index 1eacf9170a..efce5742d0 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
@@ -150,7 +150,7 @@ static void jz_nand_write_dma(void *source, unsigned int len, int bw)
150 mutex_lock(&nand_dma_mtx); 150 mutex_lock(&nand_dma_mtx);
151 151
152 if(((unsigned int)source < 0xa0000000) && len) 152 if(((unsigned int)source < 0xa0000000) && len)
153 dma_cache_wback_inv((unsigned long)source, len); 153 commit_discard_dcache_range(source, len);
154 154
155 dma_enable(); 155 dma_enable();
156 156
@@ -183,7 +183,7 @@ static void jz_nand_read_dma(void *target, unsigned int len, int bw)
183 mutex_lock(&nand_dma_mtx); 183 mutex_lock(&nand_dma_mtx);
184 184
185 if(((unsigned int)target < 0xa0000000) && len) 185 if(((unsigned int)target < 0xa0000000) && len)
186 dma_cache_wback_inv((unsigned long)target, len); 186 discard_dcache_range(target, len);
187 187
188 dma_enable(); 188 dma_enable();
189 189
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
index 0eb175c03f..56dd50814a 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
@@ -417,7 +417,7 @@ static void jz_sd_receive_data_dma(struct sd_request *req)
417#endif 417#endif
418 418
419 /* flush dcache */ 419 /* flush dcache */
420 //dma_cache_wback_inv((unsigned long) req->buffer, size); 420 discard_dcache_range(req->buffer, size);
421 /* setup dma channel */ 421 /* setup dma channel */
422 REG_DMAC_DSAR(DMA_SD_RX_CHANNEL) = PHYSADDR(MSC_RXFIFO); /* DMA source addr */ 422 REG_DMAC_DSAR(DMA_SD_RX_CHANNEL) = PHYSADDR(MSC_RXFIFO); /* DMA source addr */
423 REG_DMAC_DTAR(DMA_SD_RX_CHANNEL) = PHYSADDR((unsigned long) req->buffer); /* DMA dest addr */ 423 REG_DMAC_DTAR(DMA_SD_RX_CHANNEL) = PHYSADDR((unsigned long) req->buffer); /* DMA dest addr */
@@ -452,7 +452,7 @@ static void jz_mmc_transmit_data_dma(struct mmc_request *req)
452#endif 452#endif
453 453
454 /* flush dcache */ 454 /* flush dcache */
455 //dma_cache_wback_inv((unsigned long) req->buffer, size); 455 commit_discard_dcache_range(req->buffer, size);
456 /* setup dma channel */ 456 /* setup dma channel */
457 REG_DMAC_DSAR(DMA_SD_TX_CHANNEL) = PHYSADDR((unsigned long) req->buffer); /* DMA source addr */ 457 REG_DMAC_DSAR(DMA_SD_TX_CHANNEL) = PHYSADDR((unsigned long) req->buffer); /* DMA source addr */
458 REG_DMAC_DTAR(DMA_SD_TX_CHANNEL) = PHYSADDR(MSC_TXFIFO); /* DMA dest addr */ 458 REG_DMAC_DTAR(DMA_SD_TX_CHANNEL) = PHYSADDR(MSC_TXFIFO); /* DMA dest addr */
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
index 55ffecce09..1960fcbd35 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
@@ -532,6 +532,9 @@ static int jz_sd_transmit_data(const int drive, struct sd_request *req)
532#if SD_DMA_ENABLE 532#if SD_DMA_ENABLE
533static int jz_sd_receive_data_dma(const int drive, struct sd_request *req) 533static int jz_sd_receive_data_dma(const int drive, struct sd_request *req)
534{ 534{
535 /* flush dcache */
536 discard_dcache_range(req->buffer, req->cnt);
537
535 /* setup dma channel */ 538 /* setup dma channel */
536 REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0; 539 REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0;
537 REG_DMAC_DSAR(DMA_SD_RX_CHANNEL(drive)) = PHYSADDR(MSC_RXFIFO(MSC_CHN(drive))); /* DMA source addr */ 540 REG_DMAC_DSAR(DMA_SD_RX_CHANNEL(drive)) = PHYSADDR(MSC_RXFIFO(MSC_CHN(drive))); /* DMA source addr */
@@ -558,16 +561,13 @@ static int jz_sd_receive_data_dma(const int drive, struct sd_request *req)
558 /* clear status and disable channel */ 561 /* clear status and disable channel */
559 REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0; 562 REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0;
560 563
561 /* flush dcache */
562 dma_cache_wback_inv((unsigned long) req->buffer, req->cnt);
563
564 return SD_NO_ERROR; 564 return SD_NO_ERROR;
565} 565}
566 566
567static int jz_sd_transmit_data_dma(const int drive, struct sd_request *req) 567static int jz_sd_transmit_data_dma(const int drive, struct sd_request *req)
568{ 568{
569 /* flush dcache */ 569 /* flush dcache */
570 dma_cache_wback_inv((unsigned long) req->buffer, req->cnt); 570 commit_discard_dcache_range(req->buffer, req->cnt);
571 571
572 /* setup dma channel */ 572 /* setup dma channel */
573 REG_DMAC_DCCSR(DMA_SD_TX_CHANNEL(drive)) = 0; 573 REG_DMAC_DCCSR(DMA_SD_TX_CHANNEL(drive)) = 0;
diff --git a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c
index 6f317f7b3f..f4f363b25b 100644
--- a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4740.c
@@ -32,7 +32,7 @@ void memset(void *target, unsigned char c, size_t len)
32 else 32 else
33 { 33 {
34 if(((unsigned int)target < 0xa0000000) && len) 34 if(((unsigned int)target < 0xa0000000) && len)
35 dma_cache_wback_inv((unsigned long)target, len); 35 discard_dcache_range(target, len);
36 36
37 dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000); 37 dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000);
38 *(dp + 0) = c; 38 *(dp + 0) = c;
@@ -52,7 +52,6 @@ void memset(void *target, unsigned char c, size_t len)
52 dp = (unsigned char *)((unsigned int)target + (len & (32 - 1))); 52 dp = (unsigned char *)((unsigned int)target + (len & (32 - 1)));
53 for(d = 0;d < (len % 32); d++) 53 for(d = 0;d < (len % 32); d++)
54 *dp++ = c; 54 *dp++ = c;
55
56 } 55 }
57 } 56 }
58} 57}
@@ -68,7 +67,7 @@ void memset16(void *target, unsigned short c, size_t len)
68 else 67 else
69 { 68 {
70 if(((unsigned int)target < 0xa0000000) && len) 69 if(((unsigned int)target < 0xa0000000) && len)
71 dma_cache_wback_inv((unsigned long)target, len); 70 discard_dcache_range(target, len);
72 71
73 d = c; 72 d = c;
74 REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)&d); 73 REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)&d);
@@ -97,10 +96,10 @@ void memcpy(void *target, const void *source, size_t len)
97 _memcpy(target, source, len); 96 _memcpy(target, source, len);
98 97
99 if(((unsigned int)source < 0xa0000000) && len) 98 if(((unsigned int)source < 0xa0000000) && len)
100 dma_cache_wback_inv((unsigned long)source, len); 99 commit_dcache_range(source, len);
101 100
102 if(((unsigned int)target < 0xa0000000) && len) 101 if(((unsigned int)target < 0xa0000000) && len)
103 dma_cache_wback_inv((unsigned long)target, len); 102 discard_dcache_range(target, len);
104 103
105 REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)source); 104 REG_DMAC_DSAR(ch) = PHYSADDR((unsigned long)source);
106 REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target); 105 REG_DMAC_DTAR(ch) = PHYSADDR((unsigned long)target);
diff --git a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4760.c b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4760.c
index 4cdea2ad08..87d2b4e210 100644
--- a/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/dma_acc-jz4760.c
@@ -29,7 +29,7 @@ void memset_dma(void *target, int c, size_t len, unsigned int bits)
29 unsigned char *dp; 29 unsigned char *dp;
30 30
31 if(((unsigned int)target < 0xa0000000) && len) 31 if(((unsigned int)target < 0xa0000000) && len)
32 dma_cache_wback_inv((unsigned long)target, len); 32 discard_dcache_range(target, len);
33 33
34 dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000); 34 dp = (unsigned char *)((unsigned int)(&d) | 0xa0000000);
35 *(dp + 0) = c; 35 *(dp + 0) = c;
@@ -68,14 +68,14 @@ void memset_dma(void *target, int c, size_t len, unsigned int bits)
68void memcpy_dma(void *target, const void *source, size_t len, unsigned int bits) 68void memcpy_dma(void *target, const void *source, size_t len, unsigned int bits)
69{ 69{
70 if(((unsigned int)source < 0xa0000000) && len) 70 if(((unsigned int)source < 0xa0000000) && len)
71 dma_cache_wback_inv((unsigned long)source, len); 71 commit_dcache_range(source, len);
72 72
73 if(((unsigned int)target < 0xa0000000) && len) 73 if(((unsigned int)target < 0xa0000000) && len)
74 dma_cache_wback_inv((unsigned long)target, len); 74 discard_dcache_range(target, len);
75 75
76 REG_MDMAC_DCCSR(MDMA_CHANNEL) = 0; 76 REG_MDMAC_DCCSR(MDMA_CHANNEL) = 0;
77 REG_MDMAC_DSAR(MDMA_CHANNEL) = PHYSADDR((unsigned long)source); 77 REG_MDMAC_DSAR(MDMA_CHANNEL) = PHYSADDR((unsigned long)source);
78 REG_MDMAC_DTAR(MDMA_CHANNEL) = PHYSADDR((unsigned long)target); 78 REG_MDMAC_DTAR(MDMA_CHANNEL) = PHYSADDR((unsigned long)target);
79 REG_MDMAC_DRSR(MDMA_CHANNEL) = DMAC_DRSR_RS_AUTO; 79 REG_MDMAC_DRSR(MDMA_CHANNEL) = DMAC_DRSR_RS_AUTO;
80 switch (bits) 80 switch (bits)
81 { 81 {
diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
index cf676622f1..a2d5b73ea8 100644
--- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
@@ -109,8 +109,9 @@ void lcd_update_rect(int x, int y, int width, int height)
109 REG_DMAC_DCMD(DMA_LCD_CHANNEL) = ( DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32 109 REG_DMAC_DCMD(DMA_LCD_CHANNEL) = ( DMAC_DCMD_SAI | DMAC_DCMD_RDIL_IGN | DMAC_DCMD_SWDH_32
110 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE ); 110 | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE );
111 111
112 __dcache_writeback_all(); /* Size of framebuffer is way bigger than cache size. 112 // XXX range
113 We need to find a way to make the framebuffer uncached, so this statement can get removed. */ 113 commit_discard_dcache(); /* Size of framebuffer is way bigger than cache size.
114 We need to find a way to make the framebuffer uncached, so this statement can get removed. */
114 115
115 while(REG_SLCD_STATE & SLCD_STATE_BUSY); 116 while(REG_SLCD_STATE & SLCD_STATE_BUSY);
116 REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN; /* Enable SLCD DMA support */ 117 REG_SLCD_CTRL |= SLCD_CTRL_DMA_EN; /* Enable SLCD DMA support */
@@ -174,7 +175,7 @@ void lcd_blit_yuv(unsigned char * const src[3],
174 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1); 175 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
175 yuv_src[2] = src[2] + (yuv_src[1] - src[1]); 176 yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
176 177
177 __dcache_writeback_all(); 178 commit_discard_dcache(); // XXX range
178 179
179 __cpm_start_ipu(); 180 __cpm_start_ipu();
180 181
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
index 83d3646ed1..00a2b22591 100644
--- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
@@ -69,6 +69,8 @@ static inline void set_dma(const void *addr, size_t size)
69 int burst_size; 69 int burst_size;
70 logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR); 70 logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR);
71 71
72 commit_discard_dcache_range(addr, size);
73
72 if(size % 16) 74 if(size % 16)
73 { 75 {
74 if(size % 4) 76 if(size % 4)
@@ -88,7 +90,6 @@ static inline void set_dma(const void *addr, size_t size)
88 burst_size = DMAC_DCMD_DS_16BYTE; 90 burst_size = DMAC_DCMD_DS_16BYTE;
89 } 91 }
90 92
91 __dcache_writeback_all();
92 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES; 93 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
93 REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr); 94 REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr);
94 REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR); 95 REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR);
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c
index 39df037f76..59b086e4f8 100644
--- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4760.c
@@ -28,7 +28,6 @@
28#include "pcm-internal.h" 28#include "pcm-internal.h"
29#include "cpu.h" 29#include "cpu.h"
30 30
31
32/**************************************************************************** 31/****************************************************************************
33 ** Playback DMA transfer 32 ** Playback DMA transfer
34 **/ 33 **/
@@ -60,8 +59,8 @@ static inline void set_dma(const void *addr, size_t size)
60 int burst_size; 59 int burst_size;
61 logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR); 60 logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR);
62 61
63 dma_cache_wback_inv((unsigned long)addr, size); 62 commit_discard_dcache_range(addr, size);
64 63
65 if(size % 16) 64 if(size % 16)
66 { 65 {
67 if(size % 4) 66 if(size % 4)
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index 87094dd7ae..d3a753a58e 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -511,24 +511,23 @@ static void sdram_init(void)
511void ICODE_ATTR system_main(void) 511void ICODE_ATTR system_main(void)
512{ 512{
513 int i; 513 int i;
514 514
515 __dcache_writeback_all(); 515 commit_discard_idcache();
516 __icache_invalidate_all(); 516
517
518 write_c0_status(1 << 28 | 1 << 10 ); /* Enable CP | Mask interrupt 2 */ 517 write_c0_status(1 << 28 | 1 << 10 ); /* Enable CP | Mask interrupt 2 */
519 518
520 /* Disable all interrupts */ 519 /* Disable all interrupts */
521 for(i=0; i<IRQ_MAX; i++) 520 for(i=0; i<IRQ_MAX; i++)
522 dis_irq(i); 521 dis_irq(i);
523 522
524 mmu_init(); 523 mmu_init();
525 pll_init(); 524 pll_init();
526 sdram_init(); 525 sdram_init();
527 526
528 /* Disable unneeded clocks, clocks are enabled when needed */ 527 /* Disable unneeded clocks, clocks are enabled when needed */
529 __cpm_stop_all(); 528 __cpm_stop_all();
530 __cpm_suspend_usbhost(); 529 __cpm_suspend_usbhost();
531 530
532 /* Enable interrupts at core level */ 531 /* Enable interrupts at core level */
533 enable_interrupt(); 532 enable_interrupt();
534} 533}
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
index ff87e5ad9e..eee767c5ca 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
@@ -673,8 +673,7 @@ void ICODE_ATTR system_main(void)
673{ 673{
674 int i; 674 int i;
675 675
676 __dcache_writeback_all(); 676 commit_discard_idcache();
677 __icache_invalidate_all();
678 677
679 write_c0_status(1 << 28 | 1 << 10 ); /* Enable CP | Mask interrupt 2 */ 678 write_c0_status(1 << 28 | 1 << 10 ); /* Enable CP | Mask interrupt 2 */
680 679
diff --git a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
index e8cd2033ff..fd38b2b1a4 100644
--- a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
@@ -274,7 +274,7 @@ static void EPIN_handler(unsigned int endpoint)
274 } 274 }
275 275
276 logf("EP%d: %d -> %d", endpoint, ep->sent, ep->length); 276 logf("EP%d: %d -> %d", endpoint, ep->sent, ep->length);
277 277
278 if(ep->sent == 0) 278 if(ep->sent == 0)
279 length = MIN(ep->length, ep->fifo_size); 279 length = MIN(ep->length, ep->fifo_size);
280 else 280 else
@@ -365,7 +365,7 @@ static void EPDMA_handler(int number)
365 /* Disable DMA */ 365 /* Disable DMA */
366 REG_USB_REG_CNTL2 = 0; 366 REG_USB_REG_CNTL2 = 0;
367 367
368 __dcache_invalidate_all(); 368 commit_discard_dcache(); // XXX range?
369 369
370 select_endpoint(endpoint); 370 select_endpoint(endpoint);
371 /* Read out last packet manually */ 371 /* Read out last packet manually */
@@ -707,8 +707,7 @@ static void usb_drv_send_internal(struct usb_endpoint* ep, void* ptr, int length
707 { 707 {
708 if(ep->use_dma) 708 if(ep->use_dma)
709 { 709 {
710 //dma_cache_wback_inv((unsigned long)ptr, length); 710 commit_discard_dcache_range(ptr, length);
711 __dcache_writeback_all();
712 REG_USB_REG_ADDR1 = PHYSADDR((unsigned long)ptr); 711 REG_USB_REG_ADDR1 = PHYSADDR((unsigned long)ptr);
713 REG_USB_REG_COUNT1 = length; 712 REG_USB_REG_COUNT1 = length;
714 REG_USB_REG_CNTL1 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 | 713 REG_USB_REG_CNTL1 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
@@ -767,8 +766,7 @@ int usb_drv_recv(int endpoint, void* ptr, int length)
767 ep->busy = true; 766 ep->busy = true;
768 if(ep->use_dma) 767 if(ep->use_dma)
769 { 768 {
770 //dma_cache_wback_inv((unsigned long)ptr, length); 769 discard_dcache_range(ptr, length);
771 __dcache_writeback_all();
772 REG_USB_REG_ADDR2 = PHYSADDR((unsigned long)ptr); 770 REG_USB_REG_ADDR2 = PHYSADDR((unsigned long)ptr);
773 REG_USB_REG_COUNT2 = length; 771 REG_USB_REG_COUNT2 = length;
774 REG_USB_REG_CNTL2 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 | 772 REG_USB_REG_CNTL2 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
diff --git a/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c b/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c
index 3c7bb80f2c..275fd3fd2b 100644
--- a/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/usb-jz4760.c
@@ -360,7 +360,7 @@ static void EPIN_handler(unsigned int endpoint)
360 } 360 }
361 361
362 logf("EP%d: %d -> %d", endpoint, ep->sent, ep->length); 362 logf("EP%d: %d -> %d", endpoint, ep->sent, ep->length);
363 363
364 if(ep->sent == 0) 364 if(ep->sent == 0)
365 length = MIN(ep->length, ep->fifo_size); 365 length = MIN(ep->length, ep->fifo_size);
366 else 366 else
@@ -456,7 +456,7 @@ static void EPDMA_handler(int number)
456 /* Disable DMA */ 456 /* Disable DMA */
457 REG_USB_CNTL(1) = 0; 457 REG_USB_CNTL(1) = 0;
458 458
459 __dcache_invalidate_all(); 459 commit_discard_dcache(); // XXX range?
460 460
461 select_endpoint(endpoint); 461 select_endpoint(endpoint);
462 /* Read out last packet manually */ 462 /* Read out last packet manually */
@@ -846,8 +846,7 @@ static void usb_drv_send_internal(struct usb_endpoint* ep, void* ptr, int length
846 { 846 {
847 if(ep->use_dma) 847 if(ep->use_dma)
848 { 848 {
849 //dma_cache_wback_inv((unsigned long)ptr, length); 849 commit_discard_dcache_range(ptr, length);
850 __dcache_writeback_all();
851 REG_USB_ADDR(0) = PHYSADDR((unsigned long)ptr); 850 REG_USB_ADDR(0) = PHYSADDR((unsigned long)ptr);
852 REG_USB_COUNT(0) = length; 851 REG_USB_COUNT(0) = length;
853 REG_USB_CNTL(0) = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 | 852 REG_USB_CNTL(0) = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
@@ -921,8 +920,7 @@ int usb_drv_recv(int endpoint, void* ptr, int length)
921 ep->busy = true; 920 ep->busy = true;
922 if(ep->use_dma) 921 if(ep->use_dma)
923 { 922 {
924 //dma_cache_wback_inv((unsigned long)ptr, length); 923 discard_dcache_range(ptr, length);
925 __dcache_writeback_all();
926 REG_USB_ADDR(1) = PHYSADDR((unsigned long)ptr); 924 REG_USB_ADDR(1) = PHYSADDR((unsigned long)ptr);
927 REG_USB_COUNT(1) = length; 925 REG_USB_COUNT(1) = length;
928 REG_USB_CNTL(1) = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 | 926 REG_USB_CNTL(1) = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |