mips: Heavily rework DMA & caching code

Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527)
but rebased and heavily updated.

Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70

1 files changed, 2 insertions, 2 deletions

diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
index 1eacf9170a..efce5742d0 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4760.c
@@ -150,7 +150,7 @@ static void jz_nand_write_dma(void *source, unsigned int len, int bw)
     mutex_lock(&nand_dma_mtx);
 
     if(((unsigned int)source < 0xa0000000) && len)
-         dma_cache_wback_inv((unsigned long)source, len);
+         commit_discard_dcache_range(source, len);
 
     dma_enable();
 
@@ -183,7 +183,7 @@ static void jz_nand_read_dma(void *target, unsigned int len, int bw)
     mutex_lock(&nand_dma_mtx);
 
     if(((unsigned int)target < 0xa0000000) && len)
-        dma_cache_wback_inv((unsigned long)target, len);
+        discard_dcache_range(target, len);
 
     dma_enable();